This is information on a product in full production.
April 2015 DocID024167 Rev 5 1/19
STGIPS10K60T-H
SLLIMM™ small low-loss intelligent molded module
IPM, 3-phase inverter, 10 A, 600 V short-circuit rugged IGBT
Datasheet
-
production data
Features
•IPM 10 A, 600 V 3-phase IGBT inverter bridge
including control ICs for gate driving and free-
wheeling diodes
•Short-circuit rugged IGBTs
•V
CE(sat)
negative temperature coefficient
•3.3 V, 5 V, 15 V CMOS/TTL inputs
comparators with hysteresis and pull-down /
pull-up resistors
•Undervoltage lockout
•Internal bootstrap diode
•Interlocking function
•Shutdown function
•DBC substrate leading to low thermal
resistance
•Isolation rating of 2500 V
rms
/min
•4.7 kΩ NTC for temperature control
•UL recognized: UL1557 file E81734
Applications
•3-phase inverters for motor drives
•Home appl iances , such as washi ng mac hines ,
refrigerators, air conditioners and sewing
machines
Description
This intelligent power module provides a
compact, high performance AC motor drive in a
simple, rugged design. Combining ST proprietary
control ICs with the most advanced short-circuit-
rugged IGBT system technology, this device is
ideal for 3-phase inverters in applications such as
home appliances and air conditioners. SLLIMM™
is a trademark of ST Micr oel ectr oni c s.
SDIP-25L
Table 1. Device summary
Order code Marking Package Packing
STGIPS10K60T-H GIPS10K60T-H SDIP-25L Tube
www.st.com
Contents STGIPS10K60T-H
2/19 DocID024167 Rev 5
Contents
1 Internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3
2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.1 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 SDIP-25L p ackage information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DocID024167 Rev 5 3/19
STGIPS10K60T-H Internal b lock diagra m and pin configuration
19
1 Internal block diagram and pin configuration
Figure 1. Internal block diagram
AM09320v2
Internal block diagram and pin configuration STGIPS10K60T-H
4/19 DocID024167 Rev 5
Figure 2. Pin layout (bottom view)
Table 2. Pin description
Pin n° Symbol Description
1OUT
U
High side reference output for U phase
2V
boot U
Bootstrap voltage for U phase
3LIN
U
Low side logic input for U phase
4HIN
U
High side logic input for U phase
5V
CC
Low voltage power supply
6OUT
V
High side reference output for V phase
7V
boot V
Bootstrap voltage for V phase
8 GND Ground
9LIN
V
Low side logic input for V phase
10 HIN
V
High side logic input for V phase
11 OUT
W
High side reference output for W phase
12 V
boot W
Bootstrap voltage for W phase
13 LIN
W
Low side logic input for W phase
14 HIN
W
High side logic input for W phase
15 SD Shut down logic input (active low)
16 T1 NTC thermistor terminal
17 N
W
Negative DC input for W phase
18 W W phase output
19 P Positive D C input
20 N
V
Negative DC input for V phase
21 V V phase output
22 P Positive D C input
23 N
U
Negative DC input for U phase
24 U U phase output
25 P Positive D C input
0$5.,1*$5($
DocID024167 Rev 5 5/19
STGIPS10K60T-H Electrical ratings
19
2 Electrical ratings
2.1 Absolute maximum ratings
Table 3. Inverter part
Symbol Parameter Value Unit
V
PN
Supply voltage applied between P - N
U
, N
V
, N
W
450 V
V
PN(surge)
Supply voltage (surge) applied between P - N
U
,
N
V
, N
W
500 V
V
CES
Each IGBT collector emitter voltage (V
IN(1)
= 0)
1. Applied between
HIN
i
, LI N
i and
G
ND
for i = U, V, W.
600 V
± I
C(2)
2. Calculated according to the iterative formula:
Each IGBT continuous collector current at
T
C
= 25°C 10 A
± I
CP (3)
3. Pulse width limited by max junction temperature.
Each IGBT pulsed collector current 20 A
P
TOT
Each IGBT total dissipation at T
C
= 25°C 33 W
t
scw
Short-circuit withstand time, V
CE
= 0.5 V
(BR)CES
T
j
= 125 °C, V
CC
= V
boot
= 15 V, V
IN (1)
= 5 V 5µs
Table 4. Control part
Symbol Parameter Min. Max. Unit
V
OUT
Output voltage applied between OUT
U
, OUT
V
,
OUT
W
- GND V
boot
- 21 V
boot
+ 0.3 V
V
CC
Low voltage power supply - 0.3 21 V
V
boot
Bootstrap voltage - 0.3 620 V
V
IN
Logic i nput volt age applie d between HIN, LI N and
GND - 0.3 15 V
V
SD
Open drain voltage - 0.3 15 V
dV
OUT
/dt Allowed output slew rate 50 V/ns
Table 5. Total system
Symbol Parameter Value Unit
V
ISO
Isolation withstand voltage applied between each
pin and heatsink plate (AC voltage, t = 60 sec.) 2500 V
T
C
Module case operation temperature -40 to 125 °C
T
J
Power chips operating junction temperature -40 to 150 °C
I
C
T
C
() T
jmax()
T
C
–
R
thj c–
V
CE sat()max()
T
jmax()
I
C
T
C
(),()×
-------------------------------------------------------------------------------------------------------=
Electrical ratings STGIPS10K60T-H
6/19 DocID024167 Rev 5
2.2 Thermal data
Table 6. Thermal data
Symbol Parameter Value Unit
R
thJC
Thermal resistance junction-case single IGBT max. 3.8 °C/W
Thermal resistance junction-case single diode max. 5.5 °C/W
DocID024167 Rev 5 7/19
STGIPS1 0K60 T -H Electri cal character istics
19
3 Electrical characteristics
T
J
= 25 °C unless otherwise specified.
Note: t
ON
and t
OFF
include the propagation delay time of the internal drive. t
C(ON)
and t
C(OFF)
are
the switching time of IGBT itself under the internally given gate driving condition.
Table 7. Inverter part
Sym bol Parameter Test conditions Value Unit
Min. Typ. Max.
V
CE(sat)
Collector-emitter
saturation vo ltage
V
CC
= V
boot
= 15 V,
V
IN(1)
= 5 V,
I
C
= 5 A
1. Applied between HIN
i
, LIN
i
and GND for i = U, V, W.
-2.12.5
V
V
CC
= V
boot
= 15 V,
V
IN(1)
= 5 V,
I
C
= 5 A, T
j
= 125 °C -1.8
I
CES
Collector-cut off current
(V
IN(1) = 0 “logic state”)
V
CE
= 550 V
V
CC
= V
boot
= 15 V -150µA
V
F
Diode forward voltage (V
IN(1)
= 0 “logic state”)
, I
C
=
5 A -1.9V
Inductive load switching time and energy
t
on
Tu rn-on time
V
DD
= 300 V,
V
CC
= V
boot
= 15 V,
V
IN(1)
= 0 ÷ 5 V
I
C
= 5 A (see Figure 4)
-320-
ns
t
c(on)
Crossover time (on) - 70 -
t
off
Turn-off tim e - 430 -
t
c(off)
Crossover time (off) - 135 -
t
rr
Reverse recovery time - 130 -
E
on
Turn-on switching losses - 65 - µJ
E
off
Turn-off swit ch ing loss es - 75 -
Electrical characteristics STGIPS10K60T-H
8/19 DocID024167 Rev 5
Figure 3. Switching time test circuit
Note: Figure 4 "Switching time definition" refers to HIN, LIN inputs (active high).
Figure 4. Switching time definition
AM06019v2
V
CE
I
C
I
C
V
IN
t
ON
t
C(ON)
VIN(ON) 10% IC 90% IC 10% VCE
(a) turn-on (b) turn-off
t
rr
100% IC 100% IC
V
IN
V
CE
t
OFF
t
C(OFF)
VIN(OFF) 10% VCE 10% IC
AM09223V1
DocID024167 Rev 5 9/19
STGIPS1 0K60 T -H Electri cal character istics
19
3.1 Control part
Table 8. Low voltage power supply (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC_hys
V
cc
UV hysteresis 1.2 1.5 1.8 V
V
CC_thON
V
cc
UV turn ON threshold 11.5 12 12.5 V
V
CC_thOFF
V
cc
UV turn OFF threshold 10 10.5 11 V
I
qccu
Undervoltage quiescent
supply current
V
CC
= 10 V
SD = 5 V; LIN = 0 V;
H
IN
= 0 450 µA
I
qcc
Quiescent current V
CC
= 15 V
SD = 5 V; LIN = 0 V
H
IN
= 0 3.5 mA
Table 9. Bootstrapped voltage (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
BS_hys
V
BS
UV
hysteresis 1.2 1.5 1.8 V
V
BS_thON
V
BS
UV
turn ON threshold 11.1 11.5 12.1 V
V
BS_thOFF
V
BS
UV
turn OFF threshold 9.8 10 10.6 V
I
QBSU
Undervoltage V
BS
quiescent
current
V
BS
= 9 V
SD = 5 V; LIN = 0
HIN = 5 V 70 110 µA
I
QBS
V
BS
quiescent curr ent V
BS
= 15 V
SD = 5 V; LIN = 0
HIN = 5 V 200 300 µA
R
DS(on)
Boot st rap driver on resistance LVG ON 120 W
Table 10. Logic inputs (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
il
Low logic level voltage 0.8 1.1 V
V
ih
High logic level voltage 1.9 2.25 V
I
HINh
HIN logic “1” input bias current HIN = 15 V 20 40 100 µA
I
HINl
HIN logic “0” input bias current HIN = 0 V 1 µA
I
LINh
LIN logic “1” input bias current LIN = 15 V 20 40 100 µA
I
LINl
LIN logic “0” input bias current LIN = 0 V 1 µA
I
SDh
SD logic “0” input bias current SD = 15 V 30 120 300 µA
I
SDl
SD logic “1” input bias current SD = 0 V 3 µA
Dt Dead time see Figure 9 600 ns
Electrical characteristics STGIPS10K60T-H
10/19 DocID024167 Rev 5
Note: X: don’t care
Table 11. Shut down characteristics (V
CC
= 15 V unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
sd
Shut down to high / low side
driver propagation delay V
OUT
= 0, V
boot
= V
CC
,
V
IN
= 0 to 3.3 V 50 125 200 ns
Table 12. Truth table
Condition Logic input (V
I
) Output
SD LIN HIN LVG HVG
Shutdown enable
half-brid ge tri-s tate LXXLL
Interlocking
half-brid ge tri-s tate HHHLL
0 ‘’logic state”
half-brid ge tri-s tate HLLLL
1 “logic state”
low side direct driving HHLHL
1 “logic state”
high side direct driving HLHLH
Figure 5. Maximum I
C(RMS)
current vs. switching
frequency
(1)
Figure 6. Maximum I
C(RMS)
current vs. f
SINE (1)
1. Simulated curves refer to typical IGBT parameters and maximum R
thJC
.
V
PN
= 300 V, Modulation index = 0.8,
PF = 0.6, T
j
= 150 °C, f
SINE
= 60 Hz
TC = 100°C
TC = 80°C
IC (RMS)
66fsw(kHz)
(A)
410
8
10
12
12
81416
AM03801v1
fsw = 12 kHz
fsw = 20 kHz
fsw = 16 kHz
V
PN
= 300 V, Modulation index = 0.8,
PF = 0.6, T
j
= 150 °C, T
c
= 100 °C
IC (RMS)
5
4
fSINE(Hz)
(A)
110
6
7
8
AM03802v1
DocID024167 Rev 5 11/19
STGIPS1 0K60 T -H Electri cal character istics
19
3.1.1 NTC thermistor
Equation 1: resistance variation vs. temperature
Where T are temperatures in Kelvins
Figure 7. NTC resistance vs. temperature
Figure 8. NTC resistance vs. temperature (zoom)
Table 13. NTC thermistor
Symbol Parameter Test conditions Min. Typ. Max. Unit.
R
25
Resistance T
= 25°C 4.7 kΩ
R
125
Resistance T
= 125°C 160 Ω
B B-constant T
= 25°C to 85°C 3950 K
T Operating temperature -40 150 °C
RT() R
25
e
B1
T
--- 1
298
----------–
⋅=
AM16299v1
0
20
40
60
80
100
120
140
160
180
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 (°C)
NTC [kΩ]
MIN.
MAX.
CENTER
AM17098v1
(°C)
NTC [kΩ
]
0.000
0.200
0.400
0.600
0.800
1.000
1.200
1.400
1.600
1.800
50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 135 140 145
MIN.
MAX.
CENTER
Electrical characteristics STGIPS10K60T-H
12/19 DocID024167 Rev 5
3.2 Waveform definitions
Figure 9. Dead time and interlocking waveform definitions
INTERLOCKING
INTERLOCKING
INTERLOCKING
INTERLOCKING
G
DocID024167 Rev 5 13/19
STGIPS10K60T-H Applications information
19
4 Applications information
Figure 10. Typical application circuit
AM09321v2
Applications information STGIPS10K60T-H
14/19 DocID024167 Rev 5
4.1 Recommendations
•Input signals HIN, LIN are active high logic. A 375 kΩ (typ.) pull down re sistor is built -in
for each input. If an external RC filter is used, for noise immunity, pay attention to the
variation of the input signal level.
•To prevent the input signals oscillation, the wiring of each input should be as short as
possible.
•By integrating an application specific type HVIC inside the module, direct coupling to
MCU terminals without any opto-coupler is possible.
•Each capacitor should be located as nearby the pins of IPM as possible.
•Low inductance shunt resistors should be used for phase leg current sensing.
•Elec tr ol yt i c bu s c apacitor s sh ou l d b e mo un t ed as cl os e t o th e mo dul e b u s t erm i na ls as
possible. Additional high frequency ceramic capacitor mounted close to the module
pins will further improve performance.
•The SD signal should be pulled up to 5 V / 3.3 V with an external resistor.
For furthe r de tails refer to AN3338.
Table 14. Recommended operating conditions
Symbol Parameter Conditions Value Unit
Min. Typ. Max.
V
PN
Supply voltage Applied between P-Nu, Nv, Nw 300 400 V
V
CC
Control supply voltage Applied between V
CC
-GND 13.5 15 18 V
V
BS
High side bias voltage Applied between V
BOOTi
-OUT
i
for
i = U, V, W 13 18 V
t
dead
Blanking tim e to
prevent arm-short For each input signal 1 µs
f
PWM
Pwm input signal -40°C < T
c
< 100°C
-40°C < T
j
< 125°C 20 kHz
T
C
Case operation
temperature 100 °C
DocID024167 Rev 5 15/19
STGIPS10K60T-H Package information
19
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.
5.1 SDIP-25L package information
Figure 11. SDIP-25L package outline
B
Package information STGIPS10K60T-H
16/19 DocID024167 Rev 5
Table 15. SDIP-25L mechanical data
Dim. mm
Min. Typ. Max.
A 43.90 44.40 44.90
A1 1.15 1.35 1.55
A2 1.40 1.60 1.80
A3 38.90 39.40 39.90
B 21.50 22.00 22.50
B1 11.25 11.85 12.45
B2 24.83 25.23 25.63
C 5.00 5.40 6.00
C1 6.50 7.00 7.50
C2 11.20 11.70 12.20
C3 2.90 3.00 3.10
e 2.15 2.35 2.55
e1 3.40 3.60 3.80
e2 4.50 4.70 4.90
e3 6.30 6.50 6.70
D 33.30
D1 5.55
E11.20
E1 1.40
F 0.85 1.00 1.15
F1 0.35 0.50 0.65
R 1.55 1.75 1.95
T 0.45 0.55 0.65
V0° 6°
DocID024167 Rev 5 17/19
STGIPS10K60T-H Package information
19
5.2 Packing information
Figure 12. SDIP-25L packing information
AM10488v1
Base quantity: 11 pcs
Bulk quantity: 132 pcs
8123127_E
Revision history STGIPS10K60T-H
18/19 DocID024167 Rev 5
6 Revision history
Table 16. Document revision histor y
Date Revision Changes
18-Jan-2013 1Initial rele as e.
15-Feb-2013 2 Added Inductive load typical value Table 7 on page 7 and
Fig ure 8 on page 11.
Modified Figure 3 on page 8 and Figure 7 on page 11.
05-Mar-2013 3 Modified Figure 7 and Figure 8 on page 11.
15-Apr-2014 4 Document status changed from preliminary to production data.
Updated Figure 2: Pin layout (bottom view).
14-Apr-2015 5 Text edits and formatting changes throughout document
Updated Figure 2: Pin layout (bottom view)
Updated Section 5: Package information
DocID024167 Rev 5 19/19
STGIPS10K60T-H
19
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