© Semiconductor Components Industries, LLC, 2006
September, 2006 − Rev. 3 1Publication Order Number:
SA575/D
SA575
Low Voltage Compandor
The SA575 is a precision dual gain control circuit designed for low
voltage applications. The SA575’s channel 1 is an expandor, while
channel 2 can be configured either for expandor, compressor, or
automatic level controller (ALC) application.
Features
Operating Voltage Range from 3.0 V to 7.0 V
Reference Voltage of 100 mVRMS = 0 dB
One Dedicated Summing Op Amp Per Channel and Two Extra
Uncommitted Op Amps
600 Drive Capability
Single or Split Supply Operation
Wide Input/Output Swing Capability
Pb−Free Packages are Available*
Applications
Portable Communications
Cellular Radio
Cordless Telephone
Consumer Audio
Portable Broadcast Mixers
Wireless Microphones
Modems
Electric Organs
Hearing Aids
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
ORDERING INFORMATION
PIN CONNECTIONS
+VIN1
-VIN1
VOUT1
RECT. IN1
CRECT1
COMP. IN1
VREF
GND
20 VCC
19 +VIN2
18 -VIN2
17 VOUT2
16 RECT.IN2
15 CRECT2
14 SUM OUT2
13 COMP.IN2
12 SUM NODE 2
11 GAIN CELL IN2
SUM OUT 1
D* and DTB Packages
GAIN CELL IN1
1
2
3
4
5
6
7
8
9
10
*Available in large SOL package only.
SOIC−20 WB
D SUFFIX
CASE 751D
20
1
TSSOP−20
DTB SUFFIX
CASE 948E
1
20
PDIP−20
N SUFFIX
CASE 738
1
20
See general marking information in the device marking
section on page 13 of this data sheet.
DEVICE MARKING INFORMATION
SA575
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2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
G
G
VREF
+
+
OP AMP
OP AMP
VCC
575
4.7F
10F
0.1F
VCC +5V
10F
2.2F10F
CRECT
1F
VIN
VREF
VOUT
CRECT
2.2F
10F
VIN +
+
+
+
+
++
+
+
VOUT
GND
GND GND
GND
GND GND
VREF
10F
Figure 1. Block Diagram and Test Circuit
3.8k
10k
10k
3.8k
10k
10k
10k
30k
R8
30k
C3
C6
C15
C14
R13
C11
C10
R7
C8
PIN FUNCTION DESCRIPTION
Pin Symbol Description
1 +VIN1 Non−Inverted Input 1
2 −VIN1 Inverted Input 1
3 VOUT Output
4RECT. IN1 Rectifier 1 Input
5 CRECT1 External Capacitor Pinout for Rectifier 1
6SUM OUT1 Summation Output 1
7COMP. IN1 Compensator Pin
8 VREF Voltage Reference
9GAIN CELL IN1 Variable Gain Cell Input 1
10 GND Ground
11 GAIN CELL IN2 Variable Gain Cell Input 2
12 SUM NODE 2 Summation Node 2
13 COMP. IN2 Compensator Pin
14 SUM OUT2 Summation Output 2
15 CRECT2 External Capacitor Pinout for Rectifier 2
16 RECT. IN2 Rectifier 2 Input
17 VOUT2 Output 2
18 −VIN2 Inverted Input 2
19 +VIN2 Non−Inverted Input 2
20 VCC Positive Power Supply
SA575
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3
MAXIMUM RATINGS
Rating Symbol Value Unit
Single Supply Voltage VCC −0.3 to 8.0 V
Voltage Applied to Any Other Pin VIN −0.3 to (VCC + 0.3) V
Operating Ambient Temperature Range TA-40 to +85 °C
Operating Junction Temperature TJ150 °C
Storage Temperature Range TSTG 150 °C
Thermal Impedance SOIC
TSSOP
PDIP
JA 87
124
70
°C/W
Maximum Power Dissipation SOIC
TSSOP
PDIP
PD1116
1068
1344
mW
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
DC ELECTRICAL CHARACTERISTICS Typical values are at T A = 25°C. Minimum and Maximum values are for the full operating
temperature range: -40 to +85°C for SA575, except SSOP package is tested at +25°C only. VCC = 5.0 V, unless otherwise stated. Both
channels are tested in the Expandor mode (see Test Circuit).
Characteristic Symbol Test Conditions Min Typ Max Unit
FOR COMPANDOR, INCLUDING SUMMING AMPLIFIER
Supply Voltage (Note 1) VCC 3.0 5.0 7.0 V
Supply Current ICC No Signal 3.0 4.2 5.5 mA
Reference Voltage (Note 2) VREF VCC = 5.0 V 2.4 2.5 2.6 V
Summing Amp Output Load RL 10 k
Total Harmonic Distortion THD 1.0 kHz, 0 dB, BW = 3.5 kHz 0.12 1.5 %
Output Voltage Noise ENO BW = 20 kHz, RS = 0 6.0 30 V
Unity Gain Level 0dB 1.0 kHz -1.5 1.5 dB
Output Voltage Offset VOS No Signal -150 150 mV
Output DC Shift No Signal to 0 dB -100 100 mV
Gain Cell Input = 0 dB, 1.0 kHz
Rectifier Input = 6.0 dB, 1.0 kHz -1.0 1.0 dB
T racking Error Relative to 0 dB Gain Cell Input = 0 dB, 1.0 kHz
Rectifier Input = -30 dB, 1.0 kHz -1.0 1.0 dB
Crosstalk 1.0 kHz, 0 dB, CREF = 220 F -80 -65 dB
FOR OPERATIONAL AMPLIFIER
Output Swing VORL = 10 kVCC-0.4 VCC V
Output Load RL1.0 kHz 600
Input Common-Mode Range CMR 0 VCC V
Common-Mode Rejection Ratio CMRR 60 80 dB
Input Bias Current IBVIN = 0.5 V to 4.5 V -1.0 1.0 A
Input Offset Voltage VOS 3.0 mV
Open-Loop Gain AVOL RL = 10 k 80 dB
Slew Rate SR Unity Gain 1.0 V/s
Bandwidth GBW Unity Gain 3.0 MHz
Input Voltage Noise ENI BW = 20 kHz 2.5 V
Power Supply Rejection Ratio PSRR 1.0 kHz, 250 mV 60 dB
1. Operation down to VCC = 2.0 V is possible, but performance is reduced. See curves in Figures 6 and 7.
2. Reference voltage, VREF, is typically at 1/2 VCC.
SA575
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4
Functional Description
This section describes the basic subsystems and
applications of the SA575 Compandor. More theory of
operation on compandors can be found in AND8159 and
AND8160. The typical applications of the SA575 low
voltage compandor in an Expandor (1:2), Compressor (2:1)
and Automatic Level Control (ALC) function are
explained. These three circuit configurations are shown in
Figures 2, 3, and 4 respectively.
The SA575 has two channels for a complete companding
system. The left channel, A, can be configured as a 1:2
Expandor while the right channel, B, can be configured as
either a 2:1 Compressor, a 1:2 Expandor or an ALC. Each
channel consists of the basic companding building blocks
of rectifier cell, variable gain cell, summing amplifier
and VREF cell. In addition, the SA575 has two additional
high performance uncommitted op amps which can be
utilized for application such as filtering, pre-emphasis/
de-emphasis or buffering.
Figure 5 shows the complete schematic for the
applications demo board. Channel A is configured as an
expandor while channel B is configured so that it can be
used either as a compressor or as an ALC circuit. The
switch, S1, toggles the circuit between compressor and
ALC mode. Jumpers J1 and J2 can be used to either include
the additional op amps for signal conditioning or exclude
them from the signal path. Bread boarding space is
provided for R1, R2, C1, C2, R10, R11, C10 and C11 so that
the response can be tailored for each individual need. The
components as specified are suitable for the complete
audio spectrum from 20 Hz to 20 kHz.
The most common configuration is as a unity gain
non-inverting bu ffer where R1, C1, C2, R10, C10 and C11 are
eliminated and R2 and R11 are shorted. Capacitors C3, C5,
C8, and C12 are for DC blocking. In systems where the
inputs and outputs are AC coupled, these capacitors and
resistors can be eliminated. Capacitors C4 and C9 are for
setting the attack and release time constant.
C6 is for decoupling and stabilizing the voltage reference
circuit. The value of C6 should be such that it will offer a
very low impedance to the lowest frequencies of interest.
Too small a capacitor will allow supply ripple to modulate
the audio path. The better filtered the power supply, the
smaller this capacitor can be. R12 provides DC reference
voltage to the amplifier of channel B. R6 and R7 provide a
DC feedback path for the summing amp of channel B,
while C 7 is a short-circuit to ground for signals. C14 and C15
are for power supply decoupling. C14 can also be
eliminated if the power supply is well regulated with very
low noise and ripple.
Demonstrated Performance
The applications demo board was built and tested for a
frequency range of 20 Hz to 20 kHz with the component
values as shown in Figure 5 and VCC = 5.0 V. In the
expandor mode, the typical input dynamic range was from
-34 dB to +12 dB where 0 dB is equal to 100 mVRMS. The
typical unity gain level measured at 0 dB @ 1.0 kHz input
was "0.5 dB and the typical tracking error was "0.1 dB
for input range of -30 to +10 dB.
In the compressor mode, the typical input dynamic range
was from -42 dB to "18 dB with a tracking error +0.1 dB
and the typical unity gain level was "0.5 dB.
In the ALC mode, the typical input dynamic range was
from -42 dB to +8.0 dB with typical output deviation of
"0.2 dB about the nominal output of 0 dB. For input
greater than +9.0 dB in ALC configuration, the summing
amplifier sometimes exhibits high frequency oscillations.
There are several solutions to this problem. The first is to
lower the values of R6 and R7 to 20 k each. The second
is to add a current limiting resistor in series with C12 at
Pin 13. The third is to add a compensating capacitor of
about 22 t o 3 0 p F between the input and output of summing
amplifier (Pins 12 and 14). With any one of the above
recommendations, the typical ALC mode input range
increased to +18 dB yielding a dynamic range of over
60 dB.
SA575
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5
Expandor
The typical expandor configuration is shown in Figure 2.
The variable gain cell and the rectifier cell are in the signal
input path. The VREF is always 1/2 VCC to provide the
maximum headroom without clipping. The 0 dB ref is
100 mVRMS. The input is AC coupled through C5, and the
output is AC coupled through C3. If in a system the inputs
and outputs are AC coupled, then C3 and C5 can be
eliminated, thus requiring only one external component,
C4. The variable gain cell and rectifier cell are DC coupled
so any offset voltage between Pins 4 and 9 will cause small
offset error current in the rectifier cell. This will affect the
accuracy of the gain cell. This can be improved by using an
extra capacitor from the input to Pin 4 and eliminating the
DC connection between Pins 4 and 9.
The expandor gain expression and the attack and release
time constant is given by Equation 1 and Equation 2,
respectively.
(eq. 1)
4VIN(avg)
3.8 k x 100 A
Expandor gain =
where VIN(avg) = 0.95VIN(RMS)
2
(eq. 2)
R = A = 10 k x CRECT = 10 k x C4
2.2F
10F
10F
VREF
G
EXP IN
EXP OUT
9, 11
4, 16
5, 15
7, 13
6, 14
8
Figure 2. Typical Expandor Configuration
10k
3.8k
10k
C5
C4
C3
SA575
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6
Compressor
The typical compressor configuration is shown in
Figure 3. In this mode, the rectifier cell and variable gain
cell are in the feedback path. R6 and R7 provide the DC
feedback to the summing amplifier. The input is AC
coupled through C12 and output is AC coupled through C8.
In a system with inputs and outputs AC coupled, C8 and C12
could be eliminated and only R6, R7, C7, and C13 would be
required. If the external components R6, R7 and C7 are
eliminated, then the output of the summing amplifier will
motor-boat in absence of signals or at extremely low
signals. This is because there is no DC feedback path from
the output to input. In the presence of an AC signal this
phenomenon is not observed and the circuit will appear to
function properly.
The compressor gain expression and the attack and
release time constant is given by Equation 3 and
Equation 4, respectively.
(eq. 3)
4VIN(avg)
3.8 k x 100 A
where VIN(avg) = 0.95VIN(RMS)
1/2
Compressor gain =
(eq. 4)
R = A = 10 k x CRECT = 10 k x C4
2.2F
4.7F
10F
10F
1F
VREF
G
C7
812
14
COMP IN COMP OUT
11
16
15
13
Figure 3. Typical Compressor Configuration
10k
10k
3.8k
30k30k
C12
R6R7
C8
C13
C9
SA575
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7
Automatic Level Control
The typical Automatic Level Control circuit
configuration is shown in Figure 4. It can be seen that it is
quite similar to the compressor schematic except that the
input to the rectifier cell is from the input path and not from
the feedback path. The input is AC coupled through C12
and C13 and the output is AC coupled through C8. Once
again, as in the previous cases, if the system input and
output signals are already AC coupled, then C12, C13 and
C8 could be eliminated. Concerning the compressor,
removing R6, R7 and C7 will cause motor-boating in
absence of signals. CCOMP is necessary to stabilize the
summing amplifier at higher input levels. This circuit
provides an input dynamic range greater than 60 dB with
the output within "0.5 dB typical. The necessary design
expressions are given by Equation 5 and Equation 6,
respectively.
(eq. 5)
4VIN(avg)
3.8 k x 100 A
ALC gain =
(eq. 6)
R = A = 10 k x CRECT = 10 k x C9
2.2F
10F
10F
VREF
G
1F
4.7F
ALC IN ALC OUT
812
13
16
15
11
14
C COMP
22pF
C7
Figure 4. Typical ALC Configuration
10k
3.8k
10k
30k30k
C12
C13
R6R7
C8
C9
SA575
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8
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
G
G
VREF
+
+
OP AMP
OP AMP
VCC
575
10F
4.7F
10F
VREF
VREF
10F
0.1F
VCC -5V
47F
2.2F
10F
1F
10F
EXP
OUT
EXP
IN
GND
COMP/
ALC
IN
COMP/
ALC
OUT
ALC
COMP
2.2F
Figure 5. SA575 Low Voltage Expandor/Compressor/ALC Demo Board
3.8k
10k
10k
10k
10k
3.8k
R12
10k
R7
30k
30k
R1
C1C2R2
C3J1
C4
C5
C6
C15
C14
C12
R10
C10
R11 C11
J2
C13
C9
S1
C8
C7
R6
SA575
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9
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
−0.1
−0.2
−0.3
−0.4
−0.5
−0.6
−0.7
−0.8
−0.9
−1.0−50 −25 0 25 50 75 100
UNITY GAIN ERROR (dB)
TEMPERATURE (°C)
Figure 6. Unity Gain Error vs. Temperature and VCC
4.4
−50 −25 0 25 50 75 100
I
TEMPERATURE (°C)
4.2
4.0
3.8
3.6
3.4
3.2
3.0
CC (mA)
VCC 7V
VCC 5V
VCC 3V
VCC 2V
Figure 7. I CC vs. Temperature and VCC
VCC 7V
VCC 5V
VCC 3V
VCC 2V
SA575
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TYPICAL PERFORMANCE CHARACTERISTICS
10 100 1000 10000 30000
8
6
4
2
0
−2
−4
−6
−8
−10
−12
−14
−16
−18
−20
−22
INPUT
OUTPUT
GENERAL DIAGRAM
VCC = 5V
10F
G
4.7F
REC
SUM
(20−20kHz)
OUTPUT LEVEL (dB)
FREQUENCY (Hz)
10dB IN
0dB IN
-40dB IN
Figure 8. Compressor Output Frequency Response
SA575
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11
TYPICAL PERFORMANCE CHARACTERISTICS
10 100 1000 10000 30000
8
6
4
2
0
−2
−4
−6
−8
−10
−12
−14
−16
−18
−20
−22
INPUT
OUTPUT
GENERAL DIAGRAM
VCC = 5V
10FG
4.7F
REC
SUM
(20−20kHz)
OUTPUT LEVEL (dB)
FREQUENCY (Hz)
2.5dB IN
0dB IN
-10dB IN
Figure 9. Expandor Output Frequency Response
SA575
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12
+10dB
100mV
0dB
−10dB
−20dB
−30dB
+5dB
0dB
−5dB
−10dB
−15dB
+10dB
100mV
0dB
−10dB
−20dB
−30dB
COMPRESSION EXPANSION
COMPRESSOR IN EXPANDOR OUT
}
}
−40dB
−50dB
−20dB
−25dB
−40dB
−50dB
Figure 10. The Companding Function
SA575
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13
ORDERING INFORMATION
Device Package Temperature Range Shipping
SA575D SOIC−20 WB −40 to +85°C38 Units / Rail
SA575DR2 SOIC−20 WB −40 to +85°C1000 / Tape & Reel
SA575DR2G SOIC−20 WB
(Pb−Free) −40 to +85°C1000 / Tape & Reel
SA575DTB TSSOP−20* −40 to +85°C75 Units / Rail
SA575DTBR2 TSSOP−20* −40 to +85°C2500 Tape & Reel
SA575N PDIP−20 −40 to +85°C18 Units / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MARKING DIAGRAMS
SOIC−20 WB
D SUFFIX
CASE 751D
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = W ork Week
20
1
SA575D
AWLYYWW
TSSOP−20
DTB SUFFIX
CASE 948E
SA
575
ALYW
PDIP−20
N SUFFIX
CASE 738
SA575N
AWLYYWW
SA575
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14
PACKAGE DIMENSIONS
20
1
11
10
B20X
H10X
C
L
18X A1
A
SEATING
PLANE
q
hX 45_
E
D
M
0.25 M
B
M
0.25 S
AS
B
T
eT
B
A
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
B0.35 0.49
C0.23 0.32
D12.65 12.95
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
q0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
__
SO−20 W B
CASE 751D−05
ISSUE G
SA575
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15
PACKAGE DIMENSIONS
TSSOP−20
DTB SUFFIX
CASE 948E−02
ISSUE B
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B4.30 4.50 0.169 0.177
C1.20 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.27 0.37 0.011 0.015
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER
SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
110
1120
PIN 1
IDENT
A
B
−T−
0.100 (0.004)
C
DGH
SECTION N−N
K
K1
JJ1
N
N
M
F
−W−
SEATING
PLANE
−V−
−U−
S
U
M
0.10 (0.004) V S
T
20X REFK
L
L/22X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
−−− −−−
S
U0.15 (0.006) T
SA575
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16
PACKAGE DIMENSIONS
PDIP−20
N SUFFIX
CASE 738−03
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
M
L
J20 PL
M
B
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A25.66 27.171.010 1.070
B6.10 6.600.240 0.260
C3.81 4.570.150 0.180
D0.39 0.550.015 0.022
G2.54 BSC0.100 BSC
J0.21 0.380.008 0.015
K2.80 3.550.110 0.140
L7.62 BSC0.300 BSC
M0 15 0 15
N0.51 1.010.020 0.040
____
E
1.27 1.770.050 0.070
1
11
10
20
−A−
SEATING
PLANE
K
N
FG
D20 PL
−T−
M
A
M
0.25 (0.010) T
E
B
C
F
1.27 BSC0.050 BSC
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
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or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
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N. American Technical Support: 800−282−9855 Toll Free
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Phone: 81−3−5773−3850
SA575/D
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Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative