Copyright © RDA Microelectronics Inc. 2009. All rights are reserved.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
RDA5870P
SINGLE CHIP FOR BLUETOOTH & FM RADIO TUNER
Rev.1.0–03.2011
1 General Description
RDA5870P integrates industry-lead Bluetooth and
FM radio tuner into one chip and is optimized for
mobile applications. Bluetooth and FM can work
simultaneously and independently, with low power
consumption levels target to battery powered
devices. For the highest integration level, the
required board space has been minimized and
customer cost has been reduced. Manufacturers
can easily and fast integrate RDA5870P on their
product to enable a rapid time to market.
RDA5870P uses CMOS process with a compact
6*6mm 40-pin QFN package.
1.1 Bluetooth Features
z CMOS single-chip fully-integrated radio and
baseband
z Compliant with Bluetooth 2.1 + EDR specification
z Bluetooth Piconet and Scatternet support
z ARM7-based microprocessor with on-chip ROM
and RAM
z Meet class 2 and class 3 transmitting power
requirement, support class1 operation with external
power amplifier
z Provides +10dbm transmitting power
z NZIF receiver with -90dBm sensitivity
z Battery power supply directly with internal LDO
z Support DCXO with internal oscillator circuit
z Up-to 4Mbps high speed UART HCI support
z Support AFH
z Support 3-wire and 2-wire WIFI Co-existence
handshake signals
z Low power consumption
z Minimum external component
GND PAD
RDA5870P
40 Pins
31323334
35
3637383940
1
2
3
4
5AGPIO0
NC
NC
UART_TX
UART_RX
I2C_SCL
I2C_SDA
GND
FM_IP
FM_OUTL
FM_OUTR
NC
GPIO2
PCM_CLK
PCM_SYNC
PCM_DOUT
PCM_DIN
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
20191817161514131211
VOUT12
NC
XIN
XIN_32K
VBAT
NC
RF
NC
NC
HOST_WAKE
NC
NC
NC
FM_IN
AGPIO1
VIO
NC
LDO_ON
NC
XEN_OUT
NC
NC
NC
Figure1-1. RDA5870P Top Vie w
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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1.2 FM Features
z CMOS single-chip fully-integrated FM tuner
z Low power consumption
¾ Total current consumption lower than 20mA at
3.0V power supply
z Support worldwide frequency band
¾ 50 -115 MHz
z Digital low-IF tuner
¾ Image-reject down-converter
¾ High performance A/D converter
¾ IF selectivity performed internally
z Fully integrated digital frequency synthesizer
¾ Fully integrated on-chip RF and IF VCO
¾ Fully integrated on-chip loop filter
z Autonomous search tuning
z Support 32.768KHz crystal oscillator
z Digital auto gain control (AGC) Digital adaptive
noise cancellation
¾ Mono/stereo switch
¾ Soft mute
¾ High cut
1.3 Applications
z Mobile handset
z MP3,MP4 and PMP
z PDA
z Cordless phone
z Programmable de-emphasis (50/75 μs)
z Receive signal strength indicator (RSSI)
z Bass boost
z Volume control
z Line-level analog output voltage
z 32.768 KHz,26M
Reference clock
z I2C control bus interface
z Directly support 32 resistance loading
z Integrated LDO regulator
¾ 1.8 to 5.5 V operation voltage
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 3 of 22
2 Table of Contents
1 General Description .................................................................................................................................... 1
1.1 Bluetooth Features ............................................................................................................................. 1
1.2 FM Features........................................................................................................................................ 2
1.3 Applications ........................................................................................................................................ 2
2 Table of Contents ......................................................................................................................................... 3
3 Bluetooth Section Functional Description ................................................................................................. 4
4 Bluetooth Section Features ......................................................................................................................... 5
5 Bluetooth Section Electrical Characteristics ............................................................................................ 6
6 Bluetooth Section Radio Characteristics ................................................................................................... 7
7 FM Section Functional Description ......................................................................................................... 10
8 FM Section Electrical Characteristics ..................................................................................................... 12
9 FM Section Receiver Characteristics ...................................................................................................... 13
10 Pins Description ......................................................................................................................................... 14
11 Application Circuit .................................................................................................................................... 16
12 Package Physical Dimension .................................................................................................................... 17
13 PCB Land Pattern ..................................................................................................................................... 18
14 Change List ................................................................................................................................................ 21
15 Contact Information ................................................................................................................................. 22
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 4 of 22
3 Bluetooth Section Functional Description
ARM
ROM
RAM
UART
I2C
OSC
32K/LPO
AHB
TIMER
APB
BRIDGE
APB
GPIO
SCU
DMA
VIC
BB
TRAP SPI2
Modem
ROM
RAMPOR
DC/DC
VBAT
I2C_SDA
I2C_SCL
UART_TX
UART_RX
LDO
FM_IP
LDO_ON
XIN_32K
XTAL
XIN
RF
FM
FM_IN
GPIO_FM1
GPIO_FM2
GPIO_FM3
FM_OUTL
FM_OUTR
PLL
BT_RF
x
x
A
A
PLLΦ
DEnvelon
Figure3-1. RDA5870P Bluetooth Block Diagram
RDA5870P is designed for use in UART HCI with handset chipsets. As shown in Figure3-1, RDA5870P
integrates radio unit, baseband core, ARM7 core and memory which provides a complete lower Bluetooth
protocol stack including the LC, LM and HCI interface.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA. Page 5 of 22
4 Bluetooth Section Features
Radio
Build-in TX/RX switch
Fully integrated synthesizer without any external component
Support DCXO or external reference clock direct input
Class2 and class3 transmit output power supported and over 30dB dynamic control range
Supports π/4 DQPSK and 8DPSK modulation
High performance in receiver sensitivity and over 80dB dynamic range
Integrated channel filter
Auxiliary features
On-chip regulator to support battery power supply directly
Power management support low power mode
Support share handset system reference clock
Support 3-wire wifi cooperation handshake protocol
Support external class1 PA and antenna switch
Baseband
Internal RAM allows fully speed data transfer, mixed voice and data, and fully piconet operation
Logic for forward error correction, header error control, access code correlation, CRC,
demodulation , encryption bit stream generation, whitening and transmit pulse shaping
Support eSCO and AFH
Support up to Bluetooth v2.1 + EDR
Support A-law, μ-law and CVSD digitize audio CODEC in PCM interface
Interface
Provides UART HCI interface, up-to 4Mbps
Provides I2C interface for host to do configuration
Provides PCM audio interface
Provides 3-wire and 2-wire WIFI Co-existence handshake interface
Bluetooth Stack
Compliant with Bluetooth 2.1 + EDR specification
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA. Page 6 of 22
5 Bluetooth Section Electrical Characteristics
Table 5-1 DC Electrical Specification (Recommended Operation Conditions):
SYMBOL DESCRIPTION MIN TYP MAX UNIT
VBAT Supply Voltage from battery or LDO 3.3 4.0 4.2 V
Tamb Ambient Temperature -20 27 +50
VIL CMOS Low Level Input Voltage 0 0.3*VIO V
VIH CMOS High Level Input Voltage 0.7*VIO VIO V
VTH CMOS Threshold Voltage 0.5*VIO V
Notes:
1. VIO=1.8~3.3V
Table 5-2 DC Electrical Specification (Absolute Maximum Ratings):
SYMBOL DESCRIPTION MIN TYP MAX UNIT
Tamb Ambient Temperature -20 +50 °C
IIN Input Current -10 +10 mA
VIN Input Voltage -0.3 VIO+0.3 V
Vlna LNA Input Level +5 dBm
Table 5-3 Power consumption specification
(VBAT = 4.0 V, VIO = 2.8V, TA = +27, RF 9dBm, LDO mode unless otherwise specified)
STATE DESCRIPTION Condition TYP UNIT
Headset voice HV3 type 18 mA
Headset SNIFF 500ms cycle NO INQUIRE and PAGE SCAN 0.5 mA
HCI only active 5.7 mA
Both SCAN 1.28S cycle INQUIRE and PAGE SCAN 1.0 mA
DeepSleep 26Mhz crystal off
Ivbat=105uA,Ivio=13uA,External
32K input
118 μA
internal LDO off LDO_ON off Ivbat=6uA,Ivio=1uA 7 μA
Table5-4 DCDC Power consumption specification
(VBAT = 4.0 V, VIO = 2.8V, TA = +27 , RF 9dBm, DCDC mode unless otherwise specified)
STATE DESCRIPTION Condition TYP UNIT
Headset voice HV3 12 mA
Headset SNIFF 500ms cycle NO INQUIRE and PAGE SCAN 0.5 mA
HCI only active 3.8 mA
Both SCAN 1.28S cycle INQUIRE and PAGE SCAN 0.8 mA
DeepSleep 26Mhz crystal off
Ivbat=105uA,Ivio=13uA,
External 32K input
118 μA
internal LDO off LDO_ON off Ivbat=6uA,Ivio=1uA 7 μA
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA. Page 7 of 22
6 Bluetooth Section Radio Characteristics
Table 6-1 Receiver Characteristics ------ Basic Data Rate
(VBAT1, 2 = 4.0 V, TA = 27°C, unless otherwise specified)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
General specifications
Sensitivity @0.1% BER / -90 / dBm
Maximum received signal@0.1% BER 0 / / dBm
C/I c-channel / +10 / dB
Adjacent channel selectivity C/I
F=F0 + 1MHz / / -5 dB
F=F0 - 1MHz / / 0 dB
F=F0 + 2MHz / / -33 dB
F=F0 - 2MHz / / -30 dB
F=F0 + 3 MHz / / -45 dB
F=F0 - 3MHz / / -40 dB
Adjacent channel selectivity C/I F=Fimage / / 0 dB
Out-of-band blocking performance
30MHz–2000MHz -10 / / dBm
2000MHz–2400MHz -27 / / dBm
2500MHz–3000MHz -27 / / dBm
3000MHz–12.5GHz -10 / / dBm
Intermodulation -35 / / dBm
Spurious output level -150 / / dBm/Hz
Notes:
Table 6-2 Transmit Characteristics ------ Basic Data Rate
(VBAT1, 2 = 4.0V, TA = 27 °C, unless otherwise specified)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
General specifications
Maximum RF transmit power / +4 +10 dBm
RF power control range 25 / / dB
20dB band width / 0.9 / MHz
Adjacent channel transmit power
F=F0 + 1MHz / -20 / dBm
F=F0 - 1MHz / -20 / dBm
F=F0 + 2MHz / -35 / dBm
F=F0 - 2MHz / -35 / dBm
F=F0 + 3MHz / -40 / dBm
F=F0 - 3MHz / -40 / dBm
F=F0 + >3MHz / / -46 dBm
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F=F0 - >3MHz -46 / / dBm
f1avg Maximum modulation / 164 / kHz
f2max Minimum modulation / 145 / kHz
f2avg/f1avg 0.80 / / /
ICFT / +4 / kHz
Drift rate / 0.1 / kHz/50us
Drift (1 slot packet) / -2 / kHz
Drift (5 slot packet) / -2 / kHz
Notes:
Table 6-3 Receiver Characteristic s ------ Enhanced Data Rate
(VBAT1, 2 = 4.0 V, TA = 27°C, unless otherwise specified)
PARAMETER CONDITIONS MIN TYP MAX UNIT
π/4 DQPSK
Sensitivity @0.01% BER / -86 / dBm
Maximum received signal@0.1% BER 0 / / dBm
C/I c-channel / / +13 dB
Adjacent channel selectivity C/I
F=F0 + 1MHz / / +5 dB
F=F0 - 1MHz / / 0 dB
F=F0 + 2MHz / / -20 dB
F=F0 - 2MHz / / -20 dB
F=F0 + 3MHz / / -40 dB
F=F0 - 3MHz / / -40 dB
Adjacent channel selectivity C/I F=Fimage / / -7 dB
8DPSK
Sensitivity @0.01% BER / -83 / dBm
Maximum received signal@0.1% BER 0 / / dBm
C/I c-channel / / +18 dB
Adjacent channel selectivity C/I
F=F0 + 1MHz / / +5 dB
F=F0 - 1MHz / / +5 dB
F=F0 + 2MHz / / -20 dB
F=F0 - 2MHz / / -20 dB
F=F0 + 3MHz / / -35 dB
F=F0 - 3MHz / / -35 dB
Adjacent channel selectivity C/I F=Fimage / / 0 dB
Notes:
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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Table 6-4 Transmit Characteristics ------ Enhanced Data Rate
(VBAT1, 2 = 4.0 V, TA = 27°C, unless otherwise specified)
PARAMETER CONDITIONS MIN TYP MAX UNIT
General specifications
Maximum RF transmit power / +7 / dBm
Relative transmit control / -1.6 / dB
kHz
π/4 DQPSK max w0 / +7.4 / kHz
π/4 DQPSK max wi / +6.7 / kHz
π/4 DQPSK max |wi + w0| / +2.4 / kHz
8DPSK max w0 / +7.1 / kHz
8DPSK max wi / +4.4 / kHz
8DPSK max |wi + w0| / +2.7 / kHz
π/4 DQPSK Modulation Accuracy
RMS DEVM / 4.7 / %
99% DEVM / / 30 %
Peak DEVM / 8.8 / %
8DPSK Modulation Accuracy
RMS DEVM / 4.6 / %
99% DEVM / / 20 %
Peak DEVM / 11.3 / %
In-band spurious emissions
F=F0 + 1MHz / -25 / dBm
F=F0 - 1MHz / -25 / dBm
F=F0 + 2MHz / -25 / dBm
F=F0 - 2MHz / -25 / dBm
F=F0 + 3MHz / -30 / dBm
F=F0 - 3MHz / -30 / dBm
F=F0 +/- > 3MHz / / -32 dBm
EDR Differential Phase Coding / 100 / %
Notes:
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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7 FM Section Functional Description
I
ADC
L
DAC
R
DAC
Q
ADC
+
-
Audio
DSP
Core
digital filter
MPX decoder
stereo/mono
audio
VCO
Synthesizer
GPIO
Interface
Bus
RSSI
VIO
SDIO
SCLK
MCU
GPIO
LOUT
ROUT
LNAN
LNAP
RCLK
2.7-5.5 V
32.768 KHz
VDD LDO
Limiter
LNA
I
PGA
Q
PGA
RDS
/RBDS
Figure 7-1. RDA5870P FM Section Block Diagram
FM Receiver
The receiver uses a digital low-IF architecture that
avoids the difficulties associated with direct
conversion while delivering lower solution cost
and reduces complexity, and integrates a low
noise amplifier (LNA) supporting the FM
broadcast band (50 to 115MHz), a quadrature
image-reject mixer, a programmable gain control
(PGA), a high resolution analog-to-digital
converters (ADCs), an audio DSP and a high-
fidelity digital-to-analog converters (DACs).
The LNA has differential input ports (LNAP and
LNAN) and supports any input port by set
according registers bits (LNA_port_sel[1:0]). It
default input common mode voltage is GND.
The limiter prevents overloading and limits the
amount of intermodulation products created by
strong adjacent channels.
The quadrature mixer down converts the LNA
output differential RF signal to low-IF, it also has
image-reject function.
The PGA amplifies the mixer output IF signal and
then digitized with ADCs.
The DSP core finishes the channel selection, FM
demodulation, stereo MPX decoder and output
audio signal. The MPX decoder can autonomous
switch from stereo to mono to limit the output
noise.
The DACs convert digital audio signal to analog
and change the volume at same time. The DACs
has low-pass feature and -3dB frequency is about
30 KHz.
Synthesizer
The frequency synthesizer generates the local
oscillator signal which divide to quadrature, then
be used to downconvert the RF input to a
constant low intermediate frequency (IF). The
synthesizer reference clock is 32.768 KHz.
The synthesizer frequency is defined by bits
CHAN[9:0] with the range from 50MHz to
115MHz.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 11 of 22
Power Supply
The RDA5870P FM section integrated LDO which
supplies power to the chip. The external supply
voltage range is 1.8-5.5 V.
RESET and Control Interface select
The RDA5870P FM section is RESET itself When
VIO is Power up. And also support soft reset by
trigger 02H BIT1 from 0 to 1. The control interface
is I2C.
Control Interface
The I2C interface is compliant to I2C Bus
Specification 2.1. It includes two pins: SCL and
SDA. A I2C interface transfer begins with START
condition, a command byte and data bytes, each
byte has a followed ACK (or NACK) bit, and ends
with STOP condition. The command byte includes
a 7-bit chip address (0010000b) and a R/W bit.
The ACK (or NACK) is always sent out by receiver.
When in write transfer, data bytes is written out
from MCU, and when in read transfer, data bytes
is read out from RDA5870P. There is no visible
register address in I2C interface transfers. The
I2C interface has a fixed start register address
(0x02h for write transfer and 0x0Ah for read
transfer), and an internal incremental address
counter. If register address meets the end of
register file, 0x3Ah, register address will wrap
back to 0x00h. For write transfer, MCU programs
registers from register 0x02h high byte, then
register 0x02h low byte, then register 0x03h high
byte, till the last register. RDA5870P always gives
out ACK after every byte, and MCU gives out
STOP condition when register programming is
finished. For read transfer, after command byte
from MCU, RDA5870P sends out register 0x0Ah
high byte, then register 0x0Ah low byte, then
register 0x0Bh high byte, till receives NACK from
MCU. MCU gives out ACK for data bytes besides
last data byte. MCU gives out NACK for last data
byte, and then RDA5870P will return the bus to
MCU, and MCU will give out STOP condition.
Details please refer to RDA5870P Programming
Guide or RDA5802N Programming Guide and
Datasheet.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA. Page 12 of 22
8 FM Section Electrical Characteristics
Table 8-1 DC Electrical Specification (Recommended Operation Conditions):
SYMBOL DESCRIPTION MIN TYP MAX UNIT
VBAT Supply Voltage 3.3 4.0 4.2 V
VIO Interface Supply Voltage 1.5 3.0 3.6 V
Tamb Ambient Temperature -20 27 +80
VIL CMOS Low Level Input Voltage 0 0.3*VIO V
VIH CMOS High Level Input Voltage 0.7*VIO VIO V
VTH CMOS Threshold Voltage 0.5*VIO V
Notes:
1. VIO=1.8~3.3V
Table 8-2 DC Electrical Specification (Absolute Maximum Ratings):
SYMBOL DESCRIPTION MIN TYP MAX UNIT
VIO Interface Supply Voltage -0.5 +4 V
Tamb Ambient Temperature -20 +60 °C
IIN Input Current (1) -10 +10 mA
VIN Input Voltage(1) -0.3 VIO+0.3 V
Vlna LNA FM Input Level +10 dBm
Notes:
1. For Pin: SCL, SDA
Table 8-3 Power Consumption Specification
(VBAT = 4.0 V, VIO=3.0V, TA = +25 , unless otherwise specified)
SYMBOL DESCRIPTION Condition TYP UNIT
IA Analog Supply Current ENABLE=1 20 mA
IVIO Interface Supply Current SCL and RCLK inactive 90 μA
IAPD Analog Powerdown Current ENABLE=0 5 μA
IVIO Interface Powerdown Current ENABLE=0 10
μA
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 13 of 22
9 FM Section Receiver Characteristics
Table 9-1 Receiver Characteristics (VBAT = 4.0 V, VIO= 3.0V, TA = 25 °C, unless otherwise specified)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
General specifications
Fin FM Input Frequency Range Adjust BAND Register 50 115 MHz
Vrf Sensitivity1,2,3 S/N=26dB
50MHz - 1.4 1.8
μV EMF
65MHz - 1.2 1.5
88MHz - 1.2 1.5
98MHz - 1.3 1.5
108MHz - 1.3 1.5
115MHz - 1.3 1.8
IP3in Input IP34 AGCD=1 80 - -
dBμV
am AM Suppression1,2 m=0.3 60 - - dB
S200 Adjacent Channel Selectivity ±200KHz 50 70 - dB
S400 400KHz Selectivity ±400KHz 60 85 - dB
VAFL; VAFR Audio L/R Output Voltage1,2
(Pins LOUT and ROUT) Volume [3:0] =1111 - 360 - mV
S/N Maximum Signal to Noise
Ratio1,2,3,5 Mono2 55 57 - dB
Stereo6 53 55 -
SCS Stereo Channel Separation 35 - - dB
RL
Audio Output Loading
Resistance Single-ended 32 - -
Ω
THD Audio Total Harmonic
Distortion1,3,6
Volume[3:0]
=1111
Rload=1KΩ - 0.15 0.2 %
Rload=32Ω- 0.2 -
AOI Audio Output L/R
Imbalance1,6 - - 0.05 dB
Rmute Mute Attenuation Ratio1 Volume[3:0]=0000 60 - - dB
BWaudio Audio Response1 1KHz=0dB
±3dB point
Low Freq9 - 100 - Hz
High Freq - 14 -
Pins LNAN, LNAP, LOUT, ROUT and NC(22,23)
Vcom_rfin Pins LNAN/LNAP Input
Common Mode Voltage
0 V
Vcom Audio Output Common Mode
Voltage8 1.0 1.05 1.1 V
Vcom_nc Pins NC ( 22,23 ) Common
Mode Voltage
Floating V
Notes:1. Fin=65 to 115MHz; Fmod=1KHz; de-emphasis=75μs; MONO=1; L=R unless noted otherwise;
2. Δf=22.5KHz; 3. B
AF = 300Hz to 15KHz, RBW <=10Hz; 4. |f2-f1|>1MHz, f0=2xf1-f2, AGC disable, Fin=76 to 108MHz;
5. PRF=60dBUV; 6. Δf=75KHz,fpilot=10% 7. Measured at VEMF = 1 m V, f RF = 65 to 108MHz
8. At LOUT and ROUT pins 9. Adjustable
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10 Pins Description
GND PAD
RDA5870P
40 Pins
31323334
35
3637383940
1
2
3
4
5AGPIO0/BT_ACTIVE
NC
NC
UART_TX
UART_RX
I2C_SCL
I2C_SDA
GND
FM_IP
FM_OUTL
FM_OUTR
NC
GPIO2/
WLAN_ACTIVE
PCM_CLK
PCM_SYNC
PCM_DOUT
PCM_DIN
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
20191817161514131211
VOUT12
NC
XIN
XIN_32K
VBAT
NC
RF
NC
NC
HOST_WAKE
NC
NC
NC
FM_IN
AGPIO1/BT_PRIORITY
VIO
NC
LDO_ON
NC
XEN_OUT
NC
NC
NC
Figure10-1. RDA5870P Top V i ew
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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Table 10-1 RDA5870P Pins Description
PIN NO. DESCRIPTION
UART_TX 1 UART data output
UART_RX 2 UART data input
PCM_DOUT 3 Synchronous data output
PCM_DIN 4 Synchronous data input
PCM_CLK 5 Synchronous data clock
PCM_SYNC 6 Synchronous data sync
VIO 7 IO power supply
VOUT12 8 Digital voltage output, connected with decouple capacitor.
NC 9 Should be not connected
VBAT 10 Bluetooth and FM power supply
XIN_32K 11 32.768K clock input
NC 12 Should be not connected
XEN_OUT 13 Clock request output
NC 14 Should be not connected
XIN 15 For crystal input or external clock input
NC 16 Should be not connected
NC 17 Should be not connected
LDO_ON 18 Internal LDO power on
NC 19 Should be not connected
NC 20 Should be not connected
NC 21 Should be not connected
NC 22 Should be not connected
NC 23 Should be not connected
NC 24 Should be not connected
RF 25 Radio signal
AGPIO0 26
Programmable I/O
Also used as bt_active when using WIFI co-existence handshake interface.
AGPIO1 27
Programmable I/O.
Also used as bt_priority when using WIFI co-existence handshake interface.
FM_IN 28
LNA input port. For single-ended input, LNAN should be connected to RFGND
GND 29 LNA ground. Connect to ground plane on PCB
FM_IP 30 LNA input port. For single-ended input, LNAN should be connected to RFGND
NC 31 Should be not connected
NC 32 Should be not connected
NC 33 Should be not connected
FM_OUTL 34 Left audio output
FM_OUTR 35 Right audio output
NC 36 Should be not connected
GPIO2 37
Programmable I/O.
Also used as wl_active when using WIFI co-existence handshake interface.
HOST_WAKE 38
To wakeup host
Also used as wlan_active when using WIFI co-existence handshake interface.
I2C_SCL 39 I2C interface Clock signal
I2C_SDA 40 I2C interface Data signal
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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11 Application Circuit
Please refer to the <<RDA 5870P hardware application guide>>.
FM Section antenna input and audio output diagram:
Figure 11-1. RDA5870P FM Tuner Application Diagram
Bill of Materials:
Component Valu e Description Supplier
U1 RDA5870P Bluetooth/FM Tuner Single Chip RDA
J1 Common 32 Resistance Headphone
/audio amplifier
L3/C3 100nH/24pF LC Chock for LNA Input Murata
C4,C5 125µF Audio AC Couple Capacitors Murata
F1/F2 1.5K@100MHz FM Band Ferrite Murata
Notes:
1. J1: Common 32 Resistance
Headphone, if audio loading
resistance is larger than 32;
Audio amplifier, if audio loading
resistance is less than 32;
2. U1: RDA5870 Chip;
3. FM Choke (L3 and C3) for Audio
Common and LNA Input
Common;
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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12 Package Physical Dimension
Figure12-1 illustrates the package details for the RDA5870P. The package is lead-free and
RoHS-compliant.
Figure12-1. 40-Pin 6x6 Quad Flat No-Lead (QFN)
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 18 of 22
13 PCB Land Pattern
Figure13-1. PCB Land Pattern for 40-Pin QFN
Figure13-2. PCB Solder Paste Stencil Openings
PCB LAND
SOLDER MASK
MULTIPLE STENCIL
0.85 0.28 0.5
>0.0625
~0
6.6 4.35
4.35
6.6
0.9
OPENINGS (~40%)
SOLDER MASK
PCB LAND
0.85 0.28 0.5
6.6 4.35
6.6
4.35
16x PCB VIAS
DIAMETER 0.3-0.4mm
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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Figure13-3.Classification Reflow Profile
Table 13-1 Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Average Ramp-Up Rate
(TSmax to Tp)
3 /second max. 3 /second max.
Preheat
-Temperature Min (Tsmin)
-Temperature Max (Tsmax)
-Time (tsmin to tsmax)
100
100
60-120 seconds
150
200
60-180 seconds
Time maintained above:
-Temperature (TL)
-Time (tL)
183
60-150seconds
217
60-150 seconds
Peak /Classification
Temperature(Tp)
See Table 9-2 See Table 9-3
Time within 5 oC of actual Peak
Temperature (tp)
10-30 seconds 20-40 seconds
Ramp-Down Rate 6 /second max. 6 /seconds max.
Time 25 oC to Peak
Temperature
6 minutes max. 8 minutes max.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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Table 13-2 Pb-free Process – Package Peak Reflow Temperatures
Package Thickness Volume mm3
<350
Volume mm3
350
2.5mm 240 + 0/-5 225 + 0/-5
2.5mm 225 + 0/-5 225 + 0/-5
Table 13-3 Pb-free Process – Package Classification Reflow Temperatures
Package
Thickness
Volume mm3
350
Volume mm3
350-2000
Volume mm3
2000
1.6mm 260 + 0 * 260 + 0 * 260 + 0 *
1.6mm – 2.5mm 260 + 0 * 250 + 0 * 245 + 0 *
2.5mm 250 + 0 * 245 + 0 * 245 + 0 *
*Tolerance : The device manufacturer/supplier shall assure process compatibility up to and including the
stated classification temperature(this mean Peak reflow temperature + 0 . For example 260+ 0 )
at the rated MSL Level.
Note 1: All temperature refer topside of the package. Measured on the package body surface.
Note 2: The profiling tolerance is + 0 , - X (based on machine variation capability)whatever is
required to control the profile process but at no time will it exceed – 5 . The producer assures process
compatibility at the peak reflow profile temperatures defined in Table 13-3.
Note 3: Package volume excludes external terminals(balls, bumps, lands, leads) and/or non integral heat
sinks.
Note 4: The maximum component temperature reached during reflow depends on package the thickness
and volume. The use of convection reflow processes reduces the thermal gradients between packages.
However, thermal gradients due to differences in thermal mass of SMD package may sill exist.
Note 5: Components intended for use in a “lead-free” assembly process shall be evaluated using the
“lead free” classification temperatures and profiles defined in Table13-1, 13-2, 13-3 whether or not lead
free.
RoHS Compliant
The product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls
(PBB) or polybrominated biphenyl ethers (PBDE), and are therefore considered RoHS compliant.
ESD Sensitivity
Integrated circuits are ESD sensitive and can be damaged by static electricity. Proper ESD techniques
should be used when handling these devices.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 21 of 22
14 Change List
REV DATE AUTHER CHANGE DESCRIPTION
V1.0 03/25/2011 Gibson Initial version from RDA5870.
RDA Microelectronics, Inc. RDA5870P Datasheet V1.0
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part without prior written permission of RDA. Page 22 of 22
15 Contact Information
RDA Microelectronics, Inc.
Suite 302 Building 2, 690 Bibo Road Pudong District, Shanghai
Tel: 86-21-50271108
Fax: 86-21-50271099
Postal Code: 201203
Suite 1108 Block A, e-Wing Center, 113 Zhichun Road Haidian District, Beijing
Tel: 86-10-62635360
Fax: 86-10-82612663
Postal Code: 100086
2501 Room, District A, XiNian Center, 6021 ShenNan Road, Nanshan District, Shenzhen.
Tel: 86-755- 86187018
Fax: 86-755- 33395366
Postal Code: 518057