108&301&3"5*0/"-".1-*'*&3 PA10 * PA10A )551888"1&9.*$305&$)$0. "1&9 M I C R O T E C H N O L O G Y FEATURES * * * * * Gain bandwidth product -- 4MHz Temperature range -- -55 to +125C (PA10A) Excellent linearity -- Class A/B Output Wide supply range -- 10V to 50V High output current -- 5A Peak APPLICATIONS * * * * * * Motor, valve and actuator control Magnetic deflection circuits up to 4A Power transducers up to 100kHz Temperature control up to 180W Programmable power supplies up to 90V Audio amplifiers up to 60W RMS 8-pin TO-3 PACKAGE STYLE CE TYPICAL APPLICATION 3" 7 DESCRIPTION $0/530 3# 3# -0"% DC and low distortion AC current waveforms are delivered to a grounded load by using matched resistors (A and B sections) and taking advantage of the high common mode rejection of the PA10. Foldover current limit is used to modify current limits based on output voltage. When load resistance drops to 0, the current is limited based on output voltage. When load resistance drops to 0, the current limit is 0.79A resulting in an internal dissipation of 33.3 W. When output voltage increases to 36V, the current limit is 1.69A. Refer to Application Note 9 on foldover limiting for details. 2# 2 m7 FIGURE 1. VOLTAGE-TO-CURRENT CONVERSION 2" 34 1" EQUIVALENT SCHEMATIC % 3" The PA10 and PA10A are high voltage, high output current operational amplifiers designed to drive resistive, inductive and capacitive loads. For optimum linearity, the output stage is biased for class A/B operation. The safe operating area (SOA) can be observed for all operating conditions by selection of user programmable current limiting resistors. Both amplifiers are internally compensated for all gain settings. For continuous operation under load, a heatsink of proper rating is recommended. This hybrid integrated circuit utilizes thick film (cermet) resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible isolation washers voids the warranty. EXTERNAL CONNECTIONS 2 2 " 065 */ 065165 5017*&8 2 3 $- $- 7 4 2" 2# m*/ $ m7 4 $-m 3 $-m '0 APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 * FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com PA10 * PA10A ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS SUPPLY VOLTAGE, +VS to -VS OUTPUT CURRENT, within SOA POWER DISSIPATION, internal INPUT VOLTAGE, differential INPUT VOLTAGE, common mode TEMPERATURE, pin solder - 10s TEMPERATURE, junction1 TEMPERATURE RANGE, storage OPERATING TEMPERATURE RANGE, case SPECIFICATIONS PARAMETER TEST CONDITIONS 2, 5 MIN 100V 5A 67W VS -3V VS 300C 200C -65 to +150C -55 to +125C PA10 TYP MAX MIN PA10A TYP MAX UNITS 2 6 10 65 30 200 20 12 30 50 500 .10 12 30 50 200 3 VS-3 * 100 * 1 4 * 40 * * * 10 20 * * * 5 10 * * * * * mV V/C V/V VW nA pA/C pA/V nA pA/C M pF V dB 110 108 * 4 15 * 35 * * * * * dB dB MHz kHz TC = 25C, IO = 5A VS-8 VS-5 VS-6 * Full temp. range, IO = 2A VS-6 * Full temp. range, IO = 80mA VS-5 * TC = 25C 5 * TC = 25C, 2V step 2 * TC = 25C 2 3 * * Full temperature range, AV = 1 .68 * Full temperature range, AV = 2.5 10 * Full temperature range, AV > 10 SOA * V V V A s V/s nF nF nF Full temperature range TC = 25C V mA INPUT OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. temperature OFFSET VOLTAGE, vs. supply OFFSET VOLTAGE, vs. power BIAS CURRENT, initial BIAS CURRENT, vs. temperature BIAS CURRENT, vs. supply OFFSET CURRENT, initial OFFSET CURRENT, vs. temperature INPUT IMPEDANCE, DC INPUT CAPACITANCE COMMON MODE VOLTAGE RANGE3 COMMON MODE REJECTION, DC3 TC = 25C Full temperature range TC = 25C TC = 25C TC = 25C Full temperature range TC = 25C TC = 25C Full temperature range TC = 25C TC = 25C Full temperature range VS-5 Full temp. range, VCM = VS -6V 74 GAIN OPEN LOOP GAIN at 10Hz OPEN LOOP GAIN at 10Hz GAIN BANDWIDTH PRODUCT @ 1MHz POWER BANDWIDTH PHASE MARGIN TC = 25C, 1K load Full temp. range, 15 load 96 TC = 25C, 15 load TC = 25C, 15 load 10 Full temp. range, 15 load OUTPUT VOLTAGE SWING3 VOLTAGE SWING3 VOLTAGE SWING3 CURRENT, peak SETTLING TIME to .1% SLEW RATE CAPACITIVE LOAD CAPACITIVE LOAD CAPACITIVE LOAD POWER SUPPLY VOLTAGE CURRENT, quiescent 10 8 40 15 45 30 * * * * 50 * THERMAL RESISTANCE, AC, junction to case4 RESISTANCE, DC, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case NOTES: * 1. 2. 3. 4. 5. CAUTION TC = -55 to +125C, F > 60Hz 1.9 2.1 * * TC = -55 to +125C 2.4 2.6 * * TC = -55 to +125C 30 * Meets full range specifications -25 +85 -55 +125 C/W C/W C/W C The specification of PA10A is identical to the specification for PA10 in applicable column to the left. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. The power supply voltage for all tests is 40, unless otherwise noted as a test condition. +VS and -VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to -VS. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. Full temperature range specifications are guaranteed but not tested. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes. APEX MICROTECHNOLOGY CORPORATION * 5980 NORTH SHANNON ROAD * TUCSON, ARIZONA 85741 * USA * APPLICATIONS HOTLINE: 1 (800) 546-2739 PA10 * PA10A 108&3%&3"5*/( 1" 1"" 55" m m m m m , , . . . '3&26&/$: ' )[ m $0..0/.0%&3&+&$5*0/ , , . . . '3&26&/$: ' )[ 16-4&3&410/4& 06516570-5"(& 70 7 7*/7 USOT m m , , . '3&26&/$: ' )[ )"3.0/*$%*45035*0/ "7 747 3- 8 N 10 10 8 8 10 , , , , '3&26&/$: ' )[ m . . 5*.& U T ] 74] ]m74]7 ] 74] ]m74]7 ] 74] ]m74]7 , 4 26*&4$&/5$633&/5 $ 5 $ m m $"4&5&.1&3"563& 5$ $ , , , , . '3&26&/$: ' )[ 4 */165/0*4& m 108&33&410/4& m 3$- 06516570-5"(& 70 711 1)"4& J m 3$- 1)"4&3&410/4& m m $"4&5&.1&3"563& 5$ $ /03."-*;&%26*&4$&/5$633&/5 *2 9 01&/-001("*/ "0- E# $0..0/.0%&3&+&$5*0/ $.3 E# m m %*45035*0/ 5&.1&3"563& 5 $ 4."--4*(/"-3&410/4& $633&/5-*.*5 *-*. " 55$ $633&/5-*.*5 */165/0*4&70-5"(& 7/ O7)[ #*"4$633&/5 $ 5 $ $ 5 $ $ 5 $ 505"-4611-:70-5"(& 74 7 70-5"(&%301'30.4611-: 7 /03."-*;&%#*"4$633&/5 *# 9 */5&3/"-108&3%*44*1"5*0/ 1 8 TYPICAL PERFORMANCE GRAPHS , , '3&26&/$: ' )[ 06516570-5"(&48*/( $ 5 $ m7 0 $ UP 5 $ $ 5 $ 70 . 5 $ P U $ 065165$633&/5 *0 " APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 * FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL prodlit@apexmicrotech.com OPERATING CONSIDERATIONS PA10 * PA10A Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Apex's complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits. VS 50V 40V 35V 30V 25V 20V 15V SAFE OPERATING AREA (SOA) CURRENT LIMITING The output stage of most power amplifiers has three distinct limitations: 1. The current handling capability of the transistor geometry and the wire bonds. 2. The second breakdown effect which occurs whenever the simultaneous collector current and collector-emitter voltage exceeds specified limits. Refer to Application Note 9, "Current Limiting", for details of both fixed and foldover current limit operation. Visit the Apex web site at www.apexmicrotech.com for a copy of the Power Design spreadsheet (Excel) which plots current limits vs. steady state SOA. Beware that current limit should be thought of as a +/-20% function initially and varies about 2:1 over the range of -55C to 125C. For fixed current limit, leave pin 7 open and use equations 1 and 2. RCL = 0.65/LCL (1) ICL = 0.65/RCL (2) Where: ICL is the current limit in amperes. RCL is the current limit resistor in ohms. For certain applications, foldover current limit adds a slope to the current limit which allows more power to be delivered to the load without violating the SOA. For maximum foldover slope, ground pin 7 and use equations 3 and 4. 0.65 + (Vo * 0.014) ICL = (3) RCL GENERAL 065165$633&/5'30. 7403m74 " 5 $ 5 $ 5) $ &3 TUF $ ." - BE ZT U UB UF 4 &$ N T 0/ % U U N T NT #3 &" ,% 08 / 4611-:50065165%*''&3&/5*"-70-5"(&74m70 7 3. The junction temperature of the output transistors. The SOA curves combine the effect of these limits. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. 1. For DC outputs, especially those resulting from fault conditions, check worst case stress levels against the new SOA graph. For sine wave outputs, use Power Design1 to plot a load line. Make sure the load line does not cross the 0.5ms limit and that excursions beyond any other second breakdown line do not exceed the time label, and have a duty cycle of no more than 10%. 1 Note 1. Power Design is a self-extracting Excel spreadsheet available free from www.apexmicrotech.com For other waveform outputs, manual load line plotting is recommended. Applications Note 22, SOA AND LOAD LINES, will be helpful. A Spice type analysis can be very useful in that a hardware setup often calls for instruments or amplifiers with wide common mode rejection ranges. 2. The amplifier can handle any EMF generating or reactive load and short circuits to the supply rail or shorts to common if the current limits are set as follows at TC = 85C: SHORT TO VS C, L, OR EMF LOAD .21A .3A .36A .46A .61A .87A 1.4A SHORT TO COMMON .61A .87A 1.0A 1.4A 1.7A 2.2A 2.9A 0.65 + (Vo * 0.014) (4) RCL = ICL Where: Vo is the output voltage in volts. Most designers start with either equation 1 to set RCL for the desired current at 0v out, or with equation 4 to set RCL at the maximum output voltage. Equation 3 should then be used to plot the resulting foldover limits on the SOA graph. If equation 3 results in a negative current limit, foldover slope must be reduced. This can happen when the output voltage is the opposite polarity of the supply conducting the current. In applications where a reduced foldover slope is desired, this can be achieved by adding a resistor (RFO) between pin 7 and ground. Use equations 4 and 5 with this new resistor in the circuit. 0.65 + Vo * 0.14 10.14 + RFO ICL = RCL (5) 0.65 + Vo * 0.14 10.14 + RFO RCL = ICL Where: RFO is in K ohms. (6) This data sheet has been carefullyCORPORATION checked and is believed to beNORTH reliable, however, no responsibility is assumed for possible inaccuracies omissions. All specificationsHOTLINE: are subject to notice. APEX MICROTECHNOLOGY * 5980 SHANNON ROAD * TUCSON, ARIZONA 85741 * orUSA * APPLICATIONS 1 change (800)without 546-2739 PA10U REV P OCTOBER 2006 (c) 2006 Apex Microtechnology Corp.