Preliminary Information M906-01 VCSO BASED GBE CLOCK GENERATOR XTAL_2 FOUT4 nFOUT4 FOUT5 nFOUT5 VCC DNC DNC DNC 28 29 30 31 32 33 34 35 36 18 17 16 15 14 13 12 11 10 M906-01 (Top View) nFOUT2 FOUT2 nFOUT1 FOUT1 GND nFOUT0 FOUT0 VCC GND GND GND GND OP_IN nOP_OUT nVC VC OP_OUT nOP_IN The M906-01 is a PLL (Phase Locked Loop) based clock generator that uses an internal VCSO (Voltage Controlled SAW Oscillator) to produce a very low jitter output clock. It is ideal for Gigabit Ethernet. The output clock (frequency of 156.25 or 187.50MHz for example) is provided from six LVPECL clock output pairs. (Specify frequency at time of order.) The accuracy of the output frequency is assured by the internal PLL, which phase-locks the internal VCSO to the reference input frequency (25 or 30MHz for example). The input reference can either be an external crystal, utilizing the internal crystal oscillator, or a stable external clock source such as a packaged crystal oscillator. XTAL_1 / REF_IN GND STOP EXT_CLK EN_EXT_CLK NC nFOUT3 FOUT3 VCC PIN ASSIGNMENT (9 x 9 mm SMT) 27 26 25 24 23 22 21 20 19 GENERAL DESCRIPTION 1 2 3 4 5 6 7 8 9 Integrated Circuit Systems, Inc. FEATURES Output clock frequency from 125MHz to 190MHz (Consult factory for frequency availability) Figure 1: Pin Assignment Six identical LVPECL output pairs Integrated SAW (surface acoustic wave) delay line Example Output Frequency Configurations Low jitter 0.7ps RMS (over 12kHz-20MHz) Ref Clock Frequency (MHz) Ideal for Gigabit Ethernet clock reference Output-to-output skew < 100ps External XTAL or LVCMOS reference input 20 Selectable external feed-through clock input 25 STOP clock control (Logic 1 stops output clocks) 30 PLL Ratio Output Frequency 1 (MHz) 25/4 Application 156.25 GbE 156.25 10GbE 187.50 12GbE Table 1: Example Output Frequency Configurations Industrial temperature grade available Note 1:Specify output clock frequency at time of order Single 3.3V power supply Small 9 x 9 mm SMT (surface mount) package SIMPLIFIED BLOCK DIAGRAM M906-01-156.25 VSCO External Crystal or Reference Clock Input XTAL OSC Divider Frequency Multiplying PLL LVPECL Output Clock Pairs O 1 (e.g., 156.25 or 187.50MHz) (e.g., 25 or 30MHz) External Loop Filter External Clock Input External Clock Select Output Clock STOP Control Figure 2: Simplified Block Diagram M906-01 Datasheet Rev 1.3 Revised 06Jan2004 M906-01 VCSO Based GbE Clock Generator Integrated Circuit Systems, Inc. Communications Modules w w w. i c s t . c o m tel (508) 852-5400 M906-01 Integrated Circuit Systems, Inc. VCSO BASED GBE CLOCK GENERATOR Preliminary Information DETAILED BLOCK DIAGRAM RLOOP CLOOP RPOST External Loop Filter Components CPOST CPOST RLOOP M906-01 XTAL_1 / REF_IN XTAL_2 OP_IN Phase Detector XTAL OSC nOP_IN RPOST CLOOP OP_OUT nOP_OUT nVC VC FOUT5 nFOUT5 SAW Delay Line RIN R Divider FOUT4 nFOUT4 R=4 RIN Loop Filter Amplifier Phase Shifter FOUT3 nFOUT3 VCSO M Divider M = 25 O Phase Locked Loop (PLL) 1 EXT_CLK FOUT2 nFOUT2 FOUT1 nFOUT1 EN_EXT_CLK FOUT0 nFOUT0 STOP Figure 3: Detailed Block Diagram PIN DESCRIPTIONS Number 1, 2, 3, 10, 14, 26 4 9 5 8 6 7 11, 19, 33 Name GND OP_IN nOP_IN nOP_OUT OP_OUT nVC VC VCC I/O 12 13 15 16 17 18 20 21 29 30 31 32 FOUT0 nFOUT0 FOUT1 nFOUT1 FOUT2 nFOUT2 FOUT3 nFOUT3 FOUT4 nFOUT4 FOUT5 nFOUT5 23 EN_EXT_CLK Input 24 EXT_CLK Input 25 STOP Input 27 XTAL_1 / REF_IN Input 28 XTAL_2 Input 34, 35, 36 DNC Configuration Ground Description Power supply ground connections. Input External loop filter connections. See Figure 4, External Loop Filter, on pg. 3. Output Input Power Output Power supply connection, connect to +3.3V. No internal terminator Clock output pairs, differential LVPECL output (156.25 MHz for the M906-01-156.2500) Logic 1 enables the EXT_CLK input. Use Logic 0 for normal operation. External clock feed-through: 0 to 200 MHz 1 Logic 1 stops clock outputs. Internal pull-down resistor Use Logic 0 for normal operation. External crystal connection. Also accepts Internal pull-down resistor1 LVCMOS/LVTTL compatible clock source. External crystal connection. Leave unconnected when driving pin 27 with external clock reference. Do Not Connect. Internal pull-down resistor1 Table 2: Pin Descriptions Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 5 for typical value. M906-01 Datasheet Rev 1.3 Integrated Circuit Systems, Inc. Revised 06Jan2004 2 of 6 Communications Modules w w w. i c s t . c o m tel (508) 852-5400 M906-01 Integrated Circuit Systems, Inc. VCSO BASED GBE CLOCK GENERATOR Preliminary Information For the M906-01-156.2500 (see "Ordering Information" on pg. 6): FUNCTIONAL DESCRIPTION The M906-01 is a PLL (Phase Locked Loop) based clock generator that generates output clocks synchronized to an input reference clock. The M906-01 combines the flexibility of a VCSO (Voltage Controlled SAW Oscillator) with the stability of a crystal oscillator. Input Reference The input reference can either be an external, discrete crystal device or a stable external clock source such as a packaged crystal oscillator: * * * * VCSO output frequency = 156.25MHz Input reference frequency = 25MHz M=25 R= 4 Therefore, for the M906-01-156.2500: 25 156.25MHz = 25MHz x ---------4 M The product of the input crystal frequency and ----R falls within the lock range of the VCSO. * If an external crystal is used with the on-chip crystal External Loop Filter oscillator circuit (XTAL OSC), the external crystal should be a parallel-resonant, fundamental mode crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input pins. External crystal load capacitors are also required. * If an external LVCMOS/LVTTL clock source is used, apply it to the XTAL_1 / REF_IN input pin. In either case, the reference clock is supplied to the phase detector of the PLL. The M906-01 includes a reference divider that divides the input reference frequency by a fixed value "R" and provides the result to the phase detector. To provide stable PLL operation, and thereby a low jitter output clock, the M906-01 requires the use of an external loop filter. This is provided via the provided filter pins (see Figure 4). Due to the differential signal path design, the implementation requires two identical complementary RC filters as shown here. RLOOP CLOOP RPOST CPOST CPOST RLOOP The EX_CLK pin is available for a clock feed-through mode for testing. See "External Clock Feed-through" on pg. 4. OP_IN nOP_IN 4 RPOST CLOOP OP_OUT 9 nOP_OUT 8 5 nVC VC 6 7 Figure 4: External Loop Filter The PLL External Loop Filter Component Values The PLL (Phase Locked Loop) includes the phase detector, the VCSO, a feedback divider (labeled "M Divider"), and a reference divider ("R Divider"). PLL Damping Bandwidth Factor The feedback divider divides the VCSO output frequency by a fixed value "M" to match the reference frequency provided to the phase detector by the reference divider. R post C post 4.00F 50k 3300pF 3.3 4.7k 1.00F 50k 1500pF 4.4 20.0k 0.10F 20k 470pF 33.0k 0.033F 20k 470pF 2.1 1.5kHz 6.4kHz 10.6kHz By controlling the frequency and phase of the VCSO, the phase detector precisely locks the frequency and phase of the feedback divider output to that of the reference divider output. This creates an output frequency that is a multiple of the reference frequency (which is output from the VCSO). C loop 1.5k 500Hz 1 R loop 4.2 Table 3: External Loop Filter Component Values Note 1: Recommended for most applications The relationship between the VCSO output frequency, the M Divider, the R Divider and the input reference frequency is defined as follows: M Fvcso = Fxtal x ----R M906-01 Datasheet Rev 1.3 Integrated Circuit Systems, Inc. Revised 06Jan2004 3 of 6 Communications Modules w w w. i c s t . c o m tel (508) 852-5400 M906-01 Integrated Circuit Systems, Inc. VCSO BASED GBE CLOCK GENERATOR Preliminary Information External Clock Feed-through STOP Clock The EXT_CLK pin provides an input for an external single-ended clock that directly drives the LVPECL clock outputs. In application, this may be used for system debugging and performance evaluation. The STOP pin puts the output clock into a static condition. Logic 1 Output clocks are static Logic 0 Output clocks enabled for normal operation 1. Set pin EN_EXT_CLK to Logic 1. 2. Apply an external LVCMOS/LVTTL clock source to the EXT_CLK input pin. Due to the fact that EXT_CLK bypasses the PLL, any frequency between DC and 200MHz can be used. ABSOLUTE MAXIMUM RATINGS1 Symbol Parameter Rating Unit VI Inputs -0.5 to VCC +0.5 V VO Outputs -0.5 to VCC +0.5 V VCC Power Supply Voltage TS Storage Temperature 4.6 V -45 to +100 oC Table 4: Absolute Maximum Ratings Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. RECOMMENDED CONDITIONS OF OPERATION Symbol Parameter VCC Positive Supply Voltage TA Ambient Operating Temperature Commercial Industrial Min Typ Max Unit 3.135 3.3 3.465 V 0 -40 oC +70 +85 oC Table 5: Recommended Conditions of Operation M906-01 Datasheet Rev 1.3 Integrated Circuit Systems, Inc. Revised 06Jan2004 4 of 6 Communications Modules w w w. i c s t . c o m tel (508) 852-5400 M906-01 Integrated Circuit Systems, Inc. VCSO BASED GBE CLOCK GENERATOR Preliminary Information ELECTRICAL SPECIFICATIONS DC Characteristics Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50 to VCC - 2V Symbol Parameter Power Supply Min Typ Max Unit 3.135 3.3 3.465 V VCC Positive Supply Voltage ICC Power Supply Current VIH Input High Voltage VIL Input Low Voltage IIH Input High Current IIL Input Low Current -5.0 VIH Input High Voltage (Vcc / 2 ) +0.5 VIL Input Low Voltage IIH Input High Current IIL Input Low Current All Inputs CIN Input Capacitance, All Inputs Pull-down Rpulldown Internal Pull-down Resistor Differential Output VOH Output High Voltage VOL Output Low Voltage VP-P Peak to Peak Output Voltage Logic Inputs Reference Clock Input mA 350 2 Vcc +0.3 V 0.8 V 150 A -0.3 EN_EXT_CLK, EXT_CLK, STOP A Vcc +0.3 -0.3 XTAL_1 / REF_IN (XTAL_2 disconnected) (Vcc / 2 ) +0.5 V A 150 A -5.0 EN_EXT_CLK, EXT_CLK, STOP, XTAL_1 / REF_IN pF 4 EN_EXT_CLK, STOP k 51 FOUT, nFOUT (0-5) V Vcc -1.4 Vcc -1.0 V Vcc -2.0 Vcc -1.7 V 0.6 0.85 V Table 6: DC Characteristics Note 1: See Ordering Information on pg. 6 AC Characteristics Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50 to VCC - 2V Symbol Parameter FOUT Output Frequency Range FIN Nominal Input Frequency, XTAL_1 / REF_IN APR VCSO Pull-Range n Single Side Band Phase Noise @156.25MHz Min Typ Max Unit 125 156.25 190 MHz 100 1kHz Offset 25 MHz 150 ppm -100 -110 -134 Test Conditions 0.7 1.0 dBc/Hz dBc/Hz dBc/Hz ps 45 50 55 % FOUT, nFOUT (0-1) 350 450 550 ps 20% to 80% Output Fall Time FOUT, nFOUT (0-1) 350 450 550 ps 20% to 80% Output Skew Between Any Pair 100 ps EXT_CLK Frequency EXT_CLK 200 MHz 10kHz Offset 100kHz Offset J(t) Jitter (rms) tDC Output Duty Cycle, High Time tR Output Rise Time tF tS 0 Table 7: AC Characteristics Note 1: See Ordering Information on pg. 6 M906-01 Datasheet Rev 1.3 Integrated Circuit Systems, Inc. 12kHz to 20MHz Revised 06Jan2004 5 of 6 Communications Modules w w w. i c s t . c o m tel (508) 852-5400 Integrated Circuit Systems, Inc. M906-01 Preliminary Information VCSO BASED GBE CLOCK GENERATOR DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER Mechanical Dimensions: Figure 5: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier ORDERING INFORMATION Part Numbering Scheme Part Number: Example Part Numbers M906- 01 - xxx.xxxx Device Number Output Freq. (MHz) Temperature " - " = 0 to +70 oC (commercial) I = - 40 to +85 oC (industrial) 156.25 156.25 Output Frequency (MHz) See Table 8, right. Consult ICS for other frequencies. Figure 6: Part Numbering Scheme 187.50 Temperature Order Part Number commercial industrial commercial industrial commercial industrial M906-01 - 156.2500 M906-01I156.2500 M906-01 - 156.2500 M906-01I156.2500 M906-01 - 187.5000 M906-01I187.5000 Table 8: Example Part Numbers Consult factory for frequency availability. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. M906-01 Datasheet Rev 1.3 Integrated Circuit Systems, Inc. 6 of 6 Communications Modules Revised 06Jan2004 w w w. i c s t . c o m tel (508) 852-5400