1
FEATURES
DESCRIPTION
BLOCK DIAGRAM
15
12
3
6
5
7
9
1
2
8
10
Reference
Regulator
16 4
OSC
50 mA
13
14
11
13
11
14
COMP S
S
R
+VIN
GROUND
SYNC
RT
CT
DISCHARGE
COMPENSATION
INV INPUT
NI INPUT
SOFTSTART
SHUTDOWN OUTPUT B
OUTPUT A
VC
OUTPUT B
OUTPUT A
VC
NOR
NOR
OR
OR
VREF
Error
Amp
VREF OSC
OUT
To Internal
Circutry
UVLO
Lockout
Flip
Flop
PWM
Latch
3 kW
5 kWUC1527A
Output Stage
UC1525A
Output Stage
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008www.ti.com
REGULATING PULSE WIDTH MODULATORS
•8-V to 35-V Operation•5.1-V Reference Trimmed to 1%
The UC1525A/1527A series of pulse width modulatorintegrated circuits are designed to offer improved•100-Hz to 500-kHz Oscillator Range
performance and lowered external parts count when•Separate Oscillator Sync Terminal
used in designing all types of switching power•Adjustable Deadtime Control
supplies. The on-chip +5.1-V reference is trimmed to1% and the input common-mode range of the error•Internal Soft-Start
amplifier includes the reference voltage, eliminating•Pulse-by-Pulse Shutdown
external resistors. A sync input to the oscillator allows•Input Undervoltage Lockout With Hysteresis
multiple units to be slaved or a single unit to besynchronized to an external system clock. A single•Latching PWM to Prevent Multiple Pulses
resistor between the C
T
and the discharge terminals•Dual Source/Sink Output Drivers
provides a wide range of dead-time adjustment.These devices also feature built-in soft-start circuitrywith only an external timing capacitor required. Ashutdown terminal controls both the soft-start circuitryand the output stages, providing instantaneous turnoff through the PWM latch with pulsed shutdown, aswell as soft-start recycle with longer shutdowncommands.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
DESCRIPTION (continued)
ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
(1)
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-startcapacitor discharged for sub-normal input voltages. This lockout circuitry includes approximately 500 mV ofhysteresis for jitter- free operation. Another feature of these PWM circuits is a latch following the comparator.Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period.The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinkingin excess of 200 mA. The UC1525A output stage features NOR logic, giving a LOW output for an OFF state. TheUC1527A utilizes OR logic which results in a HIGH output level when OFF.
UCx52xA UNIT
+V
IN
Supply voltage 40V
C
Collector supply voltage 40
VLogic inputs – 0.3 to +5.5Analog inputs – 0.3 to +V
IN
Output current, source or sink 500Reference output current 50 mAOscillator charging current 5Power dissipation at T
A
= +25 °C
(2)
1000
mWPower dissipation at T
C
= +25 °C
(2)
2000Operating junction temperature – 55 to 150Storage temperature range – 65 to 150 °CLead temperature (soldering, 10 seconds) 300
(1) Values beyond which damage may occur.(2) See Thermal Characteristics table.
MIN MAX UNIT
+V
IN
Input voltage 8 35
VV
C
Collector supply voltage 4.5 35Sink/source load current (steady state) 0 100Sink/source load current (peak) 0 400 mAReference load current 0 20Oscillator frequency range 100 400 HzOscillator timing resistor 2 150 k Ω
Oscillator timing capacitorm 0.001 0.01 µFDead time resistor range 0 500 Ω
UC1525A, UC1527A – 55 125Operating ambient temperature range UC2525A, UC2527A – 25 85 °CUC3525A, UC3527A 0 70
(1) Range over which the device is functional and parameter limits are assured.
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
THERMAL CHARACTERISTICS
CONNECTION DIAGRAMS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
INV Input
NI Input
SYNC
OSC Output
CT
RT
Discharge
Soft Start
VREF
+VIN
Output B
VC
Ground
Output A
Shutdown
Compensation
J or N PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
Output B
VC
NC
Ground
Output A
SYNC
OSC Output
NC
CT
RT
Q AND L PACKAGES
(TOP VIEW)
NI Input
INV Input
NC
Compensation
Shutdown V
+V
Discharge
Soft Start
NC
IN
REF
NC − No internal connection
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
over operating free-air temperature range (unless otherwise noted)
PACKAGE θ
JA
θ
JC
J-16 80-120 28N-16 90 45DW-16 45-90 25PLCC-20 43-75 34LCC-20 70-80 20
PLCC-20, LCC-20
DIL-16
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
ELECTRICAL CHARACTERISTICS
f+1
CTǒ0.7RT)3RDǓ
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
+V
IN
= 20 V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REFERENCE
UC152xA, UC252xA 5.05 5.10 5.15Output voltage T
J
= 25 °C VUC352xA 5.0 5.1 5.2Line regulationg V
IN
= 8 V to 35 V 10 20Load regulationg I
L
= 0 mA to 20 mA 20 50 mVTemperature stability
(1)
Over operating range 20 50UC152xA, UC252xA 5.0 5.2Total output variation
(1)
Line, load, and temperature VUC352xA 4.95 5.25Shorter circuit current V
REF
= 0, T
J
= 25 °C 80 100 mAOutput noise Voltage
(1)
10 Hz ≤10 kHz, T
J
= 25 °C 40 200 µVrmsLong term stability
(1)
T
J
= 125 °C 20 50 mV
OSCILLATOR SECTION
(2)
Initial accuracy
(1) (2)
T
J
= 25 °C 2% 6%UC152xA, UC252xA 0.3% 1%Voltage stability
(1) (2)
V
IN
= 8 V to 35 V
UC352xA 1% 2%Temperature stability
(1)
Over operating range 3% 6%Minimum frequency R
T
= 200 k Ω, C
T
= 0.1 µF 120 HzMaximum frequency R
T
= 2 k Ω, C
T
= 470 pF 400 kHzCurrent mirror I
RT
= 2 mA 1.7 2.0 2.2 mAClock amplitude
(1) (2)
3.0 3.5 VClock width
(1) (2)
T
J
= 25 °C 0.3 0.5 1.0 µsSyncronization threshold
(1) (2)
1.2 2.0 2.8 VSync input current Sync voltage = 3.5 V 1.0 2.5 mA
ERROR AMPLIFIER SECTION (V
CM
= 5.1 V)
UC152xA, UC252xA 0.5 5 mVInput offset voltage
UC352xA 2 10Input bias current 1 10
µAInput offset current 1DC open loop gain R
L
≥10 M Ω60 75 dBGain-bandwidth product
(1)
A
V
= 0 dB, T
J
= 25 °C 1 2 MHzDC transconductanc
(1) (3)
T
J
= 25 °C, 30 k Ω ≤ R
L
≤1 M Ω1.1 1.5 mSLow-level output voltage 0.2 0.5
VHigh-level output voltage 3.8 5.6Common mode rejection V
CM
= 1.5 V to 5.2 V 60 75
dBSupply voltage rejection V
IN
= 8 V to 35 V 50 60
(1) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.(2) Tested at f
OSC
= 40 kHz (R
T
= 3.6 k Ω, C
T
= 0.01 µF, R
D
= 0. Approximate oscillator frequency is defined by:
(3) DC transconductance (g
M
) relates to DC open-loop voltage gain (A
V
) according to the following equation: A
V
= g
M
R
L
where R
L
is theresistance from pin 9 to ground. The minimum g
M
specification is used to calculate minimum A
V
when the error amplifier output isloaded.
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Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
+VIN
15
Q3
Q4
Q2Q1
1
2
Inv Input
NI Input
200 mA100 mA5.8 V 100 W
Comp
9
to PWM
Comparator
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
ELECTRICAL CHARACTERISTICS (continued)+V
IN
= 20 V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PWM COMPARATOR
Minimum duty-cycle 0%Maximum duty-cycle 45% 49%Zero duty-cycle 0.7 0.9Input threshold
(4)
VMaximum duty-cycle 3.3 3.6Input bias current
(4)
0.05 1.0 µA
SHUTDOWN
Soft-start current V
SD
= 0 V, V
SS
= 0 V 25 50 80 µASoft-start low level V
SD
= 2.5 V 0.4 0.7
VShutdown threshold To outputs, V
SS
= 5.1 V, T
J
= 25 °C 0.6 0.8 1.0Shutdown input current V
SD
= 2.5 V 0.4 1.0 mAShutdown Delay
(5)
V
SD
= 2.5 V, T
J
= 25 °C 0.2 0.5 µs
OUTPUT DRIVERS (each output) (V
C
= 20 V)
I
SINK
= 20 mA 0.2 0.4Low-level output voltage
I
SINK
= 100 mA 1.0 2.0I
SOURCE
= 20 mA 18 19 VHigh-level output voltage
I
SOURCE
= 100 mA 17 18Undervoltage lockout V
COMP
and V
SS
= High 6 7 8V
C
OFF Current
(6)
V
C
= 35 V 200 µARise Time
(5)
C
L
= 1 nF, T
J
= 25 °C 100 600
nsFall Time
(5)
C
L
= 1 nF, T
J
= 25 °C 50 300
TOTAL STANDBY CURRENT
Supply Current V
IN
= 35 V 14 20 mA
(4) Tested at f
OSC
= 40 kHz (R
T
= 3.6 k Ω, C
T
= 0.01 µF, R
D
= 0 Ω.(5) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production.(6) Collector off-state quiescent current measured at pin 13 with outputs low for UC1525A and high for UC1527A.
UC1525A Error Amplifier
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
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PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS
13
+VIN
Q5
Q4
+VREF Q6
Q3Q2Q1
5 kW10 kW10 kW
Clock F/F PWM
11
14 Output
2 kW
Q8
Q9
Q7
Q10
Q11
Q6 Ommitted
In UC1527A
+VC
+VSUPPLY Q1 To Output Filter
R2
R1
13
11
14
12
+VCA
B
UC1525A
GND
Return
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
Figure 1. UC1525A Output Circuit (1/2 circuit shown)
Figure 2. Grounded Driver Outputs For Single-Ended Supplies
For single-ended supplies, the driver outputs are grounded. The V
C
termainal is switched to ground by thetotem-pole source transistors on alternate oscillator cycles.
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www.ti.com
+15 V
13
11
14
12
D1
D2
Return
30 W
30 W
Q2
Q1 T1
D1, D2: UC3611
+VCA
B
UC1525A
GND
Source = VO − VOH
Sink = VOL
VIN = 20 V,
TA = 25°C
4
3
2
1
00.1 .1 .2 1
Saturation Voltage − V
Output Current, Source or Sink − A
13
11
14
12
Q2
Q1
+VCA
B
UC1525A
GND
+VSUPPLY
Return
R1
C1
R2
C2
R3
T1
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
Figure 3. Output Drivers With Low Source Impedance
The low source impedance of the output drivers provides rapid charging of power FET input capacitance whileminimizing external components.
Figure 4. UC1525A Output Saturation Characteristics.
Figure 5. Conventional Push-Pull Bipolar Design
In conventional push-pull bipolar designs, forward base drive is controlled by R1 – R3. Rapid turn-off times for thepower devices are achieved with speed-up capacitors C1 and C2.
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www.ti.com
13
12
Q2
Q1
+VCA
B
UC1525A
GND
+VSUPPLY
Return
R1
30 W
R2
C1
T1
11
14
D1, D2: UC3611
C2
VREF
RT
CT
16
Q1 Q5 Q8 7.4 kW
Q36
5Q6 Q9
2 kW14 kW
Ramp To PWM
Blanking To Outout
Q12
Q10 Q11
Q13 3 kW250 kW
Clock
Q14
25 kW
1 kW
2 kW
400 mA
5 pF
Q7
Q4
Q2
1 kW
3
7
12
SYNC
DISCHARGE
GND
23 kW
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
Figure 6. Low Power Transformers
Low power transformers can be driven by the UC1525A. Automatic reset occurs during dead time, when bothends of the primary winding are switched to ground.
Figure 7. UC1525A Oscillator Schematic
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www.ti.com
Shutdown Options (See Block Diagram)
RD = 0
CT = .01 µF
CT = .02 µF
CT = .05 µF
CT = 0.1 µF
CT = 1 nF
CT = 5 nF
CT = 2 nF
6 5 7
RTRD
CT
200
100
50
20
10
5
2
− Timing Resistance − kRTΩ
1 2 5 10 20 50 100 200 1ms 2ms 5ms10ms
Charge Time − ms
500
400
300
200
100
00.2 0.5 1 2 5 10 20 50 100 200
− Dead Time Resistance −RDΩ
Charge Time − ms
CT = 1 nF
CT = 2 nF
CT = 5 nF
CT = .01 µF
CT = .05 µF
CT = 0.1 µF
CT = .02 µF
125°C
25°C
−55°C
Max RD For a Given RT,
Min RT For a Given RD
500
400
300
200
100
02 4 6 8 10 12
Minimum Recommended RT − kW
Maximum recommended RD
RL = ∞ RL = 1 MΩ
RL = 300 kΩ
RL = 100 kΩ
RL = 30 kΩ
Voltage Gain
Phase
80
60
40
20
0
100 1 k 10 k 100 k 1 M 10 M
f − Frequency − Hz
Open-Loop Voltage Gain − dB
−360°
−270°
−180°
Open-Loop Phase
VIN = 20 V,
TJ = 25°C
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either canreadily accept a pull-down signal which only has to sink a maximum of 100 A to turn off the outputs. This issubject to the added requirement of discharging whatever external capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance theavailable shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions;the PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150-A current sinkbegins to discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal isterminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenientimplementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, willultimately discharge this external capacitor, recycling slow turn-on upon release.
Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation. All transitions ofthe voltage on pin 10 should be within the time frame of one clock cycle and not repeated at a frequency higherthan 10 clock cycles.
Oscillator Charge Time vs R
T
and C
T
Oscillator Discharge Time vs R
T
C
T
Figure 8. Figure 9.
Maximum Value R
D
vs Minimum Value R
T
Error Amplifier Voltage Gain and Phase vs Frequency
Figure 10. Figure 11.
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A
www.ti.com
VREF
PWM
Adj.
3 kW
10 kW
1.5 kW
3.6 kW
.009
0.1
1 = VOS
2 = I(+)
3 = I(−)
V/I Meter
−
+
Clock
SYNC
RT
Deadtime
Ramp 100 W
.001 Comp
10 kW0.1
0.1
Oscillator
16
4
3
6
7
5
9
1
2
15
13
11
14
12
8
10
Reference
Regulator
Flip/
Flop
PWM
E/A
D.U.T.
A
B
+VIN
0.1
VC
0.1
Out A
1 k, 1 W
(2)
Out B
Gnd
Soft-Start
5 mF
50 mA
5 kW
5 kW
5 kWVREF
Shutdown
12
3
1
2
3
3
1
2
12
3
UC1525A, UC1527AUC2525A, UC2527AUC3525A, UC3527A
SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued)
Figure 12. Lab Test Fixture
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PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-89511012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-89511032A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-8951103EA ACTIVE CDIP J 16 1 TBD Call TI Call TI
5962-89511042A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-8951104EA ACTIVE CDIP J 16 1 TBD Call TI Call TI
UC1525AJ ACTIVE CDIP J 16 25 TBD A42 N / A for Pkg Type
UC1525AJ883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC1525AL ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UC1525AL883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UC1527AJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC1527AJ883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC1527AL883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UC2525ADW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525ADWG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525ADWTR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525ADWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525AJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC2525AN ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2525ANG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2525BDW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525BDWG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2525BN ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UC2525BNG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2527AN ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2527ANG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3525ADW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3525ADWG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3525ADWTR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3525ADWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3525AJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC3525AN ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3525ANG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3525AQ ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC3525AQG3 ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC3527AJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type
UC3527AN ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3527ANG4 ACTIVE PDIP N 16 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2012
Addendum-Page 3
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1525A, UC1527A, UC2525A, UC2525AM, UC3525A, UC3525AM, UC3527A, UC3527AM :
•Catalog: UC3525A, UC3527A, UC2525A, UC3525AM, UC3525A, UC3527AM, UC3527A
•Military: UC2525AM, UC1525A, UC1525A, UC1527A, UC1527A
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UC2525ADWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
UC3525ADWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UC2525ADWTR SOIC DW 16 2000 367.0 367.0 38.0
UC3525ADWTR SOIC DW 16 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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