MB3782PF - Fujitsu Quantum Devices Limited

DS04-27205-5E

FUJITSU SEMICONDUCTOR

DATA SHEET

ASSP Power Supplies

BIPOLAR

Switching Regulator Controller

MB3782

■DESCRIPTION

The FUJITSU MB3782 is a PWM-type switching regulator controller, designed with open-collector output for

connection to external drive transistors and coils, providing a selection of three types of output voltage: step-up,

step-down or inverting (inverting output is available on one circuit only).

The MB3782 features identical oscillator output waveforms to enable completely synchronous operation and

prevent the occurrence of low-frequency beat between channels.

Also, the MB3782 features low power dissipation (2.1 mA Typ) and a built-in standby mode (10 µA), making

possible the configur ation of a wide variety of high-efficiency, stable po w er supplies , ev en with the use of battery

power. The MB3782 is an ideal power supply for high-performance portable devices such as video camcorders

and cameras.

■FEATURES

• Wide voltage range (3.6 V to 18 V)

• Low power dissipation (operating mode: 2.1 mA (Typ), standby mode: 10 µA (Max)

• Wide range of oscillator frequencies, high-frequency capability (1 to 500 kHz)

• On-chip timer-latch type short detection circuit

• On-chip undervoltage lockout circuit

• On-chip 2.50 V reference voltage circuit (1.25 V output available at RT pin)

• Dead time adjustment over full duty cycle range

• On-chip standby mode (power on/off function)

■PACKAGE

(DIP-20P-M01)

Plastic DIP, 20 pin Plastic SOP, 20 pin

(FPT-20P-M01)

MB3782

■PIN ASSIGNMENT

■PIN DESCRIPTION

(Continued)

Pin No. Pin Name I/O Description

REF O2.50 V (typ) voltage output: provides load current up to 3 mA,

for use as error amplifier reference input and for dead time

setting.

T—Oscillator timing capacity connection: should be used in the

capacity range 150 to 15000 pF.

T—Oscillator timing resistor connection: should be used in the

resistance range 5.1 to 100 kΩ. This pin can also provide

output at voltage level VREF/2, for use as error amplifier

reference input.

4 +IN1 I Error amplifier 1 non-inverting input pin.

5 –IN1 I Error amplifier 1 inverting input pin.

6FB1O

Error amplifier 1 output pin: connect resistor and capacitor

between this pin and the –IN1 pin to set gain and adjust

frequency characteristics.

7DTC1*1IOUT1 dead time setting pin: VREF voltage is divided by an

e xternal resistor and applied to set dead time. Also, a capacitor

ma y be connected between this pin and the GND pin to perf orm

soft start operations.

VCC

CTL

– IN3

FB3

DTC3

OUT3

SCP

– IN2

FB2

DTC2

VREF

+ IN1

– IN1

FB1

DTC1

PUT1

GND

OUT2

TOP VIEW

(DIP-20P-M01)

(FPT-20P-M01)

MB3782

(Continued)

*1: DTC = Dead Time Control

*2: SCP = Short Circuit Protection

Pin No. Pin Name I/O Description

8VOUT1O

Open collector type output pin with an emitter connected to

GND.

Output current may be up to 50 mA.

9 GND — Ground pin

10 OUT2 O Open collector type output pin with an emitter connected to

GND. Output current may be up to 50 mA.

11 DTC2*1IUsed to set OUT2 pin dead time. VREF voltage is divided by an

e xternal resistor and applied to set dead time. Also, a capacitor

ma y be connected between this pin and the GND pin to perf orm

soft start operations.

12 FB2 O Error amplifier 2 output pin: connect resistor and capacitor

between this pin and the –IN2 pin to set gain and adjust

frequency characteristics.

13 –IN2 I Error amplifier 2 inverting input pin.

14 SCP*2—

Time constant setting capacitor connection for timer-latch

type short prevention circuit: a capacitor should be connected

between this pin and the GND pin. For details, see “■ Setting

the Time Constant for the Timer-Latch Type Short Prevention

Circuit.”

15 OUT3 O Open collector type output pin for emitter connected to GND.

Output current may be up to 50 mA.

16 DTC3*1IUsed to set OUT3 pin dead time. VREF voltage is divided by an

e xternal resistor and applied to set dead time. Also, a capacitor

ma y be connected between this pin and the GND pin to perf orm

soft start operations.

17 FB3 O Error amplifier 3 output pin: connect resistor and capacitor

between this pin and the –IN3 pin to set gain and adjust

frequency characteristics.

18 –IN3 I Error amplifier 3 inverting input pin.

19 CTL I Power supply control pin: low level places the IC in standby

mode and reduces pow er consumption to 10 µA or lo w er. Input

level may be driven by TTL or CMOS.

20 VCC — Power supply pin: voltage range is 3.6 to 18 V.

MB3782

■BLOCK DIAGRAM

3 2 1 20 19

GND

OUT1

OUT2

OUT3

+ IN1

– IN1

FB1

DTC1

– IN2

FB2

DTC2

– IN3

FB3

DTC3

SCP

Latch U.V.L.O.

VREF

CLTVCCVREFCTRT

1.25 V 2.5 V

–

–+

–

Error Amp.1 PWM Comp. Ch.1

Ch.2

Ch.3

PWM Comp.

Error Amp.2

Error Amp.3

1.25 V

2.1 V

SCP Comp. –

–

1 µA

Triangular wave

oscillator

Reference

voltage

source

Power on/off

control

circuit

MB3782

■FUNCTIONAL DESCRIPTIONS

1. Reference Voltage Source

The ref e rence voltage source uses the voltage pro vided at the power supply pin (pin 20) to generate a temper-

ature-compensated reference voltage (≅ 2.50 V), which is used as the operating powe r supply for the inter nal

circuits of the IC. The reference voltage source can be output through the VREF pin (pin 1).

2. Triangular Wave Oscillator

By connecting a timing capacitor and resistor respectiv ely to the CT pin (pin 2) and RT pin (pin 3), the oscillator

can provide a triangular waveform at any desired frequency.

The wavefor m has an amplitude of 1.3 V to 1.9 V, and can be connected to the non-inver ting input of the on-

chip PWM comparator and also output through the CT pin.

3. Error Amps

The error amps are amplifiers that detect the output voltage of the switching regulator and send the PWM control

signal. The common-mode input voltage range is 1.05 V to 1.45 V, so that the voltage applied to the non-inverting

input pin as a ref erence voltage should be either the v oltage obtained by dividing the IC ref erence voltage output

(recommended value: VREF/2) or the voltage obtained from the RT pin (1.25 V). The non-inverting input for the

error amps 1 and 2 is internally connected to VREF/2 voltage.

Also , a feedbac k transistor and capacitor can be connected between the error amp output pin and inv erting input

pin to provide any desired level of loop gain, enabling stable phase compensation.

4. Timer Latch (S-R Latch) Type Short Prevention Circuit

The timer-latch type shor t prevention circuit detects the output levels from each of the error amps. Whenever

one or more error amps produces an output level of 2.1 V or higher, the timer circuit is activated starting the

charging of the external protection enabler capacitor.

If the error amp output v oltage does not return to normal range bef ore the voltage in this capacitor reaches the

transistor’ s base-emitter junction voltage (VBE (≅ 0.65 V)), the latch circuit will operate to turn the output transistor

off and at the same time set the dead time to 100%.

Once the prevention circuit is activated, the power must be switched on again to resume normal operation.

5. Low Input Voltage Fault Prevention Circuit (Under Voltage Lock-Out (UVLO) function)

When pow er is s witched on, excess po wer or momentary drops in pow er line current can cause operating f aults

in the controller IC, which can in turn lead to damage or deterioration in systems.

The low input v oltage fault pre vention circuit detects the internal reference v oltage level with respect to the power

supply voltage level and acts to reset the latch circuit, thereby turning the output transistor off and at the same

time setting the dead time to 100% and holding the SCP pin (pin 14) at “low.” Operation returns to normal when

the power supply voltage reaches or exceeds the UVLO threshold voltage level.

6. PWM Comparator

The PWM comparator is a voltage comparator with one inverting and two non-inverting inputs, which acts as a

voltage to pulse width converter controlling the on-time of the output pulse according to the input voltage level.

When the triangular waveform produced by the oscillator is lower than either the error amp output or the DTC

pin voltage, the output transistor is switched on.

It is also possible to use the DTC terminal to provide a soft start function.

7. Output Transistor

The output is open-collector type, with the emitter of the output tr ansistor connected to the GND pin. The power

transistor for external switching can carry a base current of up to 50 mA.

8. Power Supply Control

Power supply on/off control is enab led through the CTL pin (pin 19). (In standby mode, power supply current is

10 µA or less.)

MB3782

■SETTING THE TIME CONSTANT FOR THE TIMER-LATCH TYPE SHORT PREVENTION

CIRCUIT

Figure 1 shows the configuration of the protection latch circuit.

The output lines from the error amps are each connected to the inverting input lines of the short protection

comparator, which constantly compares them with the reference voltage of approximately 2.1 V connected to

the non-invert ing input.

When load conditions in the switching regulator are stabilized, there is no variation in the output from the error

amps, and therefore the shor t prevention controls are held in equilibrium. In this situation, voltage at the SCP

pin (pin 14) is held at approximately 50 mV.

When load conditions change rapidly, as in the case of a load shor t, high potential signal (greater than 2.1V)

from the error amps is input to the inverting signal input of the short protection comparator, and the short protection

comparator outputs a “lo w” level signal. The tr ansistor Q1 is consequently switched off , so that short protection

capacitor CPE e xternally connected to the SCP pin voltage is then charged according to the following formulas.

VPE = 50 mV + tPE × 10–6/CPE

0.65 = 50 mV + tPE × 10–6/CPE

CPE = tPE/0.6 (µF)

When the shor t protection capacitor is charged to a level of approximately 0.65 V, the SR latch is set and the

low input voltage f ault prev ention circuit is enabled, turning the output drive transistor off. At the same time , the

dead time is set to 100% and the SCP pin (pin 14) is held “low.” This closes the S-R latch input and then

discharges the capacitor CPE

–

1 µA

CPE SR

Latch U.V.L.O.

2.50 V

Out

PWM

Comp.

Q3Q1

S.C.P.Comp.

Error Amp.1

Error Amp.2

Error Amp.3

2.1 V

Figure 1 Protection Latch Circuit

MB3782

■SETTING OUTPUT VOLTAGE

The following diagrams show the connections used to set the output voltage.

Because the pow er supply to the error amps is provided b y the same reference v oltage circuit used f or the other

internal circuits, the common-mode input voltage range is set at 1.05 V to 1.45 V.

The ref erence v oltage input to the +IN and -IN pins should be set at 1.25 V (VREF/2). The method of connection

for channel 1 is different from channel 2 and channel 3. In addition, channel 1 is capable of picking up both

positive and negative voltages, while channel 2 and channel 3 can pick up only positive output voltages.

RNF

R2R

–

R1R

VREF

V0 +V0 + = 2·R2

VREF · (R1 + R2)

pin 6

Figure 2 Error amp (channel 1) connection: Output voltage VO positive

RNF

R2R

–

R1R

VREF

V0 – = – 2·R2

VREF · (R1 + R2) + VREF

pin 6

V0 –

Figure 3 Error amp (channel 1) connection: Output voltage VO positive

MB3782

The non-inver ting input to the error amps on channel 2 and channel 3 is internally connected to VREF/2, and

therefore cannot be configured for inverting output.

ch-1 ch-2 ch-3

Step up ●●●

Step down ●●●

Inverting ●××

RNF

–

V0 + = R2

1.25 · (R1 + R2)

pin 12,17

V0 +

1.25 V

Figure 4 Error amp (channel 2, channel 3) connection

MB3782

■USING THE RT PIN

The triangular waves, as sho wn in Figure 5, act to set the oscillator frequency by charging and discharging the

capacitor connected to the CT pin using the current value of the resistor connected to the RT pin.

In addition, when v oltage lev el VREF/2 is output to e xternal circuits from the RT pin, care must be taken in making

the external circuit connections to adjust for the fact that I1 is increased by the value of the current I2 to the

external circuits in determining the oscillator frequency (see Figure 6).

VREF

RTCT

ICTIRT

ICT = IRT

=VREF

2RT

Triangular wave oscillator

Figure 5 No VREF/2 connection to external circuits from RT pin

VREF

RTCT

ICTIRT

ICT = IRT

= I1 + I2

Triangular wave generator

IRT

= + I2

VREF

2RT

To external circuits

Figure 6 VREF/2 connection to external circuits from RT pin

MB3782

■TREATMENT OF UNUSED ERROR AMPS

Any error amps that are not used should be handled as follows.

Note that failure to apply proper treatment to error amps will cause the SCP circuit to activate and disable the

switching regulator output.

1. Error Amp (channel 1) Not In Use

2. Error Amp (channel 2) Not In Use

3. Error Amp (channel 3) Not In Use

GND

DTC1

– IN1

VREF

+ IN1

Note: Pin 6 and pin 8 shoud be left open.

913

GND

DTC2

– IN2

VREF

Note: Pin 10 and pin 12 shoud be left open.

GND

DTC3

– IN3

VREF

Note: Pin 15 and pin 17 shoud be left open.

MB3782

■TREATMENT OF UNUSED SCP PIN

When the timer latch shor t protection circuit is not used, the SCP pin should be connected to the GND by the

shortest possible path.

SCP

MB3782

■ABSOLUTE MAXIMUM RATINGS (Ta = +25°C)

*1: For operation in conditions where Ta > +25°C , the SOP version should be derated by 7.4 mW/°C , and the DIP

version should be derated by 11.1 mW/°C.

*2: When mounted on a 4 cm-square dual-sided epoxy board.

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■RECOMMENDED OPERATING CONDITIONS

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

FUJITSU representatives beforehand.

Parameter Symbol Condition Rating Unit

Min Max

Power supply voltage VCC ——20V

Error amp input voltage VIN — –0.3 +10 V

Dead time control input voltage Vdt — –0.3 +2.8 V

Control input voltage VCTL — –0.3 +20 V

Collector output voltage VOUT ——20V

Collector output current IOUT ——75mA

Allowable loss PD*1Ta ≤ +25°CSOP Version — 740*2mW

DIP Version — 1110

Operating temperature Top — –30 +85 °C

Storage temperature Tstg — –55 +125 °C

Parameter Symbol Condition Value Unit

Min Typ Max

Power supply voltage VCC — 3.6 6.0 18.0 V

Error amp input voltage VIN —1.05—1.45V

Control input voltage VCTL —0—18V

Collector output voltage VOUT ———18V

Collector output current IOUT —0.3—50mA

Reference voltage output current IREF —–3–10mA

Timing capacitance CT— 150 — 15000 pF

Timing resistance RT— 5.1 — 100 kΩ

Oscillator frequency fOSC — 1 — 500 kHz

Operating temperature Top — –30 +25 85 °C

MB3782

■ELECTRICAL CHARACTERISTICS (VCC = 6 V, Ta = +25°C)

(Continued)

Parameter Symbol Conditions Value Unit

Min Typ Max

Reference voltage

Output voltage VREF IOR = –1 mA 2.45 2.50 2.55 V

Output voltage

temperature variation VRTC Ta = –30°C to +85°C–2±0.2 2 %

Input stability Line VCC = 3.6 V to 18 V — 2 10 mV

Load stability Load IOR = –0.1 mA to –1 mA — 1 7.5 mV

Short output current IOS VREF = 2 V –30 –10 –3 mA

Undervoltage lock

out circuit (UVLO)

Threshold voltage VtH IOR = –0.1 mA — 2.72 — V

VtL IOR = –0.1 mA — 2.60 — V

Hysteresis width VHYS IOR = –0.1 mA 80 120 — mV

Reset voltage (VCC)V

R—1.51.9—V

Short circuit protection

(SCP)

Input threshold voltage VtPC — 0.60 0.65 0.70 V

Input standby vo ltage VSTB No pull-up — 50 100 mV

Input latch voltage VIN No pull-up — 50 100 mV

Input source current Ibpc — –1.4 –1.0 –0.6 µA

Comparator threshold

voltage VtC Pin 6, pin 12, pin 17 — 2.1 — V

Triangular wave

oscillator

Oscillator frequency fOSC CT = 330 pF, RT = 15 kΩ160 200 240 kHz

Frequency deviation fdev CT = 330 pF, RT = 15 kΩ—±5—%

Frequency deviation (VCC)f

dV VCC = 3.6 V to 18 V — ±1—%

Frequency deviation (Ta) fdT Ta = –30°C to +85°C–4—+4%

Dead time controller

(DTC)

Input threshold voltage Vt0 Duty cycle = 0 % 1.05 1.3 — V

Vt100 Duty cycle = 100 % — 1.9 2.25 V

ON duty cycle Dtr Vdt = VR/1.45 V 55 65 75 %

Input bias current Ibdt ——0.21µA

Latch mode sink current Idt Vdt = 2.5 V 150 500 — µA

Latch input voltage Vdt Idt = 100 µA——0.3V

MB3782

(Continued)

(VCC = 6 V, Ta = +25°C)

Notes : •Voltage control on channel 1 may be positive or negative.

•The non-inverting input to the error amps on channel 2 and channel 3 is internally connected to VREF/2,

and therefore voltage control is positive only.

•VREF/2 output can be obtained from the RT pin.

Parameter Symbol Conditions Value Unit

Min Typ Max

Error amps

Input offset voltage VIO VOUT = 1.6 V –6 — 6 mV

Input offset current IIO VOUT = 1.6 V –100 — 100 nA

Input bias current IBVOUT = 1.6 V –500 –100 — nA

Common mode input

voltage range VICR VCC = 3.6 V to 18 V 1.05 — 1.45 V

Voltage gain Av — 70 80 — dB

Frequency bandwidth BW Av = 0 dB — 0.8 — MHz

Common mode rejection

ratio CMRR — 60 80 — dB

Maximum output voltage

range VOM+—

VREF

–0.3 ——V

VOM-——0.70.9V

Output sink current IOM+V

OUT = 1.6 V — 1.0 — mA

Output source current IOM-V

OUT = 1.6 V — –60 — µA

PWM

comparator

Input threshold voltage Vt0 Duty cycle = 0 % 1.05 1.3 — V

Vt100 Duty cycle = 100 % — 1.9 2.25 V

Input sink current IIN+ Pin 6, pin 12, pin 17 — 1.0 — mA

Input source current IIN- Pin 6, pin 12, pin 17 — –60 — µA

Control

block

Input OFF conditions VOFF ———0.7V

Input ON conditions VON —2.1——V

Control pin current ICTL VCTL = 10 V — 200 400 µA

Output

block

Output leak current Leak VOUT = 18 V — — 10 µA

Output saturation voltage VSAT IOUT = 50 mA — 1.1 1.4 V

Entire

device

Standby current ICCS VCTL = 0 V — — 10 µA

Average feed current ICCa VCTL = VCC, no output load — 2.1 3.2 mA

MB3782

■TEST CIRCUIT

330 pF

150 kΩ

TEST

INPUT

TEST

INPUT

CPF

OUTPUT

INPUT

TEST 4.7 kΩ

VCC

CTL

4.7 kΩ

OUTPUT

4.7 kΩ

MB3782

■TIMING CHART (INTERMAL WAVEFORMS)

2.1 V

1.9 V

1.6 V

1.3 V

“High”

“Low”

“High”

“Low”

0.6 V

0 V

“High”

“Low”

3.6 V

0 V

2.1 V

CT pin wavefoms

Short protection comparator reference input

Error amp output

PWM comparator output

Dead time,PWM input voltage

Output transistor-collector waveforms

SCP pin waveforms

Short protection comparator output

Control pin voltage (VCTL: minimum value)

Power ON

Power supply voltage (VCC: minimum)

Power OFF

Protection enable time tPE ≅ 0.6 × 106 × CPE (µs)

Dead time 100 %

tPE

MB3782

■EXAMPLE OF APPLICATION

0.033 µF150 kΩ

+ IN1

VIN (6 V)

CTL

0.033 µF150 kΩ

1.8 kΩ

4.7 kΩ

8.2 kΩ

0.1 µF

820 PF

56 µH

1 µF

1.8 kΩ

1 µF

4.7 kΩ

10 kΩ

2.4 kΩ

10 kΩ

4.7 kΩ

10 kΩ

9.1 kΩ

5.6 kΩ

16 kΩ

120 µH

330 Ω

120 µH

100 Ω

3.9 kΩ

120 µH

220 µF+

–

220 µF

111 16 20 19

– IN1

FB1

– IN2

FB2

– IN3

FB3

SCP

MB 3782

OUT1

OUT2

OUT3

GND

V0 +

( + 12 V )

V0 +

( + 5 V )

V0 –

( – 5 V )

VREF VCCDTC1 DTC2 DTC3 CTL

MB3782

■ TYPICAL CHARACTERISTICS CURVES

(Continued)

5.0

2.5

Power supply voltage vs.reference voltage

Ta = +25˚C

04 8 12 16 20

Power supply voltage VCC (V)

Reference voltage VREF (V)

Power supply voltage vs.average feed current

Power supply voltage VCC (V)

Timihg capacitance CT (pF)

04 8 12 16 20

3.0

1.5

Ta = +25˚C

2.51

2.50

2.49

2.48

2.47

2.46

2.45

- 40 - 20 0 20 40 60 80 100

Reference voltage VREF (V)

VCC = VCTL = 6 V

IOR = -1 mA

1.6

2.0

1.8

1.4

1.2

1.0

0.8 102

2.2

103104

Ambient temperature vs.reference voltage

Ambient temperature Ta (˚C)

Timing capacity vs.triangular wave maximum amplitude voltage

VCC = 6 V

RT = 15 kΩ

Ta = +25˚C

3.0

2.0

1.0

100 500 1 k 5 k 10 k 50 k 100 k 500 k

Ta = +25˚C

VCC = 6 V

2.0

1.5

1.0

0.5

001020304050

Sink current IOL (mA)

Sink current vs.collector saturation voltage

Collector saturation voltagre VOL (V)

Error amp maximum output voltage amplitude (V)

Frequency vs.error amp maximum output voltage amplitude

Fequency f (Hz)

Ta = +25˚C

VCC = 6 V

Average feed current (mA)

Triangular wave maximum

amplitude voltage (V)

MB3782

(Continued)

1 M

100 k

10 k

1 k1 k 5 k 10 k 50 k 100 k 500 k

= 150 pF

= 1500 pF

= 15000 pF

100

110

Power supply voltage vs. triangular wave period

Timing capacitance C

(pF)

Timing resistance vs.oscillator frequency

Timing resistance R

(Ω)

Oscillator frequency f

OSC

(Hz)

Triangular wave period(µs)

Ð 10

20 0 20 40 60 80 100 120

= 6 V

Ta = +25˚C

Ambient temperature vs.oscillator frequency

Ambient temperature Ta (˚C)

Frequency variation f

(%)

100

05 k 10 k 50 k 100 k 500 k 1 M

Oscillator frequency vs.duty cycle

Oscillator frequency (Hz)

Control voltage vs.reference voltage

Control voltage V

CTL

(V)

Reference voltage V

REF

(V)

5.0

2.5

0012345

Duty Cycle Dtr (%)

Control current I

CTL

(µA)

500

250

0048121620

Control input current

Control voltage V

CTL

(V)

= 6 V

= 15 kΩ

Ta = +25˚C

= 6 V

= 330 pF

= 15 kΩ

= 6 V

= 1330 pF

= 15 kΩ

Ta = +25˚C

= 6 V

= +25˚C V

= 6 V

= +25˚C

MB3782

(Continued)

OUT

4.7 kΩ4.7 kΩ

240 kΩ

CNF

VREFVREF

4.7 kΩ4.7 kΩ

10 µF

Error amp

10 100 1 k 10 k 100 k 1 M

-40

-20

-180

-90

180

CNF = 470 pF

CNF = 4700 pF

-40

-20

-180

-90

180

10 100 1 k 10 k 100 k 1 M

Frequenncy f (Hz)Frequenncy f (Hz)

Frequenncy vs.gain and phase Frequenncy vs.gain and phase

Gain AV (dB)

Phase ϕ (deg)

Gain AV (dB)

Test Circuit

10 100 1 k 10 k 100 k 1 M

Frequenncy f (Hz)

10 100 1 k 10 k 100 k 1 M

Frequenncy f (Hz)

-180

-90

180

-40

-20

Gain AV (dB)

Phase ϕ (deg)

-40

-20

Gain AV (dB)

-180

-90

180

Phase ϕ (deg)

Frequenncy vs.gain and phase Frequenncy vs.gain and phase

φφ

CNF = 0.047 pF

CNF = open

MB3782

(Continued)

-30 -20 -100 102030405060708085

200

400

600

800

740

1000

1110

1200

Allowable loss PD (mW)

Ambient temperature vs.allowable loss

Ambient temperature Ta (˚C)

SOP version

DIP version

MB3782

■APPLICATIONS

• Concerning Equivalent Series Resistance and Stability of Smoothing Capacitors

In DC/DC converters, the equivalent series resistance value (ESR) of smoothing capacitors has a major influence

on loop phase characteristics.

The ESR is a means by which phase characteristics approximate phase relationships to ideal capacitors in high-

frequency bands (see Graph 1), thus improving system stability. At the same time, the use of smoothing capacitors

with low ESR reduces system stability, so that care must be taken when using semiconductor electrolytic ca-

pacitors (OS capacitors) or tantalum capacitors with low ESR.

Tr L

VIN

Figure 7 Basic circuit for step-down voltage DC/DC converter

10 100 1 k 10 k 100 k

– 60

– 40

– 20

Gain (dB)

Frequency vs.Gain

Phase (deg)

Frequency f (Hz)

Frequency vs.phase

Frequency f (Hz)

10 100 1 k 10 k 100 k

– 90

– 180

1: Rc = 0 Ω

: Rc = 31 mΩ2

1: Rc = 0 Ω

: Rc = 31 mΩ

Graph 1 Frequency vs. gain and phase

MB3782

• Reference data

Changing the smoothing capacitor from an aluminum electrolytic capacitor (RC ≅ 1.0Ω) to a lower-ESR semi-

conductor electrolytic capacitor (OS capacitor: RC ≅ 0.2 Ω) decreases the phase margin (see Graphs 2, 3).

V out V0 +

CNF

FB –

– IN

+ IN

R2VIN

VREF/2

Error amp

AV and phase characteristics

measured between these points

Figure 8 Measurement of DC/DC Capacitor AV and Phase (Ψ) Characteristics

–

Gain (dB)

DC/DC converter + 5 V output frequency vs.gain and phase

Frequency f (Hz)

Phase (deg)

Aluminum electrolytic

capacitor

220 µF (16 V)

RC ≅ 1.0 Ω

: fosc = 1 kHz

10 100 1 k 10 k 100 k

– 40

– 20

Av φ

62°

Vcc = 10 v

RL = 25 Ω

Cp = 0.1 µF

– 90

– 180

180 V0 +

–

Gain (dB)

– 40

– 20

Frequency f (Hz)

100 1 k 10 k 100 k

Phase (deg)

– 90

– 180

180

DC/DC converter + 5 V output frequency vs.gain and phase

Vcc = 10 v

RL = 25 Ω

Cp = 0.1 µF

OS capacitor

22 µF (16 V)

RC ≅ 0.2 Ω

: fosc = 1 kHz

27°

Graph 2

Graph 3

MB3782

■NOTES ON USE

• Take account of common impedance when designing the ear th line on a printed wiring board.

• Take measures against static electricity.

- For semiconductors, use antistatic or conductive containers.

- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.

- The work table, tools and measuring instruments must be grounded.

- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.

• Do not apply a negative voltage

- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in

malfunction.

■ORDERING INFORMATION

Part number Package Remarks

MB3782P Plastic DIP, 20 pin

(DIP-20P-M01)

MB3782PF Plastic SOP, 20 pin

(FPT-20P-M01)

MB3782

■PACKAGE DIMENSIONS

(Continued)

Plastic DIP, 20 pin

(DIP-20P-M01)

Dimensions in mm (inches) .

Note : The values in parentheses are reference values.

1994 FUJITSU LIMITED D20005S-3C-3

0.46±0.08

(.018±.003)

INDEX-2

2.54(.100)

TYP

–0.30

+0.20

24.64

15°MAX

0.51(.020)MIN

(.010±.002)

0.25±0.05

1.27 +0.30

–0

1.27(.050)

MAX

INDEX-1

–0

+0.30

0.86 +.012

–0

.034

.970 –.012

+.008

6.60±0.25

(.260±.010)

7.62(.300)

TYP

4.36(.172)MAX

3.00(.118)MIN

.050 –0

+.012

MB3782

(Continued)

Plastic SOP 20 pin

(FPT-20P-M01)

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

Dimensions in mm (inches) .

Note : The values in parentheses are reference values.

2002 FUJITSU LIMITED F20003S-c-7-7

0.13(.005) M

Details of "A" part

7.80±0.405.30±0.30

(.209±.012) (.307±.016)

–.008

+.010

–0.20

+0.25

12.70

INDEX

1.27(.050)

0.10(.004)

1 10

1120

0.47±0.08

(.019±.003)

–0.04

+0.03

0.17

.007 +.001

–.002

"A" 0.25(.010)

(Stand off)

0~8˚

(Mounting height)

2.00 +0.25

–0.15

.079 +.010

–.006

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

0.10 +0.10

–0.05

–.002

+.004

.004

.500*1

0.10(.004)

MB3782

FUJITSU LIMITED

The contents of this document are subject to change without notice.

Customers are advised to consult with FUJITSU sales

representatives before ordering.

The information, such as descriptions of function and application

circuit examples, in this document are presented solely for the

purpose of reference to show examples of operations and uses of

Fujitsu semiconductor device; Fujitsu does not warrant proper

operation of the device with respect to use based on such

information. When you develop equipment incorporating the

device based on such information, you must assume any

responsibility arising out of such use of the information. Fujitsu

assumes no liability for any damages whatsoever arising out of

the use of the information.

Any information in this document, including descriptions of

function and schematic diagrams, shall not be construed as license

of the use or exercise of any intellectual property right, such as

patent right or copyright, or any other right of Fujitsu or any third

party or does Fujitsu warrant non-infringement of any third-party’s

intellectual property right or other right by using such information.

Fujitsu assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result

from the use of information contained herein.

The products described in this document are designed, developed

and manufactured as contemplated for general use, including

without limitation, ordinary industrial use, general office use,

personal use, and household use, but are not designed, developed

and manufactured as contemplated (1) for use accompanying fatal

risks or dangers that, unless extremely high safety is secured, could

have a serious effect to the public, and could lead directly to death,

personal injury, severe physical damage or other loss (i.e., nuclear

reaction control in nuclear facility, aircraft flight control, air traffic

control, mass transport control, medical life support system, missile

launch control in weapon system), or (2) for use requiring

extremely high reliability (i.e., submersible repeater and artificial

satellite).

Please note that Fujitsu will not be liable against you and/or any

third party for any claims or damages arising in connection with

above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You

must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and

equipment such as redundancy, fire protection, and prevention of

over-current levels and other abnormal operating conditions.

If any products described in this document represent goods or

technologies subject to certain restrictions on export under the

Foreign Exchange and Foreign Trade Law of Japan, the prior

authorization by Japanese government will be required for export

of those products from Japan.

F0309

 FUJITSU LIMITED Printed in Japan