04/30/2010
Benefits
lImproved Gate, Avalanche and Dynamic
dv/dt Ruggedness
lFully Characterized Capacitance and
Avalanche SOA
lEnhanced body diode dV/dt and dI/dt
Capability
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IRFB3607PbF
IRFS3607PbF
IRFSL3607PbF
Applications
l High Efficiency Synchronous Rectification in
SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
S
D
G
VDSS 75V
RDS
(
on
)
typ. 7.34m
:
max. 9.0m
:
ID 80A
GDS
Gate Drain Source
TO-220AB
IRFB3607PbF
D
S
D
G
D
D
S
G
D2Pak
IRFS3607PbF
TO-262
IRFSL3607PbF
S
D
G
Absolute Maximum Ratings
Symbol Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, VGS @ 10V
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V A
I
DM
Pulsed Drain Current
d
P
D
@T
C
= 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
dv/dt Peak Diode Recovery
f
V/ns
T
J
Operating Junction and °C
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
Sin
g
le Pulse Avalanche Ener
g
y
e
mJ
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Ener
g
y
g
mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
θJC
Junction-to-Case
k
––– 1.045
R
θCS
Case-to-Sink, Flat Greased Surface, TO-220 0.50 ––– °C/W
R
θJA
Junction-to-Ambient, TO-220
j
––– 62
R
θJA
Junction-to-Ambient
(
PCB Mount
)
, D
2
Pak
jk
––– 40
120
46
14
140
27
-55 to + 175
± 20
0.96
10lb
x
in (1.1N
x
m)
300
Max.
80
c
56
c
310
PD - 97308B
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S
D
G
ISD 46A, di/dt 1920A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Note that current limitations arising from heating of the
device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
RG = 25, IAS = 46A, VGS =10V. Part not recommended for use
above this value.
Static @ T
J
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Volta
g
e 75 ––– ––– V
V
(BR)DSS
/
T
J
Breakdown Volta
g
e Temp. Coefficient ––– 0.096 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 7.34 9.0 m
V
GS(th)
Gate Threshold Volta
g
e 2.0 ––– 4.0 V
I
DSS
Drain-to-Source Leaka
e Current ––– ––– 20 µA
––– ––– 250
I
GSS
Gate-to-Source Forward Leaka
g
e ––– ––– 100 nA
Gate-to-Source Reverse Leaka
g
e ––– ––– -100
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
g
fs Forward Transconductance 115 ––– –– S
Q
g
Total Gate Char
g
e ––– 56 84 nC
Q
gs
Gate-to-Source Char
g
e ––– 13 –––
Q
gd
Gate-to-Drain ("Miller") Char
g
e ––– 16 –––
Q
sync
Total Gate Char
g
e Sync. (Q
g
- Q
gd
)––– 40 –––
R
G(int)
Internal Gate Resistance ––– 0.55 ––
t
d(on)
Turn-On Delay Time ––– 16 ––– ns
t
r
Rise Time ––– 110 ––
t
d(off)
Turn-Off Delay Time ––– 43 –––
t
f
Fall Time ––– 96 –––
C
iss
Input Capacitance ––– 3070 ––– pF
C
oss
Output Capacitance ––– 280 ––
C
rss
Reverse Transfer Capacitance ––– 130 ––
C
oss
eff. (ER) Effective Output Capacitance (Energy Related)
j
––– 380 –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related)
h
––– 610 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units
I
S
Continuous Source Current ––– ––– 80
c
A
(Body Diode)
I
SM
Pulsed Source Current ––– ––– 310
(Body Diode)
d
V
SD
Diode Forward Volta
g
e ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 33 50 ns T
J
= 25°C V
R
= 64V,
––– 39 59 T
J
= 125°C I
F
= 46A
Q
rr
Reverse Recovery Char
g
e ––– 32 48 nC T
J
= 25°C
di/d
t
=
100A/
µs
g
––– 47 71 T
J
= 125°C
I
RRM
Reverse Recovery Current ––– 1.9 ––– A T
J
= 25°C
t
on
Forward Turn-On Time Intrinsic turn-on time is ne
g
li
g
ible (turn-on is dominated by LS+LD)
Conditions
V
DS
= 50V, I
D
= 46A
I
D
= 46A
V
GS
= 20V
V
GS
= -20V
MOSFET symbol
showing the
V
DS
= 38V
Conditions
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
j
V
GS
= 0V, V
DS
= 0V to 60V
h
T
J
= 25°C, I
S
= 46A, V
GS
= 0V
g
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 5mA
d
V
GS
= 10V, I
D
= 46A
g
V
DS
= V
GS
, I
D
= 100µA
V
DS
= 75V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
I
D
= 46A
R
G
= 6.8
V
GS
= 10V
g
V
DD
= 49V
I
D
= 46A, V
DS
=0V, V
GS
= 10V
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM 4.5V
60µs PULSE WIDTH
Tj = 25°C
4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
60µs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM 4.5V
2345678
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 80A
VGS = 10V
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 102030405060
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 46A
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Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.0 0.5 1.0 1.5 2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
10
20
30
40
50
60
70
80
ID, Drain Current (A)
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
70
75
80
85
90
95
100
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 5mA
-10 0 10 20 30 40 50 60 70 80
VDS, Drain-to-Source Voltage (V)
0.00
0.20
0.40
0.60
0.80
1.00
1.20
Energy (µJ)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
450
500
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 5.6A
11A
BOTTOM 46A
1 10 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY RDS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
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Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.00
0.01
0.10
1.00
10.00
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci i/Ri
Ci= τi/Ri
τ
τC
τ4
τ4
R4
R4Ri (°C/W) τi (sec)
0.01109 0.000003
0.26925 0.000130
0.49731 0.001301
0.26766 0.008693
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
25
50
75
100
125
150
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 46A
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Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
0200 400 600 800 1000
diF /dt (A/µs)
0
5
10
15
20
IRR (A)
IF = 31A
VR = 64V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
80
160
240
320
400
480
560
QRR (A)
IF = 31A
VR = 64V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
5
10
15
20
IRR (A)
IF = 46A
VR = 64V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
80
160
240
320
400
480
560
QRR (A)
IF = 46A
VR = 64V
TJ = 25°C
TJ = 125°C
-75 -50 -25 025 50 75 100 125 150 175 200
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th), Gate Threshold Voltage (V)
ID = 100µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
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Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)
trtf
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
1K
VCC
DUT
0
L
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Inductor Current
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
TO-220AB packages are not recommended for Surface Mount Application.
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
(;$03/(
,17+($66(0%/</,1(&
7+,6,6$1,5)
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:((.
/2*2
5(&7,),(5
,17(51$7,21$/
Note: "P" in assembly line
position indicates "Lead-Free"
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D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
'$7(&2'(
<($5 
:((.
$ $66(0%/<6,7(&2'(
5(&7,),(5
,17(51$7,21$/ 3$57180%(5
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$66(0%/('21::
7+,6,6$1,5)6:,7+
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/2*2
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:((.
25
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/2*2
$66(0%/<
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
/2*2
5(&7,),(5
,17(51$7,21$/
/27&2'(
$66(0%/<
/2*2
5(&7,),(5
,17(51$7,21$/
'$7(&2'(
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/10
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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