DS04-27200-9Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©1994-2008 FUJITSU MICROELECTRONICS LIMITED Al l rights reserv ed
2006.5
ASSP For Power Management Applications
BIPOLAR
Switching Regulator Controller
(Switchable between push-pull and single-end functions)
MB3759
■DESCRIPTION
The MB3759 is a control IC for const ant-frequency pulse width modulated switching regulators.
The IC contains most of the functions required for switching regulator control circuits. This reduces both the
component count a nd assembly work.
■FEATURES
• Drives a 200 mA load
• Can be set to push-pull or single-end operation
• Prevents double pulses
• Adjustab le de ad -t im e
• Error amplifier has wide common phase input range
• Built in a circuit to prevent misoperation due to low po wer supply voltage.
• Built in an internal 5 V reference voltage with superior voltage reduction characteristics
• One type of package (SOP-16pin : 1 type)
■Application
• Power supply module
• Industrial Equipment
• A C/DC Converter etc.
MB3759
2
■PIN ASSIGNMENT
■BLOCK DIAGRAM
(TOP VIEW)
(
FPT-16P-M06
)
+IN1
−
IN1
FB
DT
CT
RT
GND
C1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+IN2
−
IN2
VREF
OC
VCC
C2
E2
E1
+
+
−
−
A1
A2
T
OSC
RT
+
IN1
6
+
IN2
−IN1
−IN2
CT5
4
2
16
15
3
Q
Q
8
9
11
12
14
7
10
C1
E1
C2
E2
VCC
VREF
GND
13
1
DT
FB
= 0.2 V
Dead time
control
Reference
regurator
PMW comparator
Error amp 1
Error amp 2
Feed back
Output
control
OC
MB3759
3
■ABSOLUTE MAXIMUM RATINGS
*: When mounted on a 4 cm square double-sided epoxy circuit board (1.5 mm thickness)
The ceramic circuit board is 3 cm x 4 cm (0.5 mm thickness)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■RECOMMENDED OPERATING CONDITIONS
Note: Values are for standard derating conditions. Give consideration to the ambient temperature and power con-
sumption if using a high supply voltage.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended ope rating condition ranges. Oper ation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VCC ——41V
Collector output voltage VCE ——41V
Collector output current ICE ——250mA
Amplifier input voltage VI——VCC + 0.3 V
Power dissipation SOP * PDTa ≤ +25 °C—620mW
Operating ambient temperature Ta — −30 +85 °C
Storage temperature Tstg — −55 +125 °C
Parameter Symbol Value Unit
Min Typ Max
Power supply voltage VCC 71532V
Collector output voltage VCE ——40V
Collector output current ICE 5 — 200 mA
Amplifier input voltage VIN −0.3 0 to VRVCC − 2V
FB sink current ISINK ——0.3mA
FB source current ISOURCE —— 2mA
Reference section output current IREF —510mA
Timing resistor RT1.8 30 500 kΩ
Timing capacitor CT470 1000 106pF
Oscillator frequency fosc 1 40 300 kHz
Operating ambient temperature Ta −30 +25 +85 °C
MB3759
4
■ELECTRICAL CHARACTERISTICS
(Continued)
(VCC = 15 V, Ta = +25 °C)
Parameter Symbol Condition Value Unit
Min Typ Max
Reference
section
Output voltage VREF IO = 1 mA 4.75 5.0 5.25 V
Input regulation ∆VR(IN) 7 V ≤ VCC ≤ 40 V,
Ta = +25 °C—225mV
Load regulation ∆VR(LD) 1 mA ≤ IO ≤ 10 mA,
Ta = +25 °C—−1−15 mV
Temperature stability ∆VR/∆T−20 °C ≤ Ta ≤
+ 85 °C—±200 ±750 µV/°C
Short circuit output
current ISC —1540—mA
Reference lockout
voltage ———4.3—V
Reference hysteresis
voltage ———0.3—V
Oscillator
section
Oscillator frequency fosc RT = 30 kΩ,
CT = 1000 pF 36 40 44 kHz
Standard deviation
of frequency —RT = 30 kΩ,
CT = 1000 pF —±3— %
Frequency change
with voltage —7 V ≤ VCC ≤ 40 V,
Ta = +25 °C—±0.1 — %
Frequency change with
temperature ∆fosc/∆T−20 °C ≤ Ta ≤
+85 °C—±0.01 — %/°C
Dead-time
control section
Input bias curr ent ID0 ≤ VI ≤ 5.25 V — −2−10 µA
Maximum duty cycle (Each
output) —V
I = 04045—%
Input
threshold
voltage
0% duty
cycle VDO ——3.03.3V
Max duty
cycle VDM —0——V
MB3759
5
(Continued) (VCC = 15 V, Ta = +25 °C)
Parameter Symbol Condition Value Unit
Min Typ Max
Error
amplifier
section
Input offset voltage VIO VO (pin3) = 2.5 V — ±2±10 mV
Input offset current IIO VO (pin3) = 2.5 V — ±25 ±250 nA
Input bias curr ent IIVO (pin3) = 2.5 V — −0.2 −1.0 µA
Common-mode input
voltage VCM 7 V ≤ VCC ≤ 40 V −0.3 — VCC − 2V
Open-loop voltage
amplification AV0.5 V ≤ VO ≤ 3.5 V 70 95 — dB
Unity-gain bandwidth BW AV = 1 — 800 — kHz
Common-mode
rejection ratio CMR VCC = 40 V 65 80 — dB
Output sink
current
(pin 3)
ISINK ISINK -5 V ≤ VID ≤ -15 mV,
VO = 0.7 V 0.3 0.7 — mA
ISOURCE ISOURCE 15 mV ≤ VID ≤ 5V,
VO = 3.5 V −2−10 — mA
Output
section
Collector leakage current ICO VCE = 40 V,
VCC = 40 V ——100µA
Emitter leakage current IEO VCC = VC = 40 V,
VE = 0 ——−100 µA
Collector
emitter
saturation
voltage
Emitter
grounded VSAT(C) VE = 0, IC = 200 mA — 1.1 1.3 V
Emitter
follower VSAT(E) VC = 15 V,
IE = −200 mA —1.52.5 V
Output control input
current IOPC VI = VREF —1.33.5mA
PWM
comparator
section
Input threshold voltage VTH 0% Duty — 4 4.5 V
Input sink current (pin 3) ISINK VO (pin3) = 0.7 V 0.3 0.7 — mA
Power supply current ICC V(pin4) = 2 V,
Refer to “■ TEST
CIRCUIT” —8—mA
Standby current ICCQ V(pin6) = VREF,
I/O open —712mA
Switching
characteristics
Rise time Emitter
grounded tRRL = 68 Ω— 100 200 ns
Fall time tFRL = 68 Ω— 25 100 ns
Rise time Emitter
follower tRRL = 68 Ω— 100 200 ns
Fall time tFRL = 68 Ω— 40 100 ns
MB3759
6
■TEST CIRCUIT
■OPERATING TIMING
VCC
VCC = 15V
OUTPUT 1
OUTPUT 2
C1
E1
C2
E2
VREF
GND
VD
VC
DT
FB
RT
CT
30 kΩ
1000 pF
TEST
INPUT
50 kΩ
+IN1
+IN2
−IN1
−IN2
OC
150 Ω /2 W
150 Ω /2 W
3.0 V
0 V
VC
VD
OUTPUT 1
OUTPUT 2
ON ON ON
ON ON ON
ON
=
=
Voltage at CT
MB3759
7
■OSCILLATION FREQUENCY
■OUTPUT LOGIC TABLE
Input (Output Control) Output State
GND Single-ended or parallel output
VREF Push-pull
f OSC RT × CT
1.2
CT : µF
RT : kΩ
fosc : kHZ
=
MB3759
8
■TYPICAL CHARACTERISTICS
(Continued)
5
6
3
4
1
2
0
VREF
∆VREF
IO = 1 mA
010 2030 40
5
0
−5
10
0
−10
−20
−25
−30
+
500
+
25
+
75
+
100
VCC = 15 V
IO = 1 mA
Reference vo ltag e VREF (V)
Operating ambient temperature Ta (°C)
Oscillator frequency vs. RT, CT Maximum duty vs.
dead time control voltage
Oscillator frequency fOSC (HZ)
Reference volt age change
∆VREF (mV)
Power supply voltage VCC (V)
Reference voltage vs.
power supply voltage Reference voltage change vs.
operating ambient temperature
VCC =15 V
CT = 470 pF
1000 pF
0.01µF
0.1µF
VCC = 15 V
CT = 1000 pF
RT = 30 kΩ
Ta = 0°C
Ta = +70°C
1 M
500 k
200 k
100 k
50 k
20 k
10 k
5 k
2 k
1 k
2 k 5 k 10 k 20 k 100 k 200 k 500 k
RT (Ω)0
10
20
30
40
50 123
0
Ta = +25°C
Maximum duty TON / T (%)
Dead time control voltage VD (V)
Reference voltage change
∆VREF (mV)
MB3759
9
(Continued)
VCC = 15 V
∆VO = 3 V
IOL
IOH
0
00.5
51.0
10 1.5
15
1
2
3
4
5
0
0.2
0.4
0.6
0.8 VCC = 15 V
Ta = 0°C
VOL Ta = +25°C
VOH
Ta = +70˚C
Ta = +70°C
Ta = +25°C
100
90
80
70
60
20
10
0
50
40
30
10 100 1 k 10 k 100 k 1 M
Ta = 0°C
Open loop voltage amplification vs. frequency
Frequency f (Hz)
Output voltage vs. output current
(feed back terminal)
Low - level output voltage VOL (V)
High - level output voltage VOH (V)
Output current IOL, IOH (mA)
Open loop voltage amplification AV (dB)
0.4
0.6
0.8
1.0
1.2 V
CC
= 15 V
Ta = 0°C
Ta = +25°C
1.0
1.2
1.4
1.6
1.8
0 50 100 150 200 0 50 100 150 200
V
CC
= 15 V
Ta = +70°C
Ta = 0°C
Ta = +25°C
Ta = +70°C
Collector saturation voltage vs.
collector output current
Collector output current IC (mA)
Emitter saturation voltage vs.
emitter output current
Emitter saturation voltage VSAT (E) (V)
Emitter output current IE (mA)
Collector saturation voltage VSAT ( C ) (V)
MB3759
10
(Continued)
VOUT
400 Ω
0
2.5
5
7.5
10
0 1 2 3 6 0 10 20 30 40
ICC
ICCQ
5 V
45
6
4
5
3
1
2
0
8
Output voltage vs. reference voltage
Output voltage VOUT (V)
Reference voltage VREF (V)
Power supply current vs. power supply voltage
Power supply current ICC ,ICCQ (mA)
Power supply voltage VCC (V)
0
200
1000
0+20 +40 +60 +80 +100
800
400
600 SOP
0
200
1000
800
400
600
010203040
Ta = +25°C(200, 10) (100, 10)
(200, 5)
(100, 5)
(100, 0)
(0, 0)
(IO, IR)
(mA)
Power dissipation vs. power supply voltage
Power dissipation PD (mW)
Power supply voltage VCC (V)
Power dissipation vs. Operating ambient temperature
Power dissipation PD (mW)
Operating ambient temperature Ta (°C)
MB3759
11
■BASIC OPERATION
Switching regulators can achieve a high level of efficiency . This section describes the basic principles of operation
using a chopper regulator as an example.
As shown in the diagram, diode D provides a current path for the current through inductance L when Q is off.
Transistor Q performs switching and is operated at a frequency that provides a stable output. As the switching
element is saturated when Q is on and cutoff when Q is off, the losses in the switching element are much less
than for a series regulator in which the pass transistor is always in the active state.
While Q is conducting, the input voltage V IN is supplied to the LC circuit and when Q is off, the energ y stored in
L is supplied to the load via diode D. The LC circuit smooths the input to supply the output voltage.
The output voltage V O is given by the following equation.
As indicated by the equation, variation in the input voltage is compensated f or by controlling the duty cycle (Ton/
T). If VIN drops , the control cir cuit ope rates to incr ease the duty cycle so as to k eep the output voltage constant.
The current through L flo ws from the input to th e output when Q is on and t hrough D when Q is off . Accor dingly,
the average input current IIN is the product of the output current and the duty cycle for Q.
The theoretical conversion efficiency if the switching loss in Q and loss in D are ignored is as follows.
The theoretical con v ersion efficiency is 100%. In practice, losses occur in the s witching element and elsewhere ,
and design decisions to minimize these losses include making the switching frequency as low as practical and
setting an optimum ratio of input to output voltage.
VO =Ton + Toff
Ton VIN = T
Ton VIN
Q : ON L
Q : OFF
Q
D
V
IN
CV
O
R
L
Q: Switching element
D: Flywheel diode
IIN =T
Ton IO
η = PIN
PO× 100 (%)
=VIN
×
IIN
VO
×
IO× 100
=VIN
×
IO
×
Ton / T
VIN
×
IO
×
Ton / T × 100
=100 (%)
MB3759
12
■SWITCHING ELEMENT
1. Selection of the Switching Transistor
It can be said that the success or otherwise of a switching regulator is determined by the choice of switching
transistor. Typically, the following parameters are considered in selecting a transistor.
• Withstand voltage
• Current
•Power
• Speed
F or the withstand v oltage, current, and po wer , it is necessary to determine that the area of sa fe oper ation (ASO)
of the intended transistor covers the intended range for these parameters.
The speed (switching speed: rise time tr, storage time tstg, a nd fall time tf) is relate d to the effic ien cy an d als o
influences the power.
The figures show the transistor load curve and VCE - IC waveforms for chopper and inverter-type regulators.
The chopper regulator is a relatively easy circuit to deal with as the diod e cla mps the collect or. A peak ca n be
seen immediately after turn-on. However, this is due to the diode and is explained later.
In an inverter regulator , the diodes on the secondary side act as a clamp. Viewed from the primary side, however,
a leakage inductance is present . This results in an inductiv e spike which m ust be taken account of as it is added
to double the VIN voltage.
IN
QDC
VO
L
IC
VCE
on
IN D1
D2
LVO
IC
on
off
VIN 2 VIN VCE
Ton
VCE
2 VIN
VIN
t
Ton
IC
t
Ton
IC
VCE Ton
IC
off
VIN VCE
t
C
t
chopper regulato r inverter regulator
MB3759
13
The figure below shows an example of the ASO characteristics for a forward-biased power transistor (2SC3058A)
suitable for switching.
Check that the ASO characteristics for the transistor you intend to use fully covers the load curve. Next, check
whether the following conditions are satisfied. If so, the transistor can be expected to perform the switching
operation safely.
• The intended ON time does not exceed the ON-time specified for the ASO characteristic.
• The OFF-time ASO characteristic satisfies the intended operation conditions.
• Derating for the junction tem perature has been tak en into account.
For a switching transistor, the junction temperature is closely related to the switching speed. This is because
the switching speed becomes slow er as the temperature increases and this affects the switching losse s.
2. Selecting the Diode
Consideration must be given to the switching speed when selecting the diode. For chopper regulators in particular,
the diode affects the efficiency and noise characteristics and has a big influence on the performance of the
switching regulator.
If the reverse recovery time of the diode is slower than the turn-on time of the transistor, an in-rush current of
more than twice the load current occurs resulting in noise (spikes) and reduced efficiency.
As a rule for diode selection, use a diode with a reverse recovery time trr that is sufficiently faster than the transistor
tr.
2SC3058A (450 V, 30 A)
TC = +25˚C
IC (Pulse) max.
IC max.
D.C.
Pw = 500
µs
1 ms
10 ms
5 10 20 50 100 200 500 1000
20
50
10
5
2
1
0.5
0.2
0.1
0.05
Forward- bia se d ar ea of sa fe opera tio n sing le puls e
Single pulse
Collector current IC (A)
Collector - emitter voltage VCE (V)
MB3759
14
■APPLICATION IN PRACTICAL CIRCUITS
1. Error Amplifier Gain Adjustment
Tak e care tha t the bias current doe s not become large when connecting an e xte rnal circuit to the FB pin (pin 3)
for adjusting the amplifier gain. As the FB pin (pin 3) is biased to the low level by a sink current, the duty cycle
of the output signal will be affected if the current from the external circuit is greater than the amplifier can sink.
The figure below shows a suitable circuit for adjusting the gain.
It is ver y important that you avoid having a capacitive load connected to the output stage as this will affect the
response time.
2. Synchroni zed Oscillator Operati on
The oscillator can be halted by connecting the CT pin (pin 5) to the GND pin (pin 7). If supplying the signal
externally, halt the internal oscillator and input to the CT pin (pin 5).
Using this method, multiple ICs can be used together in synchronized operation. For synchronized operation,
set one IC as the master and connect the other ICs as shown in the diagram.
OUT
RF
Vo
RIN
R2
R1
VREF
+
−
RTCTVREF RTCT
Master Slave
MB3759
15
3. Soft Start
A soft start function can be incorporated by using the dead-time control element (DT) pin (pin 4).
When the power is turned on, Cd is not yet charged and the DT input is pulled to the VREF pin (pin 14) causing
the output transistor to tur n off. Next, the input voltage to the D T pin (pin 4) dro ps in accordance with the Cd,
Rd constant causing the output pulse width to increase steadily, prov iding stable control circuit operation.
If you wish to use both dead-time and softstart, combine these in an OR configuration.
4. Output Current Limiting (Fallback system using a detection resistor inserted on the output side)
(1) Typical example
V
REF
V
REF
DT DT
Cd
Rd
R1
R2
V
D
=R2
R1+R2 V
R
Setting the dead-time Incorporating soft start
Cd
Rd R2
R1
DT
VREF
VREF
R3
RSVO
R1
R5
R2R4
VIO
IO
GND
VO
VO1
00I
L3 IL2 IO
IL1
+
−
D
MB3759
16
• Initial limit curren t IL1
As the diode is reverse biased,
VIO is the input offset voltage to the op-amp (-10 mV ≤ VIO ≤ +10 mV) and this causes the variation in IL. Accordingly ,
if for example the variation in IL is to be limited to ±10 %, using equation (1) and only considering the variation
in the offset voltage gives the following:
This indicates a setting of 100 mV or more is required.
• Polarity change point IL2
As this is the point where the diode becomes forward biased, it can be calculated by substituting [R4/(R3+R4)
VREF - VD] for VO in equation (where VD is the f o rward voltage of the diode).
• Final limit current IL3
The limit current for VO = 0 when R2 >> R1 is the po int where the voltages on either side of R S and on either
side of R5 are biased.
R3//R4 is the resistance formed by R3 and R4 in parallel (R3R4/(R3 + R4 )). When R3//R4 << R5, equation (2)
becomes:
In addition to determining the limit current IL3 for VO = 0, R3, R4, R5, and dio de D also operate as a starter when
the power is turned on.
• Starter circuit
The figure below shows the case when the starter circuit f ormed by R3, R4, R5, and D is not present. The output
current IO after the operation of the current limiting circuit is:
When VO = 0 such as when the pow er is turned on, the out put curr ent IO = -V I O / RS and, if th e offset voltage VIO
is positive, the output current is limited to being negative and therefore the output voltage does not rise.
Accordingly, if using a fallback system with a detection resistor inser ted in the output, always include a star ter
circuit, e x pect in the cases described later.
VO > R3 + R4
R4 VREF
The condition fo r VO is:
R
S
I
L1
=R1 + R2
R1 V
O
–V
IO
∴I
L1
=R1 + R2
R1 R
S
V
O
R
S
V
IO
–
Eq. (1) (where R2 >> R1)
R1 + R2
R1 ( VO + VEE ) −( R2 >> R1 )
IO = RS
1RS
VIO
RS
VIO
IL2 =R1 + R2
R1 RS
R4 / (R3 + R4) · VREF – VD –
RS IL3 = R3R4 + R3R5 + R4R5
R4R5 VREF − R3R5 VD − R4R5 VD − VIO
(2)
RS
VIO
∴IL3 =RS
1(R3 + R4
R4 VREF − VD ) −
1 + (R 3 // R 4) / R5
1Eq.
RS
VIO
IL3 C =RS
1(R3 + R4
R4 VREF – VD
) –
IO =R1 + R2
R1 RS
VORS
VIO
−
MB3759
17
(2) Example that does not use a diode
The output current IO after current limiting is:
In this case, a current flows into t he ref erence volta ge source via R3 and R4 if V O > VREF. To maintain the stability
of the reference voltag e, design the circuit such that this does not exceed 200 µA.
R
S
V
O
R1
R2
V
IO
I
O
GND
V
O
V
O
0I
O
I
L1
V
IO
>0 V
IO
< 0
+
−
VOR1
R1+R2 >
IO
RSVO
R1
R4
R2
GND 00
R3
VIO
VREF
+
−
VO
R4
R3+R4
R1
R1+R2 <R4
R3+R4
IO
IL1
IO =RS
1[(R1 + R2
R1 –V
REF – VIO
] (R2 >> R1)
R3 + R4
R4 ) VO +R3 + R4
R4
MB3759
18
(3) When an external stabilized negative power supply is present
The output current IO after current limiting is:
If the output is mom enta rily shorted, VO* goes briefly negative. In this case, set the voltage across R1 to
300 mV or less to ensure that a voltage of less than -0.3 V is not applied to the op-amp input.
R1
R2
VIO
−VEE
RS
VO*
VO
VO
VO
00I L5 I L1 IO
IO
+
−
IO =RS
1R1 + R2
R1 –
(VO + VEE) RS
VIO (R2
>>
R1)
MB3759
19
5. Example Power Supply Voltage Supply Circuit
(1) Supplied via a Zener diode
(2) Supplied via a three-t erminal regulator
6. Example Pr otection Circuit for Output Transistor
Due to its monolithic IC characteristics, applying a negative voltage greater than the diode voltage ( := 0.5 V) to
the substrate (pin 7) of the MB3759 causes a parasitic effect in the IC which can result in misoperation.
Accordingly, the following measures are required if driving a transformer or similar directly from the output
transistor of the IC.
(1) Protect the output t r ansistor from the parasitic effect by using a Schottky barrier diode.
VCC = VZ
R
C
MB3759
VCC
MB3759
VCC = VIN − VZ
VIN
VZ
VIN
VZVCC
AC
VCC
MB3759
Three-terminal
regulator
8
9
11
SBD
10
MB3759
20
(2) Prov ide a bias at the anod e-side of the diode to clamp the low level side of the transistor.
(3) Drive the transforme r via a bu f fer transis t or.
811 14
7.5 kΩ
0.1 µF
1.2 kΩ
= 0.7 V
V
CC
8
9
MB3759
21
7. Typical Application
(1)Chopper regulator
AC 100 V
1 Ω
15 V
50 Ω
2 kΩ
1 mH
24 V
2.5 A
2200 µF
10 kΩ
100 kΩ
10 kΩ
16 kΩ
5.1 kΩ
0.22 µF
10 µF
47 k
Ω
2.2 kΩ
5.6 k
Ω
5 k
Ω300 Ω
5.1 k
Ω2200 pF
0.1 Ω
FB
−IN1
VREF
−IN2
+IN1
+IN2
DT
E1
C1
E2
RT
C2
CT
OC
GND
VCC
+
20 kΩ
+
+
+
+
MB3759
22
(2) Inverter regulator
AC 100 V
15 V
33 Ω100Ω
100Ω
33 Ω
A
B
A
B
300 Ω
20 kΩ
10 kΩ
100 k
Ω
2.2 kΩ
5.6 kΩ
0.1 Ω
5.1 kΩ
16 kΩ
10 kΩ
5.1 k
ΩREF
5 k
Ω
10 µF
47 k
Ω
VREF
E1
C1
C2
E2
RT
OC
CT
FB
GND
0.22 µF
2200 µF
+IN1
−IN2
+IN2
−IN1
24 V
2.5 A
DT
VCC
+
+
+
+
2200 pF
+
MB3759
23
■NOTES ON USE
• Take account of common impedance when designing the earth line on a printed wiring board.
• Take measures against static electricity.
- For semiconductors, use antistatic or conductive containers.
- When storing or carrying a printed circuit board af ter chip mounting, put it in a conductive bag or container.
- The work table, tools and measuring instruments must be grounded.
- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.
• Do not apply a negative voltage
- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in
malfunction.
■ORDERING IN FORMATION
■RoHS Compliance Information of Lead (Pb) Free version
The LSI products of Fujitsu Microelectronics with “E1” are compliant with RoHS Directive , and has obser ved
the standard of lead, cadmium, mercury, Hexa v alent chromium, polybrominated biphenyls (PBB) , and polybro-
minated diphenyl ethers (PBDE) .
The product that conforms to this standard is added “E1” at the end of the part number.
■MARKING FORMAT (Lead Free version)
Part number Pac kage Remarks
MB3759PF-❏❏❏ 16-pin plastic SOP
(FPT-16P-M06) Conventional version
MB3759PF-❏❏❏E1 16-pin plastic SOP
(FPT-16P-M06) Lead Free version
INDEX
MB3759
XXXX XXX
E1 SOP-16
Lead Free version
MB3759
24
■LABELING SAMPLE (Lead free version)
2006/03/01
ASSEMBLED IN JAPAN
G
QC PASS
(3N) 1MB123456P-789-GE1
1000
(3N)2 1561190005 107210
1,000
PCS
0605 - Z01A
1000
1/1
1561190005
MB123456P - 789 - GE1
MB123456P - 789 - GE1
MB123456P - 789 - GE1
Pb
Lead Free version
lead-free mark
JEITA logo JEDEC logo
MB3759
25
■MB3759PF-❏❏❏E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
[Temperature Profile for FJ Standard IR Reflow]
(1) IR (infrared reflow)
(2) Manual soldering (partial heating method)
Conditions : Temperature 400 °C Max
Times : 5 s max/pin
Item Condition
Mounting Method IR (infrared reflow) , Manual soldering (partial heating method)
Mounting times 2 times
Storage period
Before opening Please use it within two years after
Manufacture.
From opening to the 2nd
reflow Less than 8 days
When the storage period after
opening was exceeded Please processes within 8 days
after baking (125 °C, 24H)
Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
260 °C
(e)
(d')
(d)
255 °C
170 °C
190 °C
RT (b)
(a)
(c)
to
Note : Temperature : the top of th e package body
(a) Temperatu re Increase gradient : Average 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Temperatur e Increa se gradient : Average 1 °C/s to 4 °C/s
(d) Actual heating : Temperature 260 °C Max; 255 °C or more, 10s or less
(d’) : Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling : Natural cooling or forced cooling
H rank : 260 °C Max
MB3759
26
■PACKAGE DIMENSION
16-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
5.3× 10.15 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 2.25 mm MAX
Weight 0.20 g
Code
(Reference) P-SOP16-5.3×10.15-1.27
16-pin plastic SOP
(FPT-16P-M06)
(FPT-16P-M06)
C
2002 FUJITSU LIMITED F16015S-c-4-7
0.13(.005) M
Details of "A" part
7.80±0.405.30±0.30
(.209±.012) (.307±.016)
–.008
+.010
–0.20
+0.25
10.15
INDEX
1.27(.050)
0.10(.004)
18
916
0.47±0.08
(.019±.003)
–0.04
+0.03
0.17
.007 +.001
–.002
"A" 0.25(.010)
(Stand off)
0~8˚
(Mounting height)
2.00 +0.25
–0.15
.079 +.010
–.006
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10 +0.10
–0.05
–.002
+.004
.004
.400
*1
*2
0.10(.004)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3)Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB3759
27
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.
