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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FDP2D3N10C / FDPF2D3N10C N-Channel Shielded Gate PowerTrench® MOSFET
www.onsemi.com
Semiconductor Components Industries, LLC, 2017 Publication Order Number:
March, 2017, Rev. 1.0 FDP2D3N10C / FDPF2D3N10C/D
1
FDP2D3N10C / FDPF2D3N10C
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 222 A, 2.3 mΩ
Features
Max rDS(on) = 2.3 mΩ at VGS = 10 V, ID = 100 A
Extremely Low Reverse Recovery Charge, Qrr
100% UIL Tested
RoHS Compliant
General Description
This N-Channel MV MOSFET is produced using ON
Semiconductor’s advanced PowerTrench® process that
incorporates Shielded Gate technolo gy. This process has been
optimized to minimize on-state resistance and yet maintain
superior switching performance with best in class soft body
diode.
Applications
Synchronous Rectification for ATX / Server / Telecom PSU
Motor drives and Uninterruptible Power Supplies
Micro Solar Inverter
G
S
D
TO-220F
DS
GDS
G
TO-220
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted.
* Drain current limited by maximum junction temperature. Package limitation current is 120A.
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
FDP2D3N10C FDPF2D3N10C
VDS Drain to Source Voltage 100 100 V
VGS Gate to Source V oltage ±20 ±20 V
ID
Drain Current -Continuous TC = 25°C (Note 3) 222* 222* A -Continuous TC = 100°C (Note 3) 157* 157*
-Pulsed (Note 1) 888 888
EAS Single Pulse Avalanche Energy (Note 2) 1 176 mJ
PDPower Dissipation TC = 25°C 214 45 W
Power Dissipation TA = 25°C 2.4 2.4
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +175 °C
Symbol Parameter FDP2D3N10C FDPF2D3N10C Units
RθJC Thermal Resistance, Junction to Case, Max. 0.7 3.3 °C/W
RθJA Thermal Resistance, Junction to Ambient, Max. 62.5 62.5
Device Marking Device Package Packing Method Quantity
FDP2D3N10C FDP2D3N10C TO-220 Tube 50 units
FDPF2D3N10C FDPF2D3N10C TO-220F Tube 50 units
FDP2D3N10C / FDPF2D3N10C N-Channel Shielded Gate PowerTrench® MOSFET
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2
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Off Characteristic s
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristic
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 70 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 μA
VDS = 80 V, TJ= 150°C 500 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 700 μA 2.0 3.0 4.0 V
rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 100 A 2.1 2.3 mΩ
gFS Forward Transconductance VDS = 5 V, ID = 100 A 222 S
Ciss Input Capacitance VDS = 50 V, VGS = 0 V,
f = 1 MHz
7980 11180 pF
Coss Output Capacitance 4490 6290 pF
Crss Reverse Transfer Capacitance 40 75 pF
RgGate Resistance 0.1 0.8 1.8 Ω
td(on) Turn-On Delay Time VDD = 50 V, ID = 100 A,
VGS = 10 V, RGEN = 6 Ω
42 67 ns
trRise Time 35 56 ns
td(off) Turn-Off Delay Time 74 118 ns
tfFall Time 32 57 ns
QgTotal Gate Charge VGS = 0 V to 10 V VDD = 50 V,
ID = 100 A
108 152 nC
Qgs Gate to Source Gate Charge 36 nC
Qgd Gate to Drain “Miller” Charge 22 nC
Qoss Output Charge VDD = 50 V, VGS = 0 V 297 nC
ISMaximum Continuous Drain to Source Diode Forward Current - - 222 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 888 A
VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 100 A 0.9 1.3 V
trr Reverse Recovery Time VGS = 0 V, VDD = 50 V,
IF = 100 A, dIF/dt = 100 A/μs 107 172 ns
Qrr Reverse Recovery Charge 191 306 nC
trr Reverse Recovery Time VGS = 0 V, VDD = 50 V,
IF = 100 A, dIF/dt = 300 A/μs 97 155 ns
Qrr Reverse Recovery Charge 492 788 nC
Notes:
1. Pulsed Id please refer to Figure.11 and Figure.12 “Forward Bias Safe Operating Area” for more details.
2. EAS of 1176 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 28 A, VDD = 90 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 89 A.
3. Computed continuou s current limited to Max Junction Temperature only, actua l continuous current will be limited by thermal & electro-mechanical application board design.
FDP2D3N10C / FDPF2D3N10C N-Channel Shielded Gate PowerTrench® MOSFET
www.onsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted.
Figure 1.
0123
0
60
120
180
240
300
360
VGS = 5.5 V
VGS = 5 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4.5 V
VGS = 6 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
0 60 120 180 240 300 360
0
1
2
3
4
5
6
7PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRA IN CURRENT (A)
VGS = 5.5 V
VGS = 6 V
VGS = 4.5 V
VGS = 10 V
Normalized On- Resistance
vs. D r a i n C u r ren t a n d G a t e V o lt a g e
Figure 3. Normalized On- Resistance
-75 -50 -25 0 25 50 75 100 125 150 175
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
ID = 100 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESIST ANCE
TJ, JUNCTION TEMPERATURE (oC)
vs. Junction Temperature Figure 4.
45678910
0
4
8
12
16
TJ = 150 oC
ID = 100 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAG E (V)
rDS(on), DRAIN TO
SOURCE ON-RESIS TANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs. Gate to
Source Voltage
Figure 5. Transfer Characteristics
234567
0
60
120
180
240
300
360
TJ = 175 oC
VDS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GA TE T O SOUR CE VOLTAGE (V)
Figure 6.
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
100
400
TJ = -55 oC
TJ = 25 o C
TJ = 175 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode
Forward Voltage vs. Source Current
FDP2D3N10C / FDPF2D3N10C N-Channel Shielded Gate PowerTrench® MOSFET
www.onsemi.com
4
Figure 7.
0 102030405060708090100110120
0
2
4
6
8
10 ID = 100 A
VDD = 75 V
VDD = 30 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CH ARGE ( n C )
VDD = 50 V
Gate Charge Characteristics Figure 8.
0.1 1 10 100
1
10
100
1000
10000
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRA IN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
Capacitance vs. Drain
to Source Voltage
Figure 9.
0.01 0.1 1 10 100 1000
1
10
100
500
TJ = 125 oC
TJ = 25 oC
TJ = 150 oC
tAV, TIME IN AVA LANCHE (ms)
IAS, AVALANCHE CURRENT (A)
Uncl amped Induc tive
Switching Capability Figure 10.
25 50 75 100 125 150 175
0
40
80
120
160
200
240
RθJC = 0.7 oC/W
VGS = 10 V
ID, DRAIN CURRENT (A)
TC, CASE TEMPERA TURE (oC)
Maximum Continuous Drain
Current vs. Case Temperature
Figure 11. Forwar d Bias Safe
0.1 1 10 100 400
0.1
1
10
100
1000
2000
100 μs
CURVE BENT TO
MEA SURED DATA
10 μs
10 ms
100 ms
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VO LTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJC = 0.7 oC/W
TC = 25 oC
Operating Area for FDP2 D3N10C Figure 12. Forward Bias Safe
0.1 1 10 100 400
0.1
1
10
100
1000
2000
100 μs
CURVE BENT TO
MEASURED DATA
10 μs
10 ms
100 ms
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VO LTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX R ATED
RθJC = 3.3 oC/W
TC = 25 oC
Operating Area for FDPF2D3N10C
Typical Characteristics TJ = 25 °C unless otherwise noted.
FDP2D3N10C / FDPF2D3N10C N-Channel Shielded Gate PowerTrench® MOSFET
www.onsemi.com
5
Figure 13. Single Pu lse Maximum Power Dissipation
for FDP2D3N10
10-5 10-4 10-3 10-2 10-1 100101102
100
1000
10000
100000
SINGLE PULSE
RθJc = 0.7 oC/W
TC = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
CFigure 14.
10-5 10-4 10-3 10-2 10-1 100101102
10
100
1000
10000
100000
SINGLE PULSE
RθJc = 3.3 oC/W
TC = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Single Pulse Maximum Power Dissipation
for FDPF2D3 N 10 C
Figure 15. Junction-to-Case Transien t Thermal Response Curve for FDP2 D3N10C
10-5 10-4 10-3 10-2 10-1 100101102
0.001
0.01
0.1
1
2
SINGL E PULSE
DUTY CYCLE-DESCENDING ORDER
r(t), NORMALIZED EF FE CT IVE TRANSIENT
THERMAL RESISTANCE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0. 2
0. 1
0. 05
0. 02
0. 01
PDM
t1t2
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 0.7 oC/W
Duty Cycle, D = t1 / t2
Peak TJ = PDM x ZθJC(t) + TC
Figure 16. Junction-to-Case Tr ansient Thermal Response Curve for FDPF2D3N10C
10-5 10-4 10-3 10-2 10-1 100101102
0.0001
0.001
0.01
0.1
1
2
SINGL E PULSE
DUTY CYCLE-DESCENDING ORDER
r(t), NORMALIZED EF FE CT IVE TRANSIENT
THERMAL RESISTANCE
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0. 2
0. 1
0. 05
0. 02
0. 01
PDM
t1t2
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 3.3 oC/W
Duty Cycle, D = t1 / t2
Peak TJ = PDM x ZθJC(t) + TC
Typical Characteristics TJ = 25 °C unless otherwise noted.
5°
3°
5°
3°
4.672
4.472
10.360
10.109
3.89
3.60
2.860
2.660
8.787
8.587
15.215
14.757
2.640
2.440
1.650
1.250
(SEE NOTE E)
0.889
0.787
5.180
4.980
13.894
12.941
1.91
15.97
15.89
0.36
M
B A
0.36
M
C
B
A
B
1.41
1.17
7°
3°
6.477
6.121
2.755
2.555
0.457
0.357
5°
3° 5°
3°
C
12.878
12.190
8.89
6.86
3.962
3.505
NOTES:
A. PACKAGE REFERENCE: JEDEC TO220
VARIATION AB
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-2009.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. MAX WIDTH FOR F102 DEVICE = 1.35mm.
F. DRAWING FILE NAME: TO220T03REV4.
G. FAIRCHILD SEMICONDUCTOR.
31
3
1
B
4.90
4.50
16.00
15.60
10.05
9.45
3.40
3.20
3.28
3.08
B
10.36
9.96
1.47
1.24
0.90
0.70
0.45
0.25
30°
2.54 2.54
7.00
2.14
(3.23)
B
13
SEE NOTE "F"
0.50
M
A
A
B
2.66
2.42
B
16.07
15.67
2.96
2.56
B
0.60
0.45
0.70
6.88
6.48
1 X
45°
SEE NOTE "F"
NOTES:
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B
DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
F. OPTION 1 - WITH SUPPORT PIN HOLE.
OPTION 2 - NO SUPPORT PIN HOLE.
G. DRAWING FILE NAME: TO220M03REV5
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1
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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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