TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 1 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Applications
24-pin 4x4mm leadless QFN package
Mobile Infrastructure
LTE / WCDMA / CDMA / EDGE
Test Equipments and Sensors
IF and RF Applications
General Purpose Wireless
Product Features
Functional Block Diagram
DC - 4 GHz
0.5 dB LSB Steps to 31.5 dB
+57 dBm Input IP3
1.7 dB Insertion Loss @ 2.2 GHz
Serial Control Interface
No requirement for external bypass capacitors for
operation above 700 MHz
50 Ω Impedance
+5V Supply Voltage
18 Vdd
17 NC
NC
16
15 SEROUT
14 GND
13 RF OUT
12
ACGND6
ACGND5
ACGND4
ACGND3
ACGND2
ACGND1
11
10
9
8
7
6
RF IN
GND
LE
SERIN
CLK
NC
5
4
3
2
1
24
23
22
21
20
19
NC
NC
NC
NC
NC
NC
6-BIT
31.5
DSA
SERIAL
CONTROL
General Description
Pin Configuration
The TQP4M9072 is a high linearity, low insertion loss, 6-
bit, 31.5 dB Digital Step Attenuator (DSA) operating over
the DC-4 GHz frequency range. The digital step attenuator
uses a single positive 5V supply and has a serial periphery
interface (SPITM) for changing attenuation states. This
product maintains high attenuation accuracy over frequency
and temperature. No external matching components are
needed for the DSA. The product has an added feature of
not requiring external AC ground capacitors for operation
above 700 MHz.
The TQP4M9072 is available in a standard lead-free
/green/RoHS-compliant 24-pin 4x4mm QFN package. The
TQP4M9071 is also available from TriQuint as a footprint
and pin compatible DSA equivalent with a parallel control
interface
Pin #
Symbol
2
CLK
3
SERIN
4
LE
6
RF IN
13
RF OUT
15
SEROUT
18
Vdd
5, 14
GND
7, 8, 9, 10, 11, 12
ACGND1-ACGND6
Backside Paddle
Ground
All other pins are N/C
Ordering Information
Part No.
Description
TQP4M9072
6-Bit, 31.5 dB DSA
TQP4M9072-PCB_ IF
40-500MHz Evaluation Board
TQP4M9072-PCB_RF
0.7-3.5GHz Evaluation Board
PCB includes USB control interface board, EVH.
Standard T/R size = 2500 pieces on a 13” reel.
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 2 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Specifications
Absolute Maximum Ratings
Parameter
Rating
Storage Temperature
-55 to 150 oC
Junction Temperature
150 oC
RF Input Power, 50Ω,T = 85ºC
+28 dBm
Vdd, Power Supply Voltage
+6.0 V
Digital Input Voltage
Vdd + 0.5V
Operation of this device outside the parameter ranges given
above may cause permanent damage.
Recommended Operating Conditions
Parameter
Min
Typ
Max
Units
Vdd
4.75
5
5.25
V
T (case)
-40
85
oC
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
Electrical Specifications
Test conditions: 25ºC, Vdd = +5V, 50 system, Mode 1, No external bypass capacitors used on pins 7-12.
Parameter
Conditions
Min
Typical
Max
Units
Operational Frequency Range
See Note 1 and 2.
DC
4000
MHz
Insertion Loss
1.0 GHz
1.3
dB
2.0 GHz
1.6
dB
2.2 GHz
1.7
2.2
dB
3.5 GHz
2.1
dB
Return Loss
All States
17
dB
Accuracy Error
0.04-2.7 GHz, All States, Mode 2
± (0.3 + 3% of Atten. Setting) Max
dB
0.7-2.7 GHz, All States, Mode 1 or Mode 2
± (0.3 + 3% of Atten. Setting) Max
dB
2.7-3.5 GHz, All States, Mode 1 or Mode 2
± (0.4 + 4% of Atten. Setting) Max
dB
Attenuation Step
To be monotonic (Step Attenuation ≥ 0)
0
0.5
dB
Input IP3
Input = +15dBm / tone, All States
+57
dBm
Input P0.1dB
All States, DC-4 GHz
+30
dBm
Time rise / fall
10% / 90% RF
90
ns
Time On , Time Off
50% CTL to 10% / 90% RF
100
ns
Supply Voltage, Vdd
+5
V
Supply Current, Idd
2.0
mA
Notes:
1. In Mode 1 no external bypass capacitors are used and operating frequency is 0.7-4GHz. See page 8 for details.
2. In Mode 2 external bypass capacitors are used and operating frequency may be extended to 0.04-4GHz. See page 8 for details.
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 3 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Serial Control Interface
The TQP4M9072 has a CMOS SPITM input compatible serial interface. This serial control interface converts the serial data
input stream to parallel output word. The input is 3-wire (CLK, LE and SERIN) SPITM input compatible. At power up, the
serial control interface resets device attenuation state to 31.5dB. The 6-bit SERIN word is loaded into the register on rising
edge of the CLK, MSB first. When LE is high, CLK is disabled.
SERIN (MSB in First 6-Bit Word) Control Logic Truth Table
Test conditions: 25ºC, Vdd = +5V
6-Bit Control Word to DSA
LSB MSB
Attenuation
State
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
Reference : IL
1
1
1
1
1
0
0.5 dB
1
1
1
1
0
1
1 dB
1
1
1
0
1
1
2 dB
1
1
0
1
1
1
4 dB
1
0
1
1
1
1
8 dB
0
1
1
1
1
1
16 dB
0
0
0
0
0
0
31.5 dB
Any combination of the possible 64 states will provide an attenuation of approximately
the sum of bits selected
Serial Control Interface Timing Diagram
CLK is disabled when LE is high
SERIN
CLK
LE
D5-D0
MSB-LSB D5-D0
MSB-LSB
tSDSUP tSDHLD tLESUP tLEPW
tPLO
D5 – D0
MSB- LSB
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 4 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Serial Control Timing Characteristics
Test conditions: 25ºC, Vdd = +5V
Parameter
Condition
Min
Max
Units
Clock Frequency
50% Duty Cycle
10
MHz
LE Setup Time, tLESUP
after last CLK rising edge
10
ns
LE Pulse Width, tLEPW
30
ns
SERIN set-up time, tSDSUP
before CLK rising edge
10
ns
SERIN hold-time, tSDHLD
after CLK rising edge
10
ns
LE Pulse Spacing tLE
LE to LE pulse spacing
630
ns
Propagation Delay tPLO
LE to Parallel output valid
30
ns
Serial Control DC Logic Characteristics
Test conditions: 25ºC, Vdd = +5V
Parameter
Condition
Min
Max
Units
Input Low Voltage, VIL
0
0.8
V
Input High Voltage, VIH
2.4
Vdd
V
Output High Voltage, VOH
On SEROUT
2.0
Vdd
V
Output Low Voltage, VOL
On SEROUT
0
0.8
V
Input Current, IIH / IIL
On SERIN, LE and CLK
-10
+10
µA
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 5 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Typical Performance Data
Performance plots data is measured using Bias Tee on RF ports in Mode 2 configuration. Mode 2 operation is required to
obtain performance at frequencies lower than 0.7 GHz. For frequency range 0.7 - 4.0 GHz, data is identical in Mode 1 and
Mode 2.
-4
-3
-2
-1
0
0500 1000 1500 2000 2500 3000 3500 4000
Insertion Loss (dB)
Frequency (MHz)
Insertion Loss
Vdd = 5V
+25C
-40C
+85C
-35
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Insertion Loss (dB)
Frequency (MHz)
Attenuation
Only Major States, Vdd = 5V, 25oC
0.5dB
1dB
2dB
4dB
8dB
16dB
31.5dB
-35
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Input Return Loss (dB)
Frequency (MHz)
Input Return Loss
Only Major States, Vdd = 5V, 25C
0dB
1dB
2dB
4dB
8dB
16dB
31.5dB
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Output Return Loss (dB)
Frequency (MHz)
Output Return Loss
Only Major States, Vdd = 5V, 25C
0dB
1dB
2dB
4dB
8dB
16dB
31.5dB
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Input Return Loss (dB)
Frequency (MHz)
Input Return Loss vs. Temperature
Vdd = 5V, Attenuation State = 0dB
25C
-40C
85C
-30
-25
-20
-15
-10
-5
0
0500 1000 1500 2000 2500 3000 3500 4000
Output Return Loss (dB)
Frequency (MHz)
Output Return Loss vs. Temperature
Vdd = 5V, Attenuation State = 0dB
25C
-40C
85C
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 6 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Typical Performance Data
45
50
55
60
65
0 5 10 15 20 25 30
Input IP3 (dBm)
Attenuation States (dB)
Input IP3 vs. Attenuation States
+25C
-40C
+85C
Frequenc y = 2 GHz
Vdd = 5V
45
50
55
60
65
0 5 10 15 20 25 30
Input IP3 (dBm)
Attenuation States (dB)
Input IP3 vs. Attenuation States
+25C
-40C
+85C
Using Mode 2
Frequency = 150 MHz
Vdd = 5V
-10
0
10
20
30
40
50
60
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Relative Phase (degree)
Frequency (GHz)
Relative Phase vs. Frequency
0.5 dB
1dB
2dB
4dB
8dB
16dB
31.5dB
Vdd = 5 V , Temp. = 25oC
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
0 5 10 15 20 25 30
Attenuation Error (dB)
Attenuation States (dB)
Attenuation Error vs. Attenuation States
0.9 GHz
1.8 GHz
2.2 GHz
2.7 GHz
Vdd = 5 V , Temp. = 25oC
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 7 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Detailed Device Description
The TQP4M9072 is a high linearity, low insertion loss, wideband, 6-bit, 31.5 dB digital step attenuator. The digital step
attenuator uses a single 5V supply and has a CMOS SPITM controller. This product maintains high attenuation accuracy over
frequency and temperature. The product does not require any external bypass capacitors on AC ground pins for operation
above 700 MHz. The DSA performance remains unchanged for frequency range 0.7 – 4 GHz in either Mode 1 or Mode 2.
The operating frequency may be extended to low frequency range (0.04 – 0.7 GHz) with external bypass capacitors on AC
ground pins (ACGND1-ACGND6).
Further assistance may be requested from TriQuint Applications Engineering, sjcapplications.engineering@tqs.com.
Functional Schematic Diagram
RF Input RF Output
SEROUT
SPI control bits
SERIN,LE,CLK
D0 D1 D2 D3 D4 D5
LSB MSB
Parallel Control Bits
from CMOS Chip
GaAs DSA
Parallel Input DSA
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 8 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Detailed Device Description
Mode 1: 0.7 - 4.0 GHz Operation (TQP4M9072-PCB_RF)
No external bypass capacitors required. There are 0.2 pF shunt capacitors (C5 and C7) next to RF connectors, on the
application board, to resonate out the RF connector parasitic. These shunt capacitors are not required in the final application
circuit.
1
2
3
4
5
6
ACGND6
RF OUT
18
17
16
15
14
13
24
23
22
21
20
19
7
8
9
10
11
12
ACGND5
ACGND4
ACGND3
ACGND2
ACGND1
GND
SEROUT
NC
NC
Vdd
NC
NC
NC
NC
NC
NC
NC
CLK
SERIN
LE
GND
RF IN
U1
C1
1000pF
50 Ohms
RF
Input RF
Output
C3
1000pF
50 Ohms
C4
0.1uF
R4
15 Ω
Vdd
J1 J2
Mode 2: 0.04 - 4.0 GHz Operation (TQP4M9072-PCB_IF)
External bypass capacitors required on ACGND0 - ACGND5 pins. For improved operation below 0.1 GHz, blocking and
bypass capacitors values can be increased to 10 nF. This circuit configuration can also be used for operation up to 4 GHz. The
DSA performance remains unchanged for frequency range 0.7 - 4 GHz in either Mode 1 or Mode 2. There are 0.2 pF shunt
capacitors (C5 and C7) next to RF connectors, on the application board, to resonate out the RF connector parasitic. These
shunt capacitors are not required in the final application circuit.
1
2
3
4
5
6
ACGND6
RF OUT
18
17
16
15
14
13
24
23
22
21
20
19
7
8
9
10
11
12
ACGND5
ACGND4
ACGND3
ACGND2
ACGND1
GND
SEROUT
NC
NC
Vdd
NC
NC
NC
NC
NC
NC
NC
CLK
SERIN
LE
GND
RF IN
U1
C11
C12
C13
330pF
330pF
330pF
C1
1000pF
C10
330pF
50 Ohms
RF
Input RF
Output
C3
1000pF
50 Ohms
C4
0.1uF
R4
15 Ω
Vdd
J1 J2
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 9 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Pin Description
18 Vdd
17 NC
NC
16
15 SEROUT
14 GND
13 RF OUT
12
ACGND6
ACGND5
ACGND4
ACGND3
ACGND2
ACGND1
11
10
9
8
7
6
RF IN
GND
LE
SERIN
CLK
NC
5
4
3
2
1
24
23
22
21
20
19
NC
NC
NC
NC
NC
NC
6-BIT
31.5
DSA
SERIAL
CONTROL
Pin
Symbol
Description
2
CLK
Clock. This serial clock is used to clock in the serial data to the registers. The data is latched
on the CLK rising edge. This input is a high impedance CMOS input.
3
SERIN
Serial Input Data. The 6-bit serial data is loaded MSB first. This input is a high impedance
CMOS input.
4
LE
Latch Enable, When LE goes high, 6-bit data in the serial input register is transferred to the
attenuator. When LE is high, CLK is disabled
6
RF IN
RF Input, DC voltage present, blocking capacitor required. Can be used for Input or Output.
7
ACGND1
AC ground for extended low frequency operation option
8
ACGND2
AC ground for extended low frequency operation option
9
ACGND3
AC ground for extended low frequency operation option
10
ACGND4
AC ground for extended low frequency operation option
11
ACGND5
AC ground for extended low frequency operation option
12
ACGND6
AC ground for extended low frequency operation option
13
RF OUT
RF Output, DC voltage present, blocking capacitor required. Can be used for Input or Output.
15
SEROUT
Serial Output Data
18
Vdd
Supply Voltage. Bypass capacitor required close to the pin. Dropping resistor highly
recommended ensuring compatibility with different power supplies.
5, 14
GND
These pins must be connected to RF/DC ground
1, 16, 17, 19, 20, 21,
22, 23, 24
N/C
These pins are not connected internally but can be grounded on the PCB
Backside Paddle
GND
Multiple vias should be employed for proper performance; see page 10 for suggested footprint
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 10 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Applications Information
PC Board Layout
Top RF layer is .020” Rogers-4003, єr = 3.45, 4 total layers
(0.062” thick) for mechanical rigidity. Metal layers are 1-oz
copper. Microstrip line details: width = .040”, spacing = .020”.
External DC blocking capacitors are required on RFin and RFout
pins of the device. The supply voltage for the DSA is supplied
externally through pin Vdd. Frequency bypassing for this pin is
supplied by surface mount capacitor 0.1 uF (C4). This capacitor
is placed close to the device pin in the board layout. To ensure
application circuit is compatible with different standard power
supplies, 15 (R4) dropping resistor is highly recommended on
Vdd supply line.
R1, R2 and R3 are used as termination for digital noise or any
noise reflection on Serial Input, CLK and LE pins.
RF layout is critical for getting the best performance. RF trace
impedance needs to be 50 ohm. For measuring the actual device
performance on connectorized PC board, input losses due to RF
traces need to be subtracted from the data measured through
SMA connectors. The calibration microstrip line J6-J7 estimates
the PCB insertion loss for removal from the evaluation board
measured data. All data shown on the datasheet are de-
embedded up to the device input/output pins.
The PC board is designed to test using USB control interface
board, Evaluation Board Host (EVH). Each TQP4M9072
evaluation board is supplied with the EVH board, USB cable and
EVH graphical user interface (EVH GUI) to change attenuation
states. Manual for using EVH and Application note describing
the EVH are also available. Refer to TriQuint’s website for more
information
The pad pattern shown has been developed and tested for
optimized assembly at TriQuint Semiconductor. The PCB land
pattern has been developed to accommodate lead and package
tolerances. Since surface mount processes vary from company to
company, careful process development is recommended.
R4
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 11 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Bill of Material: 0.7 - 4.0 GHz Operation (Mode 1)
Reference Desg.
Value
Description
Manufacturer
Part Number
U1
High Linearity 6-Bit, 31.5dB, DSA
TriQuint
TQP4M9072
C2, C6, C16
47 pF
Cap, Chip, 0402, 50V, NPO, 5%
various
C1,C3
1000 pF
Cap, Chip, 0402, 50V, X7R, 10%
various
C4
0.1 uF
Cap, Chip, 0402, 50V, X7R, 10%
various
R1, R2, R3
33
Res, Chip, 0402, 1/16W, 1%
various
R4
15
Res, Chip, 0402, 1/16W, 5%
various
C10, C11, C12, C13
DNP
Do Not Place
various
Bill of Material: 0.04 - 4.0 GHz Operation (Mode 2)
Reference Desg.
Value
Description
Manufacturer
Part Number
U1
High Linearity 6-Bit, 31.5dB, DSA
TriQuint
TQP4M9072
C2, C6, C16
47 pF
Cap, Chip, 0402, 50V, NPO, 5%
various
C1,C3
1000 pF
Cap, Chip, 0402, 50V, X7R, 10%
various
C4
0.1 uF
Cap, Chip, 0402, 50V, X7R, 10%
various
R1, R2, R3
33
Res, Chip, 0402, 1/16W, 1%
various
R4
15
Res, Chip, 0402, 1/16W, 5%
various
C10, C11, C12, C13
330 pF
Cap, Chip, 0402, 50V, X7R, 10%
various
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 12 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Applications Information
PC Board Schematic
1
2
3
4
5
6
ACGND6
RF OUT
18
17
16
15
14
13
24
23
22
21
20
19
7
8
9
10
11
12
ACGND5
ACGND4
ACGND3
ACGND2
ACGND1
GND
SEROUT
NC
NC
Vdd
NC
NC
NC
NC
NC
NC
NC
CLK
SERIN
LE
GND
RF IN
U1
C11
C12
C13
330pF
330pF
330pF
C1
1000pF
C10
330pF
50 Ohms
C5
0.2pF
RF
Input C7
0.2pF
RF
Output
C3
1000pF
50 Ohms
C6
47pF
C16
47pF
C2
47pF
C4
0.1uF
R4
15 Ω
Vdd
J5-1 Vdd
J5-2 GND
J5-3
J5-4
J5-5
J5-6
J5-7
J5-8
J5-9
J5-10
J5-11 SERIN
J5-12 CLK
J5-13 LE
J5-14
J5-15
J5-16
J5-17
J5-18
J5-19
J5-20 GND
R1
33 Ω
R2
33 Ω
R3
33 Ω
Vdd
J1 J2
C5 not required for final
application circuit. Used on
PCB to resonate out the
RF connector parasitics.
C7 not required for final
application circuit. Used on
PCB to resonate out the
RF connector parasitics.
Thru Calibration Line
C8
1000pF
50 Ohms
C14
0.2pF
RF
Input C15
0.2pF
RF
Output
C9
1000pF
50 Ohms
J6 J7
50 Ohms
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 13 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Mechanical Information
Package Information and Dimensions
This package is lead-free, RoHS-compliant, and green. The plating material on the pins is annealed matte tin over copper. It is compatible
with both lead-free (maximum 260 C reflow temperature) and leaded (maximum 245 C reflow temperature) soldering processes.
The component will be laser marked with “4M9072” product label with an alphanumeric lot code on the top surface of the package.
4.000
4.000
.85±.05
0.000-.050
0.203 Ref.
d.08 C
f.10 C
C
A
B
PIN #1 IDENTIFICATION
CHAMFER 0.300 X 45°
2.700±0.050
Exp.DAP
2.700±0.050
Exp.DAP
.500 Bsc
2.500
Ref.
.400±0.050
.25±0.050
R.075
Mounting Configuration
All dimensions are in millimeters (inches). Angles are in degrees.
.64 TYP
2.70
2.70
2.70
2.70
COMPONENT SIDE
BACK SIDE
.64 TYP
16X .38
.50 PITCH, TYP
FULL R.19
24X .70
4M9072
All dimensions are in millimeters (inches).
Angles are in degrees.
Notes:
1. Ground vias are critical for the proper RF
performance of this device. Vias should
use a .35mm (#80 / .0135”) diameter drill
and have a final plated thru diameter of
.25 mm (.010”).
2. Add as much copper as possible to inner
and outer layers near the part to ensure
optimal thermal performance.
TQP4M9072
High Linearity 6-Bit, 31.5dB Digital Step Attenuator
Data Sheet: Rev I 05-23-12
- 14 of 14 -
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
Product Compliance Information
ESD Information
ESD Rating: Class 1C
Value: Passes 1000 V to < 2000 V
Test: Human Body Model (HBM)
Standard: JEDEC Standard JESD22-A114
ESD Rating: Class IV
Value: Passes 1000 V
Test: Charged Device Model (CDM)
Standard: JEDEC Standard JESD22-C101
Solderability
Compatible with both lead-free (maximum 260 °C
reflow temperature) and tin/lead (maximum 245 °C
reflow temperature) soldering processes.
This part is compliant with EU 2002/95/EC RoHS
directive (Restrictions on the Use of Certain Hazardous
Substances in Electrical and Electronic Equipment).
This product also has the following attributes:
Lead Free
Halogen Free (Chlorine, Bromine)
Antimony Free
TBBP-A (C15H12Br402) Free
PFOS Free
SVHC Free
MSL Rating
MSL 1 at +260 °C convection reflow
The part is rated Moisture Sensitivity Level 1 at 260°C per JEDEC
standard IPC/JEDEC J-STD-020.
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and information about
TriQuint:
Web: www.triquint.com Tel: +1.503.615.9000
Email: info-sales@tqs.com Fax: +1.503.615.8902
For technical questions and application information:
Email: sjcapplications.engineering@tqs.com
Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained
herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint
assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained
herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with
the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest
relevant information before placing orders for TriQuint products. The information contained herein or any use of such
information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property
rights, whether with regard to such information itself or anything described by such information.
TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining
applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
