Typical Connection
HALF-BRIDGE DRIVER
Features
•Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
•Gate drive supply range from 10 to 20V
•Undervoltage lockout for both channels
•3.3V and 5V input logic compatible
•Matched propagation delay for both channels
•Logic and power ground +/- 5V offset.
•Lower di/dt gate driver for better noise immunity
•Output source/sink current capability 1.4A/1.8A
•Also available LEAD-FREE (PbF)
IR21834
IR2183
Packages
www.irf.com 1
IR2183(4)(S) & (PbF)
Data Sheet No. PD60173 rev.H
(Refer to Lead Assignment for correct pin
configuration) This/These diagram(s) show
electrical connections only. Please refer to our
Application Notes and DesignTips for proper circuit
board layout.
14-Lead PDIP
IR21834
14-Lead SOIC
IR21834S
Description
The IR2183(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The
logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction.
The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration
which operates up to 600 volts.
IR2181/IR2183/IR2184 Feature Comparison
8-Lead PDIP
IR2183
8-Lead SOIC
IR2183S
IR2183(4)(S) & (PbF)
2www.irf.com
Symbol Definition Min. Max. Units
VBHigh side floating absolute voltage -0.3 625
VSHigh side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 VCC + 0.3
DT Programmable dead-time pin voltage (IR21834 only) VSS - 0.3 VCC + 0.3
VIN Logic input voltage (HIN & )V
SS - 0.3 VSS + 5
VSS Logic ground (IR21834 only) VCC - 25 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25°C (8-lead PDIP) — 1.0
(8-lead SOIC) — 0.625
(14-lead PDIP) — 1.6
(14-lead SOIC) — 1.0
RthJA Thermal resistance, junction to ambient (8-lead PDIP) — 125
(8-lead SOIC) — 200
(14-lead PDIP) — 75
(14-lead SOIC) — 120
TJJunction temperature — 150
TSStorage temperature -50 150
TLLead temperature (soldering, 10 seconds) — 300
V
°C
°C/W
W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.
VB High side floating supply absolute voltage VS + 10 VS + 20
VSHigh side floating supply offset voltage Note 1 600
VHO High side floating output voltage VSVB
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC
VIN Logic input voltage (HIN & )V
SS VSS + 4
DT Programmable dead-time pin voltage (IR21834 only) VSS VCC
VSS Logic ground (IR21834 only) -5 5
TAAmbient temperature -40 125 °C
V
Symbol Definition Min. Max. Units
IR2183(4)(S) & (PbF)
www.irf.com 3
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, DT= VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
VIH Logic “1” input voltage for HIN & logic “0” for 2.7 — — VCC = 10V to 20V
VIL Logic “0” input voltage for HIN & logic “1” for — — 0.8 VCC = 10V to 20V
VOH High level output voltage, VBIAS - VO— — 1.2 IO = 0A
VOL Low level output voltage, VO— — 0.1 IO = 0A
ILK Offset supply leakage current — — 50 VB = VS = 600V
IQBS Quiescent VBS supply current 20 60 150 VIN = 0V or 5V
IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA VIN = 0V or 5V
IIN+ Logic “1” input bias current — 25 60 HIN = 5V, = 0V
IIN- Logic “0” input bias current — — 1.0 HIN = 0V, = 5V
VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8
VBSUV+ threshold
VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9.0
VBSUV- threshold
VCCUVH Hysteresis 0.3 0.7 —
VBSUVH
IO+ Output high short circuit pulsed current 1.4 1.9 — VO = 0V,
PW ≤ 10 µs
IO- Output low short circuit pulsed current 1.8 2.3 — VO = 15V,
PW ≤ 10 µs
V
µA
µA
V
A
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.
Symbol Definition Min. Typ. Max. Units Test Conditions
ton Turn-on propagation delay — 180 270 VS = 0V
toff Turn-off propagation delay — 220 330 VS = 0V or 600V
MT Delay matching | ton - toff |—0 35
trTurn-on rise time — 40 60 VS = 0V
tfTurn-off fall time — 20 35 VS = 0V
DT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 280 400 520 RDT= 0
HO turn-off to LO turn-on (DTHO-LO) 456µsec RDT = 200k (IR21834)
MDT Deadtime matching = | DTLO-HO - DTHO-LO |— 0 50 RDT=0
— 0 600 RDT = 200k (IR21834)
nsec
nsec
IR2183(4)(S) & (PbF)
4www.irf.com
Functional Block Diagrams
2183
LIN
+5V
UV
DETECT
DELAY
COM
LO
VCC
HIN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
DEADTIME &
SHOOT-THROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
21834
LIN
UV
DETECT
DELAY
HIN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
DEADTIME &
SHOOT-THROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
COM
LO
VCC
IR2183(4)(S) & (PbF)
www.irf.com 5
14-Lead PDIP 14-Lead SOIC
IR21834 IR21834S
Lead Assignments
8-Lead PDIP 8-Lead SOIC
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase (referenced to COM for IR2183 and
VSS for IR21834)
Logic input for low side gate driver output (LO), out of phase (referenced to COM for IR2183
and VSS for IR21834)
DT Programmable dead-time lead, referenced to VSS. (IR21834 only)
VSS Logic Ground (21834 only)
VBHigh side floating supply
HO High side gate driver output
VSHigh side floating supply return
VCC Low side and logic fixed supply
LO Low side gate driver output
COM Low side return
IR2183 IR2183S
1
2
3
4
8
7
6
5
HIN
LIN
COM
LO
VB
HO
VS
VCC
1
2
3
4
8
7
6
5
HIN
LIN
COM
LO
VB
HO
VS
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
HIN
LIN
VSS
DT
COM
LO
VCC
VB
HO
VS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
HIN
LIN
VSS
DT
COM
LO
VCC
VB
HO
VS
IR2183(4)(S) & (PbF)
6www.irf.com
Figure 1. Input/Output Timing Diagram
Figure 3. Deadtime Waveform Definitions
Figure 2. Switching Time Waveform Definitions
IR2183(4)(S) & (PbF)
www.irf.com 7
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
T emperature (oC)
Turn-on Propagation Delay (ns)
Typ.
Max.
Figure 4A. Turn-on P ropag ation Delay
vs. Temperature
0
100
200
300
400
500
10 12 14 16 18 20
Supp ly Voltage (V)
Turn-on P ropagation Delay (ns)
Figure 4 B. Turn-on Propaga tion Dela y
vs. Supply Voltage
Typ.
Max.
100
200
300
400
500
600
-50 -25 0 25 50 75 100 125
T emperature (oC)
Turn-off Propagation Delay (ns)
Typ.
Max.
F igure 5A. Turn-off P ropagation Delay
vs. Temperature
0
100
200
300
400
500
600
10 12 14 16 18 20
Supply Voltage (V)
Turn-off Propagation Delay (ns)
Figure 5B. Turn-off P ropa ga tion Dela y
v s. S up ply Voltag e
Typ.
Max.
IR2183(4)(S) & (PbF)
8www.irf.com
0
20
40
60
80
100
120
-50 -25 0 25 50 75 100 125
T emperature (oC)
Tu rn-o n R ise Ti me (n s)
Typ.
Max.
Figure 6 A . Turn-on Rise Time vs. Temperature
0
20
40
60
80
100
120
10 12 14 16 18 20
Su pply Voltage (V)
T urn -on Ri se T ime (n s )
Figure 6 B. Turn-on Rise Time vs. S u pply Voltage
Typ.
Max.
0
20
40
60
80
-50 -25 0 25 50 75 100 125
T emperature (oC)
Tu rn-o ff Fall Tim e (n s)
Typ
Max.
Figure 7A . Turn-off Fa ll Time vs. Temperature
0
20
40
60
80
10 12 14 16 18 20
Su pply Voltage (V)
Tu rn-o ff Fall Tim e (n s)
Figure 7B. Turn-off Fall Time vs. S upply Voltag e
Typ.
Max.
IR2183(4)(S) & (PbF)
www.irf.com 9
100
300
500
700
900
1100
-50 -25 0 25 50 75 100 125
T emperature (oC)
D e a d ti me (ns)
Min.
F igure 8A. Deadtime vs. Temperature
Typ.
Max.
100
300
500
700
900
1100
10 12 14 16 18 20
Su pply Voltage (v)
Deaduime (ns)
Figure 8B. Dea dtime vs. Supply Volta ge
Typ.
Max.
Min.
0
1
2
3
4
5
6
7
0 50 100 150 200
RDT (K°)
Deadtim e ( °s)
F igure 8C. D eadtime vs. R DT
Typ.
Max.
Min.
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
T emperature (oC)
Logic "1" Input V oltage (V )
Min.
Figure 9A . Logic " 1 " Inpu t Voltage
vs. Temperature
IR2183(4)(S) & (PbF)
10 www.irf.com
0
1
2
3
4
5
6
10 12 14 16 18 20
Su pply Voltage (V)
Logic "1" Input Voltage (V)
Figure 9B. Logic " 1 " In put Voltage
vs. Supply Voltage
Min.
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
T emperature (oC)
Logic "0" Input V oltage (V )
Max.
Figure 10A . Logic "0 " Input Voltage
vs. Temperature
0
1
2
3
4
5
6
10 12 14 16 18 20
Su pply Voltage (V)
Logic "0" Input Voltage (V )
Figure 10 B. Logic " 0 " Input Voltage
v s. S u pply Voltage
Max.
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
T emperature (oC)
High Level Output (V )
Max.
Figure 1 1 A . High Level Output vs. Tempera ture
IR2183(4)(S) & (PbF)
www.irf.com 11
0
1
2
3
4
5
10 12 14 16 18 20
Su pply Voltage (V)
High Level Output (V )
Figure 11 B. High Lev el Output vs. S upply Voltage
Max.
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100 125
T emperature (oC)
Lo w Le vel Ou tp u t (V )
Max.
Figure 12A. Low Lev el Output vs. Temperature
0.0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18 20
Su pply Voltage (V)
Low Level Output (V )
F igure 12B. Low Level O utput vs. Supply Voltage
Max.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
T emperature (oC)
Offset Sup p l y Le a kag e C u rren t ( A )
Max.
Figure 13A. Offset S upply Lea kage C urrent
vs. Tempera ture
IR2183(4)(S) & (PbF)
12 www.irf.com
0
100
200
300
400
500
100 200 300 400 500 600
VB B o ost Voltage (V)
Offset Sup p l y Le a ka g e C u rren t ( A )
Figure 13B. Offset S upply Leakage C urrent
vs. VB Boost Voltage
Max.
0
50
100
150
200
250
-50 -25 0 25 50 75 100 125
T emperature (oC)
VBS Supply Current ( A)
Min.
Figure 14A. VBS Su pply C urrent
vs. Tempera ture
Typ.
Max.
0
50
100
150
200
250
10 12 14 16 18 20
VBS F loating Supply Voltage (V)
VBS Su pply Current ( A)
F igure 14B. VBS S upply C urrent
vs. VBS Floa ting S upply Voltage
Typ.
Max.
Min.
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
Temperature (oC)
VCC Supply Current (mA
)
Min.
Figure 15A. VCC Supply Cur rent
vs. Temperature
Typ.
M ax.
IR2183(4)(S) & (PbF)
www.irf.com 13
0
1
2
3
4
5
10 12 14 16 18 20
VCC Supply Voltage (V)
VCC Supply Current (mA
)
Figure 15B. VCC Supply Current
vs. VCC Supply Voltage
0
20
40
60
80
100
120
-50 -25 0 25 50 75 100 125
T emperature (oC)
Logic "1" Input B ias Current ( A )
Figure 16A . Logic "1 " Input Bias Current
v s. Tempera ture
Typ.
Max.
0
20
40
60
80
100
120
10 12 14 16 18 20
Su pply Voltage (V)
Logic "1" Input Bias Current ( A)
F igure 16B. Logic "1" Input B ias Current
vs. S upply Voltag e
Typ.
Max.
0
1
2
3
4
5
-50-25 0 25 50 75100125
T emperature (oC)
Logic "0" Input Bias Current ( A)
Max.
Figure 17A. Logic " 0 " Input Bias Current
v s. Temperature
IR2183(4)(S) & (PbF)
14 www.irf.com
0
1
2
3
4
5
10 12 14 16 18 20
Su pply Voltage (V)
Logic "0" Input Bias Current ( A)
F igure 17B. Logic "0" Input Bias Current
vs. Supply Voltage
Max.
6
7
8
9
10
11
12
-50 -25 0 25 50 75 100 125
T emperature (oC)
VCC and V BS UV Thresho ld (+) (V)
Min.
Figure 18. VCC and VBS Undervolta ge Threshold (+)
v s. Temperature
Typ.
Max.
6
7
8
9
10
11
12
-50 -25 0 25 50 75 100 125
T emperature (oC)
VCC and V BS UVThreshold (-) (V)
Min.
F igure 19. VCC and VBS Undervoltage Threshol d (-)
vs. Temperature
Typ.
Max.
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
T emperature (oC)
Output Source Current (A )
Min.
Figure 20 A . Output Source Current
v s. Temperature
Typ.
IR2183(4)(S) & (PbF)
www.irf.com 15
0
1
2
3
4
5
10 12 14 16 18 20
Su pply Voltage (V)
Output Source Current (A )
Figure 2 0 B. Output S o urce Cu rrent
vs. S upply Voltag e
Typ.
Min. 1.0
2.0
3.0
4.0
5.0
-50 -25 0 25 50 75 100 125
T emperature (oC)
Outp u t Si n k Cu rre n t (A)
Min.
Figure 21A. Output Si nk Current
vs. Temperature
Typ.
0
1
2
3
4
5
10 12 14 16 18 20
Su pply Voltage (V)
Outp u t Sin k Cu rrent (A)
Figure 21B. Output S in k Current
vs. S upply Voltag e
Typ.
Min.
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temprature (
oC)
140v
70v
0v
Figure 22. IR2183 vs. Frequency (IRF BC20),
Rgate=33Ω, VCC=15V
IR2183(4)(S) & (PbF)
16 www.irf.com
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
70v
0v
140v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
Figure 23. IR2183 vs. Frequency (IRFBC30),
Rgate=22Ω, VCC=15V Figure 24. IR2183 vs. F requency (IRF BC40),
Rgate=15Ω, VCC=15V
Figure 25. IR2183 vs. Frequency (IRF P E50),
Rgate=10Ω, VCC=15V F igure 26. IR21834 vs. Frequency (IRF BC20),
Rgate=33Ω, VCC=15V
IR2183(4)(S) & (PbF)
www.irf.com 17
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
70v
0v
140v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
Figure 27. IR21834 vs. Frequency (IRF BC30),
Rgate=22Ω, VCC=15V F igure 28. IR21834 vs. Frequency (IRF BC40),
Rgate=15Ω, VCC=15V
Figure 29. IR21834 vs. Frequency (IRF P E50),
R
g
ate=10Ω, VCC=15V Figure 30. IR2183s vs. F requency (IRF BC20),
Rgate=33Ω, VCC=15V
IR2183(4)(S) & (PbF)
18 www.irf.com
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
0v
140v 70v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Tempreture (
oC)
140V 70V 0V
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
Figure 31. IR2183s vs. Frequency (IRFBC30),
Rgate=22Ω, VCC=15V Figure 32. IR2183s vs. Frequency (IRFBC40),
Rgate=15Ω, VCC=15V
Figure 33. IR2183s vs. Frequency (IRFPE50),
Rgate=10Ω, VCC=15V F igure 34. IR21834s vs. F requency (IRFBC20),
Rgate=33Ω, VCC=15V
IR2183(4)(S) & (PbF)
www.irf.com 19
20
40
60
80
100
120
140
1 10 100 1000
F requency (KHz)
Temperature (oC)
140v
70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v 70v
0v
20
40
60
80
100
120
140
1 10 100 1000
Frequency (KHz)
Temperature (
oC)
140v
70v
0v
Figure 35. IR21834s vs. Frequency (IRFBC30),
Rgate=22Ω, VCC=15V
Figure 36. IR21834s vs. Frequency (IRFBC40),
R
gate
=15
Ω
, V
CC
=15V
Figure 37. IR21834s vs. Frequency (IRFPE50),
R
gate
=10
Ω
, V
CC
=15V
IR2183(4)(S) & (PbF)
20 www.irf.com
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
87
5
65
D B
E
A
e
6X
H
0. 25 [.010 ] A
6
4312
4 . OUT LINE CONFORMS TO JEDEC OUTLINE MS- 012AA.
NOTES:
1. DI MENSI ONING & TOLERANCING PER ASME Y14.5M-1994.
2 . CONT ROLLING DIMENSION: MIL LIMET ER
3 . D IMENSIONS ARE SHOWN IN MILLIMET ERS [INCHES] .
7
K x 4 5°
8X L 8X c
y
FOOTPRINT
8X 0.72 [ . 02 8]
6. 46 [ . 2 55]
3X 1.27 [ . 05 0] 8X 1.78 [ . 07 0]
5 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSI ONS NOT TO EXCEED 0.25 [.010].
7 D IMENSION IS THE LENGT H OF LEAD FOR SOLD ERING T O
A SUBSTRATE.
MOLD PROTRUSI ONS NOT TO EXCEED 0.15 [.006].
0. 25 [.010 ] CAB
e1 A
A1
8X b
C
0. 10 [.004 ]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASI C
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASI C
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINC H ES MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASI C 0.635 BASIC
Case outlines
IR2183(4)(S) & (PbF)
www.irf.com 21
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6019
01-3063 00 (MS-012AB)
14-Lead SOIC (narrow body)
IR2183(4)(S) & (PbF)
22 www.irf.com
Basic Part (Non-Lead Free)
8-Lead PDIP IR2183 order IR2183
8-Lead SOIC IR2183S order IR2183S
14-Lead PDIP IR21834 order IR21834
14-Lead SOIC IR21834 order IR21834S
Leadfree Part
8-Lead PDIP IR2183 order IR2183PbF
8-Lead SOIC IR2183S order IR2183SPbF
14-Lead PDIP IR21834 order IR21834PbF
14-Lead SOIC IR21834 order IR21834SPbF
ORDER INFORMATION
LEADFREE PART MARKING INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
4/4/2006
