○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays
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©2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
Datashee
t
TSZ22111・14・001
Serial EEPROM Series Automotive EEPROM
125℃ Operation SPI BUS EEPROM
BR25H040-2C
●General Description
BR25H040-2C is a serial EEPROM of SPI BUS interface method.
●Features
High speed clock action up to 10MHz (Max.)
Wait function by HOLDB terminal.
Part or whole of memory arrays settable as read only
memory area by program.
2.5V to 5.5V single power source action most
suitable
for battery use.
Page write mode useful for initial value write at
factory shipment.
For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)
Self-timed programming cycle.
Low Supply Current
At write operation (5V) : 1.0mA (Typ.)
At read operation (5V) : 1.0mA (Typ.)
At standby operation (5V) : 0.1μA (Typ.)
Address auto increment function at read operation
Prevention of write mistake
Write prohibition at power on.
Write prohibition by command code (WRDI).
Write prohibition by WPB pin.
Write prohibition block setting by status registers
(BP1, BP0).
Prevention of write mistake at low voltage.
MSOP8, TSSOP-B8, SOP8, SOP-J8 Package
Data at shipment Memory array: FFh, status register
BP1, BP0 : 0
More than 100 years data retention.
More than 1 million write cycles.
AEC-Q100 Qualified.
●Package
●Page write
Number of pages 16 Byte
Product Number BR25H040-2C
●BR25H040-2C
Capacity Bit Format Product Number Supply Voltage MSOP8 TSSOP-B8 SOP8 SOP-J8
4Kbit 512×8 BR25H040-2C 2.5V to 5.5V ● ● ● ●
MSOP8
2.90mm x 4.00mm x 0.90mm TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP8
5.00mm x 6.20mm x 1.71mm SOP-J8
4.90mm x 6.00mm x 1.65mm
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Absolute maximum ratings (Ta=25°C)
Parameter Symbol Limits Unit
Supply Voltage VCC -0.3 to +6.5 V
380(MSOP8) *1
410(TSSOP-B8) *2
560(SOP8) *3
Permissible Dissipation Pd
560(SOP-J8) *4
mW
Storage Temperature Range Tstg -65 to +150 °C
Operating Temperature Range Topr -40 to +125 °C
Terminal Voltage － -0.3 to VCC+0.3 V
・When using at Ta=25℃ or higher, 3.1mW(*1) , 3.3mW(*2) , 4.5mW (*3,*4)to be reduced per 1℃
●Memory cell characteristics (VCC=2.5V to 5.5V)
Limits
Parameter Min. Typ. Max.
Unit Condition
1,000,000 － － Cycles Ta≦85°C
500,000 － － Cycles Ta≦105°C
Write Cycles *5
300,000 － － Cycles Ta≦125°C
100 － － Years Ta≦25°C
60 － － Years Ta≦105°C Data Retention *5
50 － － Years Ta≦125°C
*5: Not 100% TESTED
●Recommended Operating Ratings
Parameter Symbol Limits Unit
Supply Voltage VCC 2.5 to 5.5
Input Voltage Vin 0 to VCC V
●Input / output capacity (Ta=25°C, frequency=5MHz)
Parameter Symbol Conditions Min Max Unit
Input Capacity *6 C
IN V
IN=GND － 8
Output Capacity *6 C
OUT V
OUT=GND － 8 pF
*6: Not 100% TESTED
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●DC characteristics (Unless otherwise specified, Ta=-40°C to +125°C, VCC=2.5V to 5.5V)
Limits
Parameter Symbol
Min. Typ. Max.
Unit Conditions
Input High Voltage VIH 0.7xVCC － VCC
+0.3 V 2.5V≦VCC≦5.5V
Input Low Vo ltage VIL -0.3 － 0.3x
VCC V 2.5V≦VCC≦5.5V
Output Low Vol tage VOL 0 － 0.4 V IOL=2.1mA
Output High Voltage VOH VCC-0.5 － VCC V IOH=-0.4mA
Input Leakage
Current ILI -2 － 2 μAV
IN=0V to VCC
Output Leakage
Current ILO -2 － 2 μAV
OUT=0V to VCC, CSB=VCC
ICC1 － － 2.0 mA VCC=2.5V,fSCK=5MHz, tE/W=4ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byt e wr i t e , Page wr i t e , Write status register
Supply Current
(WRITE)
ICC2 － － 3.0 mA VCC=5.5V,fSCK=5 or 10 MHz, tE/W=4ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byt e wr i t e , Page wr i t e , Write status register
ICC3 － － 1.5 mA VCC=2.5V,fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
ICC4 － － 2.0 mA VCC=5.5V,fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
Supply Current
(READ)
ICC5 － － 4.0 mA VCC=5.5V,fSCK=10MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
Standby Current ISB － － 10 μAVCC=5.5V
CSB=HOLDB=WPB=VCC,
SCK=SI=VCC or =GND, SO=OPEN
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●AC characteristics (Ta=-40°C to +125°C, unless otherwise specified, lo ad capacity CL1=100pF)
2.5V≦VCC≦5.5V 4.5V≦VCC≦5.5V
Parameter Symbol
Min. Typ. Max. Min. Typ. Max. Unit
SCK Frequency fSCK － － 5 － － 10 MHz
SCK High Time tSCKWH 85 － － 40 － － ns
SCK Low Time tSCKWL 85 － － 40 － － ns
CSB High Time tCS 85 － － 40 － － ns
CSB Setup Time tCSS 90 － － 30 － － ns
CSB Hold Time tCSH 85 － － 30 － － ns
SCK Setup Time tSCKS 90 － － 30 － － ns
SCK Hold Time tSCKH 90 － － 30 － － ns
SI Setup Time tDIS 20 － － 10 － － ns
SI Hold Time tDIH 30 － － 10 － － ns
Data Output Delay Time1 tPD1 － － 60 － － 40 ns
Data Output Delay Time2
(CL2=30pF) tPD2 － － 50 － － 30 ns
Output Hold Time tOH 0 － － 0 － － ns
Output Disable Time tOZ － － 100 － － 40 ns
HOLDB Setting
Setup T ime tHFS 0 － － 0 － － ns
HOLDB Setting
Hold T ime tHFH 40 － － 30 － － ns
HOLDB Release
Setup T ime tHRS 0 － － 0 － － ns
HOLDB Release
Hold T ime tHRH 70 － － 30 － － ns
Time from HOLDB
to Output High-Z tHOZ － － 100 － － 40 ns
Time from HOLDB
to Output Change tHPD － － 60 － － 40 ns
SCK Rise Time*1 tRC － － 1 － － 1 μs
SCK Fall Time*1 tFC － － 1 － － 1 μs
OUTPUT Rise Time*1 tRO － － 40 － － 40 ns
OUTPUT Fall Time*1 tFO － － 40 － － 40 ns
Write Time tE/W － － 4 － － 4 ms
*1 NOT 100% TESTED
●AC measurement conditions Limits
Parameter Symbol
Min. Typ. Max. Unit
Load Capacity 1 CL1 － － 100 pF
Load Capacity 2 CL2 － － 30 pF
Input Rise Time － － － 50 ns
Input Fall Time － － － 50 ns
Input Voltage － 0.2VCC/0.8VCC V
Input / Output
Judgment Voltage － 0.3VCC/0.7VCC
V
0.7Vcc
0.2Vcc
0.8Vcc
Input Voltage
0.3Vcc
Input/Output judgement voltage
Figure 1. Input/Output judgment voltage
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Serial Input / Output Timing
●Block diagram
Figure 5. Block diagram
Figure 2. Input timing
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the most significant bit MSB.
Figure 3. Input / Output timing
SO is output in sync with data fall edge of SCK. Data is output from the most significant bit MSB.
Figure 4. HOLD timing
SO
INSTRUCTION DECODE
CONTROL CLO C K
GENERATION
VOLTAGE
DETECTION
WRITE
INHIBITION
HIGH VOLTAGE
GENERATOR
INSTRUCTION
REGISTER
4K
EEPROM
ADDRESS
REGISTER
DATA
REGISTER
ADDRESS
DECODER
READ/WRITE
AMP 8bit
8bit
STATUS REGISTER
CSB
SCK
HOLDB 9bit 9bit
WPB
SI
CSB
SCK
SI
SO
tCS tCSS
tSCKS tSCKWL tSCKWH
tDIS tDIH
tRC tFC
High-Z
CSB
SCK
SI
SO
tPD tOH tRO,tFO tOZ
tCSH tSCKH
tCS
Hi
g
h-Z
CSB
SCK
SI n+1
"H"
"L"
n
Dn
n-1
Dn Dn-1
HOLDB
SO Dn+1
tHFS tHFH
tHOZ
tHRS tHRH
tDIS
tHPD
High-Z
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Pin Configuration
●Pin Descriptions
Terminal
number Terminal
name Input
/Output Function
1 CSB Input Chip select input
2 SO Output Serial data output
3 WPB Input
Write protect input
Write status register command is prohibited.
Write command is prohibited.
4 GND
－ All input / output reference voltage, 0V
5 SI Input Start bit, ope code, address, and serial data input
6 SCK Input Serial clock input
7 HOLDB Input
Hold input
Command communications m ay be suspended
temporarily (HOLD status)
8 VCC
－ Power source to be connected
VCC HOLDB SCK SI
CSB SO WPB GND
BR25H040-2C
Figure 6. Pin assignment diagr am
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves
0
1
2
3
4
5
6
0123456
SUPPLY VOLTAGE : VCC［V］
INPUT LOW VOLTAGE : VIL ［V］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
0
0.5
1
1.5
2
2.5
3
-1.2 -1 -0.8 -0.6 -0.4 -0.2 0
O UT PUT HI GH CURRE NT : IOH［mA］
O UT PUT HI GH V OL TAG E : VOH ［V］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
1
2
3
4
5
6
0123456
SUPPLY VOLTAGE : VCC［V］
INPUT HIGH VOLTAGE :VIH ［V］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
Figure 7. Input High Voltage VIH
(CSB,SCK,SI,HOLDB,WPB) Figure 8. Input Low Voltage VIL
(CSB,SCK,SI,HOLDB,WPB)
Figure 9. Output Low Voltage VOL, IOL (Vcc=2.5V) Figure 10. Output High Voltage VOH, IOH (Vcc=2.5V)
0
0.2
0.4
0.6
0.8
1
0123456
O UT PUT LOW CURRENT : IOL［mA］
OUTPUT LOW VOLTAGE : VOL［V］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0123456
SUPPLY VOLTAGE : VCC [V]
I NPUT LE AKAG E CURRE NT : ILI ［μA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
1
1
2
2
3
3
0123456
SUPPLY VOLTAGE : Vcc （V］
O UT PUT L EA K CURRE NT : ILO ［μA］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
0
1
2
3
4
0123456
SUPPLY VOLTAGE : VCC［V］
SUPP LY CURRENT (WRIT E) : Ic c 1, 2 ［mA］
SPEC
Ta= -40℃
Ta= 25 ℃
Ta= 12 5℃
SPEC
Figure 11. Input Leakage Current ILI
(CSB,SCK,SI,HOLDB,WPB) Figure 12. Output Leakage Current ILO(SO)(Vcc=5.5V)
Figure 13. Supply Current (WRITE ) ICC1,2
0
0.5
1
1.5
2
2.5
0123456
SUPPLY VOLTAGE : VCC［V］
S U PP LY CURRENT (READ) : Ic c 3, 4 ［mA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 14. Supply Current (READ) ICC3,4
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
Figure 15. Supply Current (READ) ICC5
Figure 17. SCK Frequency fSCK
Figure.16 Standby Current ISB
Figure 18. SCK High Time tSCKWH
0
2
4
6
8
10
12
0123456
SUPPLY VOLTAGE : VCC［V］
S T ANDB Y CURRENT : ISB ［μA］
SPEC
Ta= -40 ℃
Ta = 25℃
Ta= 125℃
0.1
1
10
100
0123456
SUPPL Y VOLTAGE : VCC［V］
SCK FREQUENCY : fSCK [MHz]
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
SPEC
0
1
2
3
4
5
0123456
SUPPLY VOLTAGE : VCC［V］
SUPPLY CURRENT : Icc5 ［mA］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
SCK HIGH TIME : tSCKWH ［ns］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
CSB HIGH TIME : tCS［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 19. SCK low time tSCKWL Figure 20. CSB high time tCS
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
CSB SETUP TIME : tCSS ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
SPEC
Figure 21. CSB setup time tCSS
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
CSB HOLD TIME : tCSH ［ns］
SPEC
Ta= -4 0℃
Ta= 25 ℃
Ta= 125℃
SPEC
Figure 22. CSB hold time tCSH
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
SCK L OW TIME : tSCKWL
［ns］
SPEC
Ta = -40℃
Ta = 2 5℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
10
20
30
40
50
0123456
SUPPLY VOLTAGE : VCC［V］
SI SE TUP TIME : tDIS［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
10
20
30
40
50
0123456
SUPPLY VOLTAGE : VCC［V］
SI HOLD TIME : tDIH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
DATA OUTPUT DE LA Y TIME : t PD1 ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 23. SI Setup Time tDIS Figure 24. SI Hold Time tDIH
Figure 25. Data Output Delay Time tPD1 (CL=100pF)
0
20
40
60
80
100
0123456
SUPPL Y VOL TAGE : VCC［V］
DATA OUTP UT DELAY TIME2 : t PD2 ［ns］
SPEC
Ta= -4 0℃
Ta= 25 ℃
Ta= 125℃
SPEC
Figure 26. Data Output Delay Time tPD2 (CL=30pF)
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
20
40
60
80
100
120
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT DISABLE TIME : tOZ ［ns］
SPEC
Ta = -40℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 27.Output Disable Time tOZ
0
10
20
30
40
50
0123456
SUPPL Y VOL TAGE : VCC［V］
HOL DB SETTING HOLD TIME : tHFH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
HOLDB RELEASE HOLD TIME : tHRH ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
Figure 29. HOLDB Release Hold Time tHRH
Figure 28. HOLDB Setting Hold Time tHFH
Figure 30. Time from HOLDB to Output High-Z tHOZ
0
30
60
90
120
0123456
SUPPLY VOLTAGE : VCC［V］
TIME FROM HOLDB TO OUTP UT HIGH-Z : tHOZ ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Typical Performance Curves‐Continued
0
2
4
6
8
0123456
SUPPL Y VOL TAGE : VCC［V］
WRITE TIME : tE /W ［ms］
SPEC
Ta = -40℃
Ta = 25℃
Ta = 125℃
Figure 34. Write Cycle Time tE/W
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT FAL L TIME : tFO ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
Figure 33. Output Fall Time tFO
Figure 32. Output Rise Time tRO
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
OUTPUT RISE TIME : tRO ［ns］
SPEC
Ta = -4 0℃
Ta = 25℃
Ta= 125℃
Figure 31. Time from HOLDB to Output Change tHPD
0
20
40
60
80
100
0123456
SUPPLY VOLTAGE : VCC［V］
TI ME FRO M HO LDB TO OUTPUT CHANGE : tHPD［ns］
SPEC
Ta= -4 0℃
Ta= 25℃
Ta= 125℃
SPEC
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Features
○Status registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Number of data rewrite times and data hold time are same as characteristics of the EEPROM.
WEN can be set by write ena ble command and write disable command. WEN becomes write disable status when power
source is turned off. R/B is for write confirmation, therefore c annot be set externally.
The value of status register can be read by read status command.
●Status registers
Product number bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
BR25H040-2C 1 1 1 1 BP1 BP0 WEN R
――/B
bit Memory
location Function Contents
BP1
BP0 EEPROM EEPROM write disable block designation bit This designates the write disable area of
EEPROM. Write designation areas of product
numbers are shown below.
WEN Register Write and write sta tus register w rite enable
/ disable status confirmation bit
WEN=0=prohibited , WEN=1=permitted This confirms prohibited status or permitted
status of the write and the write status register.
R
――/B Register Write cycle status (READY / BUSY) confirmation bit
R/B=0=READY , R/B=1=BUSY This confirms READY status or BUSY status of
the write cycle.
●Write disable block setting
BP1 BP0 BR25H040-2C
0 0 None
0 1 180h-1FFh
1 0 100h-1FFh
1 1 000h-1FFh
BR25H040-2C
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TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
○WPB pin
By setting WPB=LOW, write command is prohibited. As for BR25H040-2C, both WRITE and WRSR commands ar e
prohibited. However, when write cycle is in execution, no interruption can be made.
Product number WRSR WRITE
BR25H040-2C Prohibition
possible Prohibition
possible
○HOLDB pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
●Command mode
Command Contents Ope codes
WREN Write enable Write enable command 0000 *110
WRDI Write disable Write disable comman d 0000 *100
READ Read Read command 0000 A8011
WRITE Write Write command 0000 A8010
RDSR Read status
register Status register read command 0000 *101
WRSR Write status
register Status register write command 0000 *001
*=Don’t Care Bit.
BR25H040-2C
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●Timing Chart
1. Write enable (WREN) / disable (WRDI) cycle
○This IC has write enable status and write disable status. It is set to write enable status by write enable command, and
it is set to write disable status by write disable command. As for these commands, set C SB LOW, and then input the
respective ope codes. The respective commands accept command at the 7-th clock rise. Even with input over 7 clocks,
command becomes valid.
When to carry out write and write status register command, it is necessary to set write enable status by the write enable
command. If write or write status register command is input in the write disable status, commands are cancelled. And even in
the write enable status, once write and write status register command is executed. It gets in the write disable status. After
power on, this IC is in write disable status.
2. Read command (READ)
Product
number Address
length
BR25H040-2C A8-A0
By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope
code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 15 clock, and from D7 to
D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data
of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data of the most
significant address, by continuing increment read, data of the most insignific ant address is read.
WREN (WRITE ENABLE): Write enable
Figure 35. Write enable command
Figure 36. Write disable
WRDI (WRITE DISABLE): Write disable
*= Don’t care
*= Don’t care
High-Z
603 712 45
CSB
SCK
SO
SI
0000*1110
High-Z
00 0 0
SI
*1 1 0 0
0312 4 7
CSB
SCK
5 6
SO
Figure 37. Read command
High-Z
1 1 0
0 3 7 1 2
D6
SO
CSB
SCK
SI
4 5
A
4
6 8
A7
A
0
A
1
D7
15 2216
D0
0 0 0 0 A8
D2 D1
～
～
～
～
～
～～
～
～
～
～
～
～
～
～
～
～
～
9 10 11
A6 A5
*
*
BR25H040-2C
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3. Write command (WRITE)
By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data
after write ope code. Then, by making CSB HIGH, the EEPROM starts w riting. The write time of EEPROM requires time of
tE/W (Max 4ms). During tE/W, other than status read command is not accepted. Start CSB after taking the last data (D0),
and before the next SCK clock starts. At other timing, write command is not executed, and this write command is
cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input without
starting CSB, data up to 16 bytes can be written for one tE/W. In page write, the insignificant 4 bit of the designated
address is incremented internally at every time when data of 1 byte is input and data is written to respective addresses.
When data of the maximum bytes or higher is input, address rolls over, and previously input data is overwritten.
Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bits of data input and
the next SCK rising edge. At other timings the write command is not executed and cancelled (F igure.48 valid timing c). In
page write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together w ith the write
command and the input data is reset.
page0 000h 001h 002h ･･･ 00Eh 00Fh
page 1 010h 011h 012h ･･･ 01Eh 01Fh
page 2 020h 021h 022h ･･･ 02Eh 02Fh
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
page m-1 n-31 n-30 n-29 ･･･ n-17 n-16
page *2 m n-15 n-14 n-13 ･･･ n-1
*1 n
Product
number Address
length
BR25H040-2C A8-A0
Figure 38. Write command
Figure 39. N Byte page write command
*1 n=511d=1FFh : BR25H040-2C
*2 m=31 : BR25H040-2C
Figure 40. EEPROM physical address for Page write command (16Byte)
16byte
This column addresses are
Top address of this page
n= up to 16bytes
High-Z
23
D0
0 0 0 0 A8 D2 D1D7
15 2216
D6
0 A0A1
1
1 2 4
0
CSB
SCK
SI
SO
0 3 7 85 6
A4
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
A5 A6 A7
～
～
～
～
High-Z
(8n+16)-1
24
D7
0 0 0 0 D1 D0D7
15 2316
D6
0
A
0
A
1
1
1 2 4
0
CSB
SCK
SI
SO
0 3 7 8 5 6
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
～
12
～
～
～
～
～
～
～
～
17 22 25
8n+16
D6 D7 D6 D0
～
～
～
～
～
～
CSB 立ち上げ有効区間
(8n+16)-2(8n+16)-7
(8n+16)-8
A
3
A
6
A
7
A
8
This
column
addresses
are
the last address of this page
BR25H040-2C
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○Example of Page write command
No. Addresses of Page0 000h 001h 002h ････ 00Eh 00Fh
① Previous data 00h 01h 02h ････ 0Eh 0Fh
② 2 bytes input data AAh 55h - ････ - -
③ After No.② AAh 55h 02h ････ 0Eh 0Fh
AAh 55h AAh ････ AAh 55h
④ 18 byte input data FFh 00h - ････ - -
⑤ After No.④ FFh 00h AAh ････ AAh 55h
a：In case of input the data of No.② which is 2 bytes page write command for the data of No.①, EEPROM data changes
like No.③.
b：In case of input the data of No.④ which is 18 bytes page write command for the data of No.①, EEPROM data changes
like No.⑤.
c：In case of a or b, when write command is cancelled, EEPROM data keep No.①.
In page write command, when data is set to the last address of a page (e.g. address “01Fh” of page 1), the next data will b e
set to the top address of the same page (e.g. address “010h” of page 1). This is why page write address increment is
available in the same page. As a reference, if of 16 bytes, page write com mand is e xecuted for 2 byt es the data of the other
14 bytes without addresses will not be changed.
BR25H040-2C
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4. Status register write / read command
Write status register command can write status register data. The data can be written by this command are 2 bits, that is,
BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of EEPROM can be set. As
for this command, set CSB LOW, and input ope code of write status register , and input data. Then, by making CSB HIGH,
EEPROM starts writing. Write time requires time of tE/W as same as write. As for CSB rise, start CSB after taking the last
data bit (bit0), and before the next SCK clock starts. At other timing, command is cancelled. Write disable block is
determined by BP1 and BP0, and the block can be selected from 1/4 of memory array, 1/2, and entire memory array.
(Refer to the write disable block setting table.)
To the write disabled block, write cannot be made, and only read can be made. *
Figure 41. Status register write command
Figure 42. Status register read command
CSB
SCK
High-Z
＊=Don't care
0 0 0 0＊1＊
0
1 2 4
0
SI
SO
0 3 7 85 6
＊
910 11 12 13 14 15
＊ ＊ BP1 BP0 ＊ ＊
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
High-Z bit7 bit6 bit5 bit4
11 BP01BP1
bit3 bit2 bit1 bit0
13
CSB
SCK
SI 1 1
1060
SO
141 2
WEN R/B
11 15 3 7 9
0
5 12
0 0 0 0 ＊
4 8
1
＊=Don’t care
BR25H040-2C
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●At standby
○Current at standby
Set CSB “H”, and be sure to set SCK, SI, WPB, HOLDB input “L” or “H”. Do not input intermediate electric potential.
○T iming
As shown in Figure.43, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.
●WPB cancel valid area
WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command and
write command, pay attention to the following WPB valid timing.
While write or write status register command is executed, by setting WPB = “L” in cancel valid area, command can be
cancelled. The area from command ope code before CSB rise at internal automatic write start becomes the cancel valid area.
However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes in valid.
●HOLDB pin
By HOLDB pin, command communication can be stopped temporarily (HOLD status). The HOLDB pin carries out command
communications normally when it is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the
HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes hi gh impedance (High-Z). To release
the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD
status, by starting A4 address input, read can be restarted. When in HOLD status, leave CSB LOW. When it is set
CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
0 1 2
Command start here. SI is read.
Even if CSB is fallen at SCK=SI=”H”,
SI status is not read at that edge.
CSB
SCK
SI
Figure 43. Operating timing
Figure 45. WPB valid timing (W RITE)
Figure 44. WPB valid timing (W RSR)
6 7
Ope Code Data tE/W
Data write time
SCK 15 16
Invalid
CSB
Valid(WEN is reset by WPB=L)
6 7
Ope code
tE/W
Data write time
SCK
15 24
Invalid
8
Address
23
CSB
Data
Valid(WEN is reset by WPB=L)
BR25H040-2C
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●Method to cancel each command
○READ
・Method to cancel : cancel by CSB = “H”
○RDSR
・Method to cancel : cancel by CSB = “H”
○WRITE,PAGE WRITE
a：Ope code, address input area.
Cancellation is available by CSB=”H”
b：Data input area (D7 to D1 input area)
Cancellation is available by CSB=”H”
c：Data input area (D0 area)
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any means.
d：tE/W area.
Cancellation is available by CSB = “H”. However, when
write starts (CSB is started) in the area c, cancellation
cannot be made by any means. And by inputting on
SCK clock, cancellation cannot be made. In page write
mode, there is write enable area at every 8 clocks.
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore
write it once again.
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
○WRSR
a：From ope code to 15 rise.
Cancel by CSB =”H”.
b：From 15 clock rise to 16 clock rise (write enable area).
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any means.
c：After 16 clock rise.
Cancel by CSB=”H”. However, when write starts (CSB is started)
in the area b, cancellation cannot be mad e b y any means.
And, by inputting on SCK clock, cancellation cann ot be made.
Note 1) If VCC is made OFF during write execution, designated address da ta i s not guaran teed, therefore w rite it once again
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
○WREN/WRDI
a：From ope code to 7-th clock rise, cancel by CSB = “H”.
b：Cancellation is not available when CSB is started after 7-th clock.
Ope code Address
Cancel available in all areas of read mode
Data
8 bits 8 bits 8 bits
Figure 46 READ cancel valid timing
Ope code
Cancel available in all
areas of rdsr mode
Data
8 bits 8 bits
Figure 47 RDSR cancel valid timing
Ope code Address
a
Data tE/W
b d
c
8bits 8bits 8bits
D7
b
D6 D5 D4 D3 D2 D1 D0
SCK
SI
c
Ope code Data tE/W
8 bits
14 15 16 17
D1 D0
a b c
8 bits
a
b
c
SCK
SI
Ope code
8 bits
7 8 9
a b
SCK
Figure 49. WRSR cancel valid timing
Figure 50. WREN/WRDI cancel valid timing
Figure 48. WRITE cancel valid timing
BR25H040-2C
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●High speed operation
In order to realize stable high speed operatio ns, pay attention to the following input / output pin conditions.
○Input terminal pull up, pull down resistance
When to attach pull up, pull down resistance to EEPROM input terminal, select an appropriate value for the
microcontroller VOL, IOL from VIL characteristics of this IC.
○Pull up resistance
And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make CSB pull up.
○Pull down resistance
Further, b y amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of
VCC / GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8VCC /
0.2VCC is input, operation speed b ecomes slow.*1
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as possible,
and make the amplitude of si gnal input to EEPROM close to the amplitude of VCC / GND level.
(ж1 At this moment, operating timing guaranteed value is guaranteed.)
○SO load capacity condition
Load capacity of SO output terminal affects upon delay characteristic of SO output. (Data output delay time, time from
HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacity small. In concrete,
“Do not connect many devices to SO bus”, “Make the wire between the cont roller and EEPROM short”, and so forth.
○Other cautions
Make the wire length from the microcontroller to EEPROM input signal same length, in order to prevent setup / hold violation
to EEPROM, owing to difference of wire length of each input.
IOLM
VILE VOLM
“L” output “L” input
Microcontroller EEPROM
RPU
Figure 51. Pull up resistance
RPU≧ 5-0.4
2×10-
3
∴RPU≦ 2.3[kΩ]
With the value of Rpu to satisfy the above equation, VOLM
becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is
also satisfied.
・VILE :EEPROM VIL specifications
・VOLM :Microcontroller VOL specifications
・IOLM :Microcontroller IOL specifications
IOHM
VIHE VOHM
Microcontroller EEPROM
“H” output “H” input
RPD
Figure 52. Pull down resistance
Example) When VCC=5V, VOHM=VCC-0.5V, I OHM＝0.4mA,
VIHE=VCC×0.7V, from the equation③,
RPD≧ 5-0.5
0.4×10-
3
∴RPU≧ 11.3[kΩ]
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA,
from the equation ①,
Figure 53. VIL dependency of data output delay time tPD
tPD_VIL characteristics
0
10
20
30
40
50
60
70
80
0 0.2 0.4 0.6 0.8 1
VIL[V]
tPD[ns]
Vcc=2.5
V
Ta=25℃
VIH=Vcc
CL=100pF
Spec
RPU≧ VCC-VOLM
IOLM ･･･①
VOLM≦ V
ILE ･･･②
RPD≧ VOHM
IOHM ･･･③
VOHM≧ VIHE ･･･④
BR25H040-2C
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●I/O equivalence circuit
○Output circuit
○Input circuit
OEint.
SO
Figure 54. SO output equivalent circuit
CSB
RESETint.
Figure 55. CSB input equivalent circuit
SCK
SI
HOLDB WPB
Figure 56. SCK input equivalent circuit Figure 57. SI input equivalent circuit
Figure 58. HOLDB input equivalent circuit Figure 59. WPB input equivalent circuit
BR25H040-2C
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●Power-UP/Down conditions
○At power ON/OFF, set CSB “H” (=VCC).
When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, mistake write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all inputs
are canceled.)
(Good example) CSB terminal is pulled up to VCC.
At power OFF, take 10ms or higher before supply. If power is turned on without observing this condition, the IC internal
circuit may not be reset, which please note.
(Bad example) CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction, mistake write owing to noises
and the likes.
Even when CSB input is High-Z, the status becomes like this case, which please n ote.
○LVCC circuit
LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite.
○P.O.R. circuit
This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable
status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the
recommended conditions of the follow ing tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to
noises and the likes.
Recommended conditions of tR, tOFF, Vbot
●Noise countermeasures
○VCC noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1μF) between IC VCC and GND. At that moment, attach it as close to IC as
possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.
○SCK noise
When the rise time (tR) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock
bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set about
0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time
(tR) of SCK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures.
Make the clock rise, fall time as small as possible.
○WPB noise
During execution of write status register command, if there exist noises on WPB pin, mist ake in recognition may occur and
forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same
manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
tR tOFF Vbot
10ms or below 10ms or higher 0.3V or below
100ms or below 10ms or higher 0.2V or below
Figure 60. CSB timing at power ON/OFF
tR
tOFF Vbot
0
Vcc
Figure 61. Rise waveform
Bad
example
Good
example
GND
CSB
Vcc
GND
Vcc
Vcc
BR25H040-2C
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●Operational Notes
(1) Described n umeric values and data are design representative values, and the values are not guaranteed .
(2) Application circuit
Although we can recommend the application circuits contained herein with a relatively high degree of confidence, we
ask that you verify all characteristics and sp ecificatio ns of the circuit as well as its performance under actual conditi ons.
Please note that we cannot be held responsible for problems that may arise due to patent infringements or
noncompliance with any and all applicable laws a nd regulations.
(3) Absolute maximum ratings
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins. Therefore, it is import ant to consider circuit protection measures, such as
adding a fuse, in case the IC is operated over the absolute maximum ratings.
(4) Ground Voltage
The voltage of the ground pin must be the lo west voltage of all p ins of the IC at all operati ng conditions. Ensure that no
pins are at a voltage below the ground p in at any time, even during transient condition.
(5) Thermal consideration
Use a thermal design that allo ws for a sufficient margin by taking into account the perm iss ible po wer dissipation (Pd) in
actual operating conditio ns. Consider Pc that does not exceed Pd in actual operating conditio ns (Pc≥Pd).
Package Power dissip a tion : Pd (W)=(Tjmax－Ta)/θja
Power dissipation : Pc (W)=(Vcc－Vo)×Io+Vcc×Ib
Tjmax : Maximum junction te mperature=150℃, Ta : Peripheral temperature[℃] ,
θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current
(6) Short between pins and mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pi ns.
(7) Operation under strong electromagnetic field
Operating the IC in the presence of a strong electromagn etic field may cause the IC to malfunction.
BR25H040-2C
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●Part Numbering
B R 2 5 H 0 4 0 x x x - 2 C x x
BUS type
25: SPI
Packaging and formin g sp ecificatio n
E2: Embossed tape and reel
TR: Embossed tape and reel (MSOP8 package only)
Operating temperature/
Operating voltage
H: -40℃ to +125℃ / 2.5V to 5.5V
Process Code
040= 4K
Capacity
Package
FVM: MSOP8 FVT: TSSOP-B8 F: SOP8 FJ: SOP-J8
BR25H040-2C
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●Physical Dimension Tape and Reel Information
Package Name MSOP8
Direction of feed
Reel
∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
BR25H040-2C
28/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
Package Name TSSOP-B8
Direction of feed
Reel ∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
BR25H040-2C
29/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
Package Name SOP8
∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(UNIT : mm)
PKG : SOP8
Drawing No. : EX112-5001-1
(Max 5.35 (include.BURR))
BR25H040-2C
30/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
Package Name SOP-J8
∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
BR25H040-2C
31/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Marking Diagrams(TOP VIEW)
SOP-J8(TOP VIEW)
H040
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8(TOP VIEW)
H040
Part Number Marking
LOT Number
1PIN MARK
SOP8(TOP VIEW)
H040
Part Number Marking
LOT Numbe
r
1PIN MARK
MSOP8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
H04
0
BR25H040-2C
32/32
Datasheet
Datasheet
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0R1R0G100090-1-2
21.Mar.2013 Rev.001
●Revision History
Date Revision Changes
21. Mar. 2013 001 New Release
Datasheet
Datasheet
Notice - SS Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ
CLASSⅣ CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Datasheet
Datasheet
Notice - SS Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
