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Document No. 70-0149-05 www. psemi.com ©2005-2009 Peregrine Semiconductor Corp. All rights reserved.
RF1 RF2
CTRL
75CMOS
Control
Driver
ESD ESD
Parameter Condition Minimum Typical Maximum Units
Operating Frequency1 DC 3000 MHz
Insertion Loss DC – 50 MHz
1000 MH z 0.50
0.70 0.65
0.85 dB
Isolation DC – 50 MHz
1000 MH z 80
58 85
60 dB
Return Los s DC - 10 00 MHz
VCTRL = 3.0V 15 16 dB
Input 1 dB Co mpr es sio n2,4 1000 MHz 30 33 dBm
CTB / CSO 77 & 110 ch annels;
PO = 44 dBmV -90 dBc
Input IP2 2 1000 MHz 80 dBm
Input IP3 2 1000 MHz 50 dBm
Video F eedthrough3 15 mVpp
Switching Time 2 µS
The PE4271 is a is a high-isolation Switch designed for CATV
applications, covering a broad frequency range from near DC
up to 3000 MHz. This single-supply SPST switch offers a
single-pin CMOS control inte rface with industry leading CTB
performance. It also provides low insertion loss, high isolation
and extremely low bias requirements while operating on a
single 3-volt supply. In a typical CATV application, the PE4271
provides for a cost effective and manufacturable solution vs.
mechanical relays.
The PE4271 is manufactured on Peregrine’s UltraCMOS™
pro cess, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the econom y an d i nte gr ation of conventional
CMOS.
Pro duct Specificat ion
SPST CATV UltraCMOS™ Switch
DC - 3000 MHz
Product Description
Figure 1. Functional Diagram
PE4271
Features
Integrat ed 0.25 wat t termin ations
CTB perf orm anc e of 90 dBc
High isolation: 85 dB at 5 MHz, 60 dB
at 1000 MH z
Low i nser ti o n l oss : 0.5 dB at 5 MH z,
0.70 dB at 10 00 MHz
High input IP2: >80 dBm
CMOS/TTL single-p in cont rol
Single +3-volt supply operation
Extremely low bias: 8 µA @ 3 V
Available in a 6-lead DFN pa ckage
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50 system.
3. Me as ur ed wit h a 1 ns ris et i m e, 0/3 V puls e and 50 0 MH z ban dw i dth.
4. Note Absolute Maximum ratings in Table 3.
Table 1. Electrical Specifications @ +25 °C (ZS = ZL = 75 )
Fig ure 2. Package Typ e
6-lead DFN
Not for new design
Product Specification
PE4271
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©2005-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0149-05 UltraCMOS™ RFIC Solutions
Notes: 1. Both RF pins must be held at 0 VDC or require external DC
blocking capa cito rs
2. The exp os e d pa d mus t be sol dere d to t he gr ou nd plan e for
proper switch performance.
Table 2 . Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latc h-Up Avoidance
Unlike conven tional CMOS devices , UltraCMOS
devices are immune to latch-up.
Table 4. Operating Ranges Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Exposed
Solder Pad
(bot tom side)
V
DD
GND
RF1
RF2
GND
CTRL4
5
6
3
2
1
Device Description
The PE4271 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typica lly performed by bulky
and expensive mechanical switches. The high
isolation characteristics (60 dB at 1 GHz, 85 dB at
5 MHz), high compression point, and an integrated
75 (0.25 watt) input termination make the PE4271
an ideal, low cos t so lution.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of VDD. For flexibility to s up po rt
systems th at have 5-volt con t rol logic drivers, the
control logic input has been designed to handle a 5-
volt logic HIGH signal. (A minimal current will be
sourced out of the VDD pin when the control logic
input voltage level exceeds VDD.)
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum and
absolute maximum for extended periods may reduce
reliability.
Pin
No. Pin
Name D escrip tion
1 VDD Nominal 3V supply connection.
2 GND Ground connection.
2
3 RF1 RF port. 1
4 CTRL CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5 GND Ground connection. 3
6 RF2 RF port. 1
Symbol Parameter/Condition Min Max Unit
VDD Power supply voltage -0.3 4.0 V
VI Voltage on CTRL input -0.3 5.5 V
TST Storage temperature -65 150 °C
PIN Input power (50),
CTRL=1/CTRL=0 33/24 dBm
VESD ESD voltage
(Human Body Model) 500 V
Parameter Min Typ Max Unit
VDD Power Supply 2.7 3.0 3.3 V
IDD Power Supply Current
(VDD = 3V, VCTRL = 3V) 8 20 µA
Control Voltage High 0.7xVDD 5 V
Control Voltage Low 0 0.3xVDD V
TOP Operating temperature -40 85 °C
Control Voltage (CTRL) Signal Path (RF1 to RF2)
High1 ON
Low OFF
Figure 4. Typical Application Block Diagram
2-way
Splitter
Premium
Channel
Filter
PE4271
PE4271
CATVin CATVout
Moist u re Sensitivit y Lev el
The Moisture Sensitivity Level rating for the
PE4271 in the 6-lead 3x3 DFN package is MSL1.
Not for new design
Product Specification
PE4271
Page 3 of 8
Document No. 70-0149-05 www. psemi.com ©2005-2009 Peregrine Semiconductor Corp. All rights reserved.
Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted)
Figure 5. Insertion Loss - RF1 to RF2 Figure 6. 1dB Compression & 3rd Orde r
Figure 7. Isolation - RF1 to RF2
(75 imp edance except a s indicated )
Intercep t Poin t (T = 25°C)
Not for new design
Product Specification
PE4271
Page 4 of 8
©2005-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0149-05 UltraCMOS™ RFIC Solutions
Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted)
Figure 8. RF1 Return Loss (Switch = ON) Figure 9. RF1 Return Loss (Switch = OFF)
Figure 10. RF2 Return Loss (Switch = ON)
(75-ohm impedance)
Not for new design
Product Specification
PE4271
Page 5 of 8
Document No. 70-0149-05 www. psemi.com ©2005-2009 Peregrine Semiconductor Corp. All rights reserved.
Evaluation Kit
The PE4271 EK board was designed to ease
customer eval u ati o n of Per e gr i n e’ s hi gh
performance SPST CATV MOSFET switch. RF1
is connected through a 75 transmission line via
the top left F connector, J1. RF2 is connected
through a 75 transm iss ion line via the top right
F c onnec tor, J2. A 75 through tr ansmissi on line
is available via F connectors J3 and J4. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
bein g ev aluated . VDD is supplied via J6 -2, while
the contro l logic voltage is supplied via J5-2. It is
the re sponsib ility of the customer to determine
proper supply decoupling for their design
application. It has been observed that by
removing C1 and C2 from the evaluation board
has not shown to degrade RF performance.
The board is constructed of a two me tal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021 and r of 4.6. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.
Figure 11. Evaluation Board Layouts
Figure 12. Evaluation Board Schematic
Peregr ine S pec ificat ion 102/0245
Peregrine S pec ification 101/0167 ( with F c onnec tors)
Not for new design
Product Specification
PE4271
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©2005-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0149-05 UltraCMOS™ RFIC Solutions
6-lead DFN
Figure 13. Package Drawing
NOTE: The exposed solder pad (on the bottom of the package) is not electrically connected to any other pin
(isolated).
Figure 14. Marking Specifications
4271
YYWW
ZZZZZ
YYWW = Date Code (last two digits of year and work week)
ZZZZZ = Last five digits of Lot Number
06L SLP
(3x3mm)
Not for new design
Product Specification
PE4271
Page 7 of 8
Document No. 70-0149-05 www. psemi.com ©2005-2009 Peregrine Semiconductor Corp. All rights reserved.
Table 6. Dimensions
Dimensio n DFN 3x3 mm
Ao 3.23 ± 0.1
Bo 3.17 ± 0.1
Ko 1.37 ± 0.1
P 4 ± 0.1
W 8 +0.3, -0.1
T 0.254 ± 0.02
R7 Quantity 3000
R13 Quantity N.A.
Note: R7 = 7 in ch Lock Reel, R13 = 13 in ch Lock Reel
6-lead DFN
Table 7. Ordering Information
Or der Code Part Marking Description Package Shipping Method
4271-51 4271 PE4 271G -06D FN 3x 3m m- 1 28 00 F Gr ee n 6-le ad 3x 3 mm DFN Tap e or lo os e
4271-52 4271 PE4271G-06DFN 3x3mm-3000C Green 6-lead 3x3 mm DFN 3000 units / T&R
4271-00 PE4271-EK PE4271-06DFN 3x3mm-EK Evaluation Kit 1 / Box
Figure 15. Tape and Reel Specifications
Device Orientation in Tape
Top of
Device
Pin 1
Tape Feed Dire c tion
Not for new design
Product Specification
PE4271
Page 8 of 8
©2005-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0149-05 UltraCMOS™ RFIC Solutions
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Advance Information
The product is in a f ormative or design stage. The data
sheet contains design target specifications f or product
development. Specif ications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine r eserves the right
to change specifications at any time without notice in order
to supply t he best possible product.
Product Specification
The data sheet con tains final data. In the event Peregrine
dec ide s to cha nge the spe c ific ations, Pereg rine will not ify
customers of t he intended changes by is s u ing a DCN
(Document Change Notice).
The information in this dat a sheet is believed to be reliable.
Howeve r, Peregrine assum es no liabilit y for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or gr anted to any third party.
Peregrine’s pr oducts are not designed or intended for use in
devices or systems intended f or surgical implant, or in other
applications intended t o support or sustain life, or in any
application in which the failure of the Peregrine pr oduct could
create a situat ion in which personal injury or death m ight occur.
Peregr ine assumes no liability for damages, including
consequential or incidental dam ages, arising out of the use of
its products in such applications .
The Peregrine name, logo, and UTSi are registered tr ademarks
and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks
of Peregrine Semiconductor Corp.
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Not for new design