ANALOG DEVICES LC7MOS 8-Bit DAC with Output Amplifier AD7224 FEATURES 8-Bit CMOS DAC with Output Amplifier Operates with Single or Dual Supplies Low Total Unadjusted Error: Less than 1 LSB Over Temperature Extended Temperature Range Operation pP-Compatible with Double Buffered Input Standard 18-Pin DiPs and 20-Terminal Surface Mount Package and SOIC Package GENERAL DESCRIPTION The AD7224 is a precision 8-bit, voltage-output, digital-to-analog converter with output amplifier and double buffered interface logic on a monolithic CMOS chip. No external trims are required to achieve full specified performance for the part. The double buffered interface logic consists of two 8-bit registers an input register and a DAC register. Only the data held in the DAC register determines the analog output of the converter. The double buffering allows simultaneous update in a system containing multiple AD7224s. Both registers may be made transparent under control of three external lines, CS, WR and LDAC. With both registers transparent, the RESET line functions like a zero override; a useful function for syste calibration cycles. All logic inputs are TTL and CMOS (5V) level compatible and the control logic is speed compatible with most 8-bit microprocessors. Specified performance is guaranteed for input reference voltages from +2V to +12.5V when using dual supplies. The part is also specified for single supply operation using a reference of +10V. The output amplifier is capable of developing +10V across a 2k? load. The AD7224 is fabricated in an all ion-implanted high speed Linear Compatible CMOS (LC?MOS) process which has been specifically developed to allow high speed digital logic circuits and precision analog circuits to be integrated on the same chip. This is an abridged data sheet. To obtain the most recent version or complete data sheet, call our fax retrieval system at 1-800-446-6212. REV. B FUNCTIONAL BLOCK DIAGRAM Veer Voo mes LN oent menu bac oac + Lea Vour . a wr CONTROL iBxE toake AD7224 wenET Vas AGND DGND PRODUCT HIGHLIGHTS 1, DAC and Amplifier on CMOS Chip The single-chip design of the 8-bit DAC and output amplifier is inherently more reliable than multi-chip designs. CMOS fabrication means low power consumption (35mW typical with single supply). 2. Low Total Unadjusted Error The fabrication of the AD7224 on Analog Devices Linear Compatible CMOS (LC?MOS) process, coupled with a novel DAC switch-pair arrangement, enables an excellent total unadjusted error of less than 1LSB over the full operating temperature range. 3. Single or Dual Supply Operation The voltage-mode configuration of the AD7224 allows operation from a single power supply rail. The part can also be operated with dual supplies giving enhanced performance for some parameters. 4. Versatile Interface Logic The high speed logic allows direct interfacing to most micro- processors. Additionally, the double buffered interface enables simultaneous update of the AD7224 in multiple DAC systems. The part also features a zero override function. DIGITAL-TO-ANALOG CONVERTERS 3-107AD7224 SPECIFICATIONS (Vop = 11.4 to 16.5V, Veg = SV + 10%; AGND = DEND = OV; Veer +2V to (Vop 4y)' unless otherwise stated. DUAL SUPPLY. All specifications T,,,, tO Trax Unless otherwise noted.) K,B,T L,c,U Parameter . Versions? Versions Units Conditions/Comments STATIC PERFORMANCE ; Resolution 8 8 Bits Total Unadjusted Error +2 +1 LSB max Vpp = + 18V + 5%, Vrer = +10V Relative Accuracy +1 +12 LSB max Differential Nonlinearity +1 +1 LSS max Guaranteed Monotonic Full Scale Error +32 +1 LSB max Full Scale Temperature Coefficient +20 +20 ppm/C max Vpp = 14V to 16.5V, Vrer = +10V Zero Code Error +30 +20 mV max Zero Code Error Temperature Coefficient +50 +30 pVPC typ REFERENCE INPUT Voltage Range 2t0(Vpp - 4) 2t0(Vpp 4) Vinin tO Vinax Input Resistance 8 8 kQ min Input Capacitance* 100 100 pF max Occurs when DAC is loaded with all 1s. DIGITALINPUTS Input High Voltage, Vin 2.4 2.4 Vmin Input Low Voltage, Vint 0.8 0.8 V max Input Leakage Current +1 +1 pA max Vin = 0Vor Vpp Input Capacitance 8 8 pF max Input Coding Binary Binary DYNAMIC PERFORMANCE Voltage Output Slew Rate? 2.5 2.5 Vi/ps min Voltage Output Settling Time? Positive Full Scale Change 5 5 ps max Veer = + 10V; Settling Time to + 1/2LSB Negative Full Scale Change 7 7 ps max Vrer = + 10V; Settling Time to + 1/2LSB Digital Feedthrough 50 50 nV secs typ Vrer = 0V Minimum Load Resistance 2 2 k0 min Vour = + 10V POWER SUPPLIES Vpp Range 11.4/16.5 11.4/16.5 VininV max For Specified Performance Vss Range 4.5/5.5 4.5/5.5 Vinin V max For Specified Performance Ipp @25C 4 4 mA max Outputs Unloaded; Ving = Vint or Vinns Trin tO T max 6 6 mA max Outputs Unloaded; Vin = Vint or Vin: Iss @25C 3 3 mA max Outputs Unloaded; Vay = Vin or Ving Trin tO Tmax 5 5 mA max Outputs Unloaded; Ving = Vinz or Vin SWITCHING CHARACTERISTICS? G @25C 90 90 ns min Chip Select/Load DAC Pulse Width Tin tO T max 90 90 ns min a @25C 90 90 ns min Write/Reset Pulse Width Trin tO Trax 0 90 ns min & @25C 0 0 nsmin Chip Select/Load DAC to Write Setup Time Trnin tO T prax 0 0 ns min t @28C 0 0 ns min Chip Select/Load DAC to Write Hold Time Trin tO Tinax 0 0 ns min t @25C 90 90 ns min Data Valid to Write Setup Time Tin tO Tmax 90 90 ns min te @25C 10 10 ns min Data Valid to Write Hold Time T min tO T max 10 10 ns min NOTES Maximum possible reference voltage. ?Temperature ranges are as follows: K, L Versions: - 40C to + 85C B, C Versions: 40C to + 85C T, U Versions: 55C to + 125C Sample Tested at 25C by Product Assurance to ensure compliance. Switching characteristics apply for single and dual supply operation. Specifications subject to change without notice. 3-108 DIGITAL-TO-ANALOG CONVERTERS REV. BAD7224 (Yop = +15V + 5%; Veg = AGND = DGND = OV; Vic, = +10V' unless otherwise stated. All specifications SINGLE SUPPLY Tum tO Tax Unless otherwise noted.) K,B, T L,c,U Parameter Versions Versions Units Conditions/Comments STATIC PERFORMANCE Resolution 8 8 Bits Total Unadjusted Error +2 +2 LSB max Differential Nonlinearity +1 +1 LSB max Guaranteed Monotonic REFERENCE INPUT ; Input Resistance 8 8 kO min Input Capacitance? 100 100 pF max Occurs when DAC is loaded with all 1s. DIGITAL INPUTS Input High Voltage, Vinny 2.4 2.4 Vmin Input Low Voltage, Vin. 0.8 0.8 Vmax Input Leakage Current +1 +1 pA max Vin = 0Vor Vpp Input Capacitance* 8 8 pF max Input Coding Binary Binary DYNAMIC PERFORMANCE Voltage Output Slew Rate* 2 2 Vins min Voltage Output Settling Time* Positive Full Scale Change 5 5 jus max Settling Time to + 1/2LSB Negative Full Scale Change 20 20 ps max Settling Time to + 1/2LSB Digital Feedthrough? 50 50 nV secs typ Vrer = 0V Minimum Load Resistance 2 2 kQ min Vour = +10V POWER SUPPLIES Vop Range 14.25/15.75 14.25/15.75 VininV max For Specified Performance Ipp @25C 4 4 mA max Outputs Unloaded; Vin = Vint or Vint Train tO T mex 6 6 mA max Outputs Unloaded; Voy = Vow. or Vin SWITCHING CHARACTERISTICS? * q @25C 90 90 ns min Chip Select/Load DAC Pulse Width Tmin to Tmax 90 90 ns min ta @25C 90 90 ns min Write/Reset Pulse Width Trmin tO Tmax 90 90 ns min G& @25C 0 0 ns min Chip Select/Load DAC to Write Setup Time Tin to Trax 0 0 ns min & @25C 0 0 ns min Chip Select/Load DAC to Write Hold Time Tin tO Tox 0 0 ns min ts @25C 90 90 ns min Data Valid to Write Setup Time Tin tO Tinax 90 90 ns min b& @28C 10 10 ns min Data Valid to Write Hold Time Train tO Tinax 10 10 ns min NOTES "Maximum possible reference voltage. ?Temperature ranges are as follows: K, L Versions: 40C to +85C B, C Versions: 40C to +85C T, U Versions: 55C to + 125C Sample Tested at 25C by Product Assurance to ensure compliance. Switching characteristics apply for single and dual supply operation. Specifications subject to change without notice. REV. B DIGITAL-TO-ANALOG CONVERTERS 3-109AD7224 ABSOLUTE MAXIMUM RATINGS* VpptoAGND .............---5 -0.3V, +17V VpptoDGND ...........0 00008 ~0.3V, +17V VoptoVsgs 2... ee -0.3V, +24V AGNDtoDGND.........-..-....-. ~0.3V, Vop Digital Input Voltage to DGND -0.3V, Vpp +0.3V Vrer toAGND ............5 -0.3V, Vpp +0.3V Vout to AGND! ... 0.0.00 00 00 eee Vss. Vop Power Dissipation (Any Package) to +75C ..... 450mW Derates above 75C by ... ......0...020- 6mW/C Operating Temperature Commercial (K, L Versions) ....... -~ 40C to + 85C Industrial (B, C Versions) ........ -40C to + 85C Extended (T, U Versions) ........ - 55C to + 125C Storage Temperature ............ 65C to + 150C Lead Temperature (Soldering, lOsecs) ........ + 300C NOTES The outputs may be shorted to AGND provided that the power dissipation of the package is not exceeded. Typically short circuit current to AGND is60mA. *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION ORDERING GUIDE Total Temperature Unadjusted Package Model" Range Error (LSB) Option AD7224KN | -40Cto + 85C +2max N-18 AD7224LN =| - 40C to + 85C + 1 max N-18 AD7224KP_ =| - 40C to + 85C +2max P-20A AD7224LP =| 40C to + 85C + 1 max P-20A AD7224KR-1 | 40C to + 85C +2max R-20 AD7224LR-1 | -40C to + 85C + 1 max R-20 AD7224KR- 18] 40C to + 85C +2max R-18 AD7224LR-18] 40C to + 85C +1 max R-18 AD7224BQ_ | 40C to +. 85C +2max - Q-18 AD7224CQ: | - 40C to + 85C + 1 max Q-18 AD7224TQ) |-55SC to +:125C | +2max Q-18 AD7224UQ:) | -55Cto +125C | +1 max Q-18 AD7224TE |-55Cto +125C | +2max E-20A AD7224UE |-55Cto +125C | +1 max E-20A NOTES 'To order MIL-STD-883 processed parts, add /883B to part number. Contact your local sales office for military data sheet. 7E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded; Q = Cerdip; R = SOIC. For outline information see Package Information section. ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protect- ed; however, permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective foam should be discharged to the destination socket before devices are removed. Tee i | SOR NSITIY EL YiCr PIN CONFIGURATIONS DIP/SOIC-18 SOIC-1 SOIC vss [1] 20] Yoo Vss [1] @ 18] Yoo Your [2] [1a] RESET Your [2 p7] RESET rer [3 #3] toac Veer [2] apzooq [is] tac acno [4| AD7224 [17] Wa acno [4] R18 [15] WA RA penp [5 | sop VIEW l16] cS penn [5| Top view [ta] cs (MSB) 0B7 [6 | (ot to Scale) [13] DBO (LSB) (mse) DB7 [6 | "Notte Scale) 175) pao ise) ops [7| [14] Det pee [7 | [12] DB1 oes [8 | [13] DB2 pes (6 | [11] DB2 pee [5 | [12] DB3 pea [a | [10] DB3 ne [19] [ty] Nc PLCC Ver 4 ii 18 LDAC AGND 5 AD7224 17 WR OGNO 6 TOP VIEW 16 CS (MSB) DB7 7 (Not to Scale) 15 DBO (LSB) DBE 8 14 DBI 9 228 8 oa a0 NC = NO CONNECT 3-110 DIGITAL-TO-ANALOG CONVERTERS NC = NO CONNECT Veer [4] ano [5] AD7224 penn [6] TOP VIEW {Not to Scale} NC = NO CONNECT REV. B