■1100MHz toggle frequency
■Extended 100E VEE range of –4.2V to –5.46V
■Differential outputs
■Asynchronous Master Reset
■Dual clocks
■Fully compatible with industry standard 10KH,
100K ECL levels
■Internal 75KΩ input pulldown resistors
■Fully compatible with Motorola MC10E/100E151
■Available in 28-pin PLCC package
FEATURES
6-BIT D
REGISTER
The SY10/100E151 offer 6 edge-triggered, high-speed,
master-slave D-type flip-flops with differential outputs,
designed for use in new, high-performance ECL systems.
The two external clock signals (CLK1, CLK2) are gated
through a logical OR operation before use as clocking
control for the flip-flops. Data is clocked into the flip-flops
on the rising edge of either CLK1 or CLK2 (or both). When
both CLK1 and CLK2 are at a logic LOW, data enters the
master and is transferred to the slave when either CLK1 or
CLK2 (or both) go HIGH.
The MR (Master Reset) signal operates asynchronously
to make all Q outputs go to a logic LOW.
DESCRIPTION
SY10E151
SY100E151
FINAL
BLOCK DIAGRAM
Pin Function
D0–D5Data Inputs
CLK1, CLK2Clock Inputs
MR Master Reset
Q0–Q5True Outputs
Q0–Q5Inverting Outputs
VCCO VCC to Output
PIN NAMES
PIN CONFIGURATION
D
R
D
R
D
R
D
R
D
R
D
R
M
R
D
0
CLK
1
CLK
2
D
1
D
2
D
3
D
4
D
5
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
VEE
D5
D4
D1
D2
Q
5
26
27
28
1
2
3
4
18
17
16
15
14
13
12
25 24 23 22 21 20 19
567891011
D0
D3
V
CCO
Q
1
Q4
V
CCO
PLCC
TOP VIEW
J28-1
MR
NC
CLK
1
Q4
VCC
Q3
Q3
Q2
Q2
Q
1
Q
0
Q
0
V
CCO
NC CLK
2
Q
5
1Rev.: E Amendment: /0
Issue Date:
November 2002
2
SY10E151
SY100E151
Micrel
Asynchronous Operation
Inputs Output
DnCLK1CLK2MR Qn(t + 1)
XXXH L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
t = Time before positive CLK transition
t+1 = Time after positive CLK transition
u = LOW-to-HIGH transition
TRUTH TABLES(1)
Synchronous Operation
Inputs Output
DnCLK1CLK2MR Qn(t + 1)
LuLL L
HuLL H
LLuL L
HLuL H
XHuL Qn(t)
XuHL Qn(t)
XLLL Q
n(t)
DC ELECTRICAL CHARACTERISTICS(1)
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
IIH Input HIGH Current ——150 ——150 ——150 µA—
IEE Power Supply Current mA —
10E —65 78 —65 78 —65 78
100E —65 78 —65 78 —75 90
NOTE:
1. Specification for packaged product only.
3
SY10E151
SY100E151
Micrel
AC ELECTRICAL CHARACTERISTICS(2)
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
fMAX Max. Toggle Frequency 1100 1400 —1100 1400 —1100 1400 —MHz —
tPLH Propagation Delay to Output ps —
tPHL CLK 475 650 800 475 650 800 475 650 800
MR 475 650 850 475 650 850 475 650 850
tSSet-up Time, D 0 –175 —0–175 —0–175 —ps —
tHHold Time, D 350 175 —350 175 —350 175 —ps —
tRR Reset Recovery Time 750 550 —750 550 —750 550 —ps —
tPW Minimum Pulse Width 400 ——400 ——400 ——ps —
CLK, MR
tskew Within-Device Skew —65 ——65 ——65 —ps 1
trRise/Fall Time 300 450 700 300 450 700 300 450 700 ps —
tf20% to 80%
NOTE:
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Specification for packaged product only.
PRODUCT ORDERING CODE
Ordering Package Operating
Code Type Range
SY10E151JI J28-1 Industrial
SY10E151JITR* J28-1 Industrial
SY100E151JI J28-1 Industrial
SY100E151JITR* J28-1 Industrial
*Tape and Reel
4
SY10E151
SY100E151
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel, Inc.
© 2002 Micrel, Incorporated.
