S-8254A Series www.ablic.com www.ablicinc.com BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK (c) ABLIC Inc., 2002-2016 Rev.5.2_01 The S-8254A Series is a protection IC for 3-serial- or 4-serial-cell lithium-ion / lithium polymer rechargeable batteries and includes a high-accuracy voltage detector and delay circuit. The S-8254A Series protects both 3-serial or 4-serial cells using the SEL pin for switching. Features (1) High-accuracy voltage detection for each cell Overcharge detection voltage n (n 1 to 4) 3.9 V to 4.4 V (50 mV step) Accuracy 25 mV Accuracy 50 mV Overcharge release voltage n (n 1 to 4) 3.8 V to 4.4 V*1 Overdischarge detection voltage n (n 1 to 4) 2.0 V to 3.0 V (100 mV step) Accuracy 80 mV Accuracy 100 mV Overdischarge release voltage n (n 1 to 4) 2.0 V to 3.4 V*2 (2) Three-level overcurrent protection Overcurrent detection voltage 1 0.05 V to 0.30 V (50 mV step) Accuracy 25 mV Overcurrent detection voltage 2 0.5 V Accuracy 100 mV Accuracy 300 mV Overcurrent detection voltage 3 VVC1 1.2 V (3) Delay times for overcharge detection, overdischarge detection and overcurrent detection 1 can be set by external capacitors (delay times for overcurrent detection 2 and 3 are fixed internally). (4) Switchable between a 3-serial cell and 4-serial cell using the SEL pin (5) Charge/discharge operation can be controlled via the control pins. (6) High-withstand voltage Absolute maximum rating : 26 V (7) Wide operating voltage range 2 V to 24 V (8) Wide operating temperature range 40C to 85C (9) Low current consumption During operation 30 A max. (25C) During power-down 0.1 A max. (25C) *3 (10) Lead-free, Sn100%, halogen-free *1. Overcharge hysteresis voltage n (n 1 to 4) can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV steps. (Overcharge hysteresis voltage Overcharge detection voltage Overcharge release voltage) *2. Overdischarge hysteresis voltage n (n 1 to 4) can be selected as 0 V or from a range of 0.2 V to 0.7 V in 100 mV steps. (Overdischarge hysteresis voltage Overdischarge release voltage Overdischarge detection voltage) *3. Refer to " Product Name Structure" for details. Applications Lithium-ion rechargeable battery packs Lithium polymer rechargeable battery packs Package 16-Pin TSSOP 1 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Block Diagram COP DOP, COP, RVMD, RVMS Control Circuit VDD Delay Circuit VC1 Delay Circuit Delay Circuit 1 M VMP Delay Circuit 900 k VC2 VC3 DOP VINI VC4 CDT 200 nA CCT CTL VSS Remark SEL 1. Diodes in the figure are parasitic diodes. 2. Numerical values are typical values. Figure 1 2 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Product Name Structure 1. Product Name S-8254A xx FT - TB - x Environmental code U: Lead-free (Sn 100%), halogen-free S: Lead-free, halogen-free G: Lead-free (for details, please contact our sales office) IC direction in tape specifications *1 Package code FT: 16-Pin TSSOP Serial code *2 Sequentially set from AA to ZZ *1. Refer to the tape drawing. *2. Refer to "3. Product Name List". 2. Package Package name 16-Pin TSSOP Environmental code = G, S Environmental code = U Package Tape Reel FT016-A-P-SD FT016-A-P-SD FT016-A-C-SD FT016-A-C-SD FT016-A-R-SD FT016-A-R-S1 3 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 3. Product Name List Table 1 Overcharge Overcharge Overdischarge Overdischarge Overcurrent 0 V battery detection voltage release voltage detection voltage release voltage detection voltage 1 charge function [VCU] [VCL] [VDL] [VDU] [VIOV1] Available S-8254AAAFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.00 0.080 V 2.70 0.100 V 0.30 0.025 V Available S-8254AABFT-TB-x 4.250 0.025 V 4.250 0.025 V 2.00 0.080 V 2.70 0.100 V 0.30 0.025 V Available S-8254AAEFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.00 0.080 V 2.70 0.100 V 0.20 0.025 V Available S-8254AAFFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.40 0.080 V 3.00 0.100 V 0.20 0.025 V Available S-8254AAGFT-TB-x 4.275 0.025 V 4.075 0.050 V 2.30 0.080 V 2.70 0.100 V 0.13 0.025 V Available S-8254AAHFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.40 0.080 V 2.70 0.100 V 0.10 0.025 V Available S-8254AAIFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.40 0.080 V 3.00 0.100 V 0.30 0.025 V Available S-8254AAJFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.40 0.080 V 3.00 0.100 V 0.15 0.025 V Available S-8254AAKFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.70 0.080 V 3.00 0.100 V 0.20 0.025 V Available S-8254AALFT-TB-x 4.300 0.025 V 4.150 0.050 V 2.40 0.080 V 3.00 0.100 V 0.20 0.025 V Available S-8254AAMFT-TB-x 4.200 0.025 V 4.100 0.050 V 2.50 0.080 V 2.70 0.100 V 0.30 0.025 V Available S-8254AANFT-TB-x 4.250 0.025 V 4.150 0.050 V 2.50 0.080 V 3.00 0.100 V 0.10 0.025 V Available S-8254AAOFT-TB-x 4.300 0.025 V 4.080 0.050 V 2.50 0.080 V 3.00 0.100 V 0.10 0.025 V Available S-8254AAPFT-TB-x 4.280 0.025 V 4.130 0.050 V 3.00 0.080 V 3.00 0.080 V 0.15 0.025 V Available S-8254AAQFT-TB-x 3.900 0.025 V 3.800 0.050 V 2.30 0.080 V 2.70 0.100 V 0.30 0.025 V Available S-8254AARFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.80 0.080 V 3.00 0.100 V 0.20 0.025 V Available S-8254AASFT-TB-x 4.290 0.025 V 4.090 0.050 V 2.30 0.080 V 3.00 0.100 V 0.075 0.025 V Available S-8254AATFT-TB-x 4.200 0.025 V 4.200 0.025 V 2.00 0.080 V 2.70 0.100 V 0.30 0.025 V Unavailable S-8254AAUFT-TB-x 4.350 0.025 V 4.150 0.050 V 2.40 0.080 V 3.00 0.100 V 0.20 0.025 V Available S-8254AAVFT-TB-x 4.250 0.025 V 4.150 0.050 V 2.70 0.080 V 3.00 0.100 V 0.20 0.025 V Unavailable S-8254AAWFT-TB-x 4.250 0.025 V 4.100 0.050 V 3.00 0.080 V 3.20 0.100 V 0.10 0.025 V Available S-8254AAXFT-TB-x 4.250 0.025 V 4.100 0.050 V 2.00 0.080 V 2.70 0.100 V 0.15 0.025 V Available S-8254AAYFT-TB-x 4.275 0.025 V 4.125 0.050 V 2.40 0.080 V 2.70 0.100 V 0.10 0.025 V Available S-8254AAZFT-TB-x 4.250 0.025 V 4.150 0.050 V 2.00 0.080 V 2.70 0.100 V 0.13 0.025 V Available S-8254ABAFT-TB-x 3.900 0.025 V 3.800 0.050 V 2.00 0.080 V 2.50 0.100 V 0.15 0.025 V Available S-8254ABBFT-TB-x 4.200 0.025 V 4.200 0.025 V 2.50 0.080 V 3.20 0.100 V 0.30 0.025 V Available S-8254ABCFT-TB-x 4.175 0.025 V 3.975 0.050 V 2.75 0.080 V 3.05 0.100 V 0.10 0.025 V Available S-8254ABDFT-TB-y 4.300 0.025 V 4.100 0.050 V 2.00 0.080 V 2.00 0.080 V 0.13 0.025 V Available S-8254ABEFT-TB-y 4.200 0.025 V 4.150 0.050 V 2.50 0.080 V 3.00 0.100 V 0.15 0.025 V Available S-8254ABFFT-TB-x 4.150 0.025 V 4.050 0.050 V 2.00 0.080 V 2.70 0.100 V 0.13 0.025 V Available S-8254ABGFT-TB-x 4.180 0.025 V 4.080 0.050 V 2.00 0.080 V 2.70 0.100 V 0.13 0.025 V Available S-8254ABHFT-TB-y 4.150 0.025 V 4.050 0.050 V 2.50 0.080 V 2.80 0.100 V 0.10 0.025 V Unavailable S-8254ABIFT-TB-x 4.215 0.025 V 4.115 0.050 V 2.40 0.080 V 3.00 0.100 V 0.20 0.025 V Remark 1. Please contact our sales office for the products with the detection voltage value other than those specified above. 2. x: G or U y: S or U 3. Please select products of environmental code = U for Sn 100%, halogen-free products. Product name / Item 4 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Pin Configuration 16-Pin TSSOP Top view COP 1 16 VDD VMP 2 15 VC1 DOP 3 14 VC2 VINI 4 13 VC3 CDT 5 12 VC4 CCT 6 11 CTL VSS 7 10 SEL NC 8 9 NC Figure 2 Table 2 Pin No. 1 Symbol COP Description FET gate connection pin for charge control (Nch open drain output) Pin for voltage detection between VC1 and VMP (Pin for overcurrent 3 2 VMP detection) 3 DOP FET gate connection pin for discharge control FET (CMOS output) Pin for voltage detection between VSS and VINI (Pin for overcurrent detection 4 VINI 1,2) Capacitor connection pin for delay for overdischarge detection, delay for 5 CDT overcurrent detection 1 6 CCT Capacitor connection pin for delay for overcharge current Input pin for negative power supply, 7 VSS Connection pin for battery 4's negative voltage 8 NC *1 No connection 9 NC *1 No connection Pin for switching 3-series or 4-series cell 10 SEL VSS level: 3-series cell, VDD level : 4-series cell 11 CTL Control of charge FET and discharge FET Connection pin for battery 3's negative voltage, 12 VC4 Connection pin for battery 4's positive voltage Connection pin for battery 2's negative voltage, 13 VC3 Connection pin for battery 3's positive voltage Connection pin for battery 1's negative voltage, 14 VC2 Connection pin for battery 2's positive voltage 15 VC1 Connection pin for battery 1's positive voltage Input pin for positive power supply, 16 VDD Connection pin for battery 1's positive voltage *1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. 5 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Absolute Maximum Ratings Table 3 Item Symbol Input voltage between VDD and VSS VDS Input pin voltage VIN VMP pin input voltage DOP pin output voltage COP pin output voltage VVMP VDOP VCOP Power dissipation PD Applied pin VC1, VC2, VC3, VC4, CTL, SEL, CCT, CDT, VINI VMP DOP COP Operating ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size : 114.3 mm 76.2 mm t1.6 mm (2) Board name : JEDEC STANDARD51-7 (Ta 25C unless otherwise specified) Absolute Maximum Ratings Unit V VSS 0.3 to VSS 26 VSS 0.3 to VDD 0.3 V VSS 0.3 to VSS 26 VSS 0.3 to VDD 0.3 VSS 0.3 to VSS 26 400 (When not mounted on board) 1100*1 40 to 85 40 to 125 V V V mW mW C C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation (PD) [mW] 1200 1000 800 600 400 200 0 0 50 100 150 Ambient Temperature (Ta) [C] Figure 3 Power Dissipation of Package (When Mounted on Board) 6 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Electrical Characteristics Table 4 (1 / 2) Item Symbol [ DETECTION VOLTAGE ] Overcharge detection voltage n (n 1, 2, 3, 4) Overcharge release voltage n (n 1, 2, 3, 4) Overdischarge detection voltage n (n 1, 2, 3, 4) Overdischarge release voltage n (n 1, 2, 3, 4) VCUn VCLn VDLn VDUn Conditions VCUn 0.025 VCLn 0.05 VCLn 0.025 VDLn 0.08 VDUn 0.10 VDUn 0.08 VIOV1 0.025 0.4 VVC1 1.5 1.0 0.5 CCT pin capacitance 0.1 F 0.5 VVC1 1.2 0 0 VCUn 0.025 VCLn 0.05 VCLn 0.025 VDLn 0.08 VDUn 0.10 VDUn 0.08 VIOV1 0.025 0.6 VVC1 0.9 1.0 0.5 0.5 1.0 CDT pin capacitance 0.1 F 50 CDT pin capacitance 0.1 F V 2 V 2 V 2 V 2 V 2 V 2 V 2 V 2 V 2 mV / C mV / C 2 2 1.5 s 3 100 150 ms 3 5 10 15 ms 3 0.4 1 1.6 ms 3 FET gate capacitance 2000 pF 100 300 600 s 3 0 V battery charging available 0.8 1.5 V 4 0 V battery charging unavailable 0.4 0.7 1.1 V 4 0.5 1 1.5 M 5 450 900 1800 k 5 3.9 V to 4.4 V, Adjustable VCL VCU 3.8 V to 4.4 V, Adjustable VCL VCU 2.0 V to 3.0 V, Adjustable VDL VDU 2.0 V to 3.4 V, Adjustable VDL VDU Overcurrent detection voltage 1 VIOV1 Overcurrent detection voltage 2 VIOV2 Overcurrent detection voltage 3 VIOV3 *1 Temperature coefficient 1 TCOE1 *2 Temperature coefficient 2 TCOE2 [ DELAY TIME ] Overcharge detection delay time tCU Overdischarge detection tDL delay time Overcurrent detection tIOV1 delay time 1 Overcurrent detection tIOV2 delay time 2 Overcurrent detection tIOV3 delay time 3 [ 0 V BATTERY CHARGE FUNCTION ] 0 V battery charge V0CHA starting charger voltage 0 V battery charge V0INH inhibition battery voltage [ INTERNAL RESISTANCE ] Resistance between RVMD VMP and VDD Resistance between RVMS VMP and VSS (Ta 25C unless otherwise specified) Test Min. Typ. Max. Unit circuit 0.05 V to 0.3 V, Adjustable *3 Ta 0C to 50C *3 Ta 0C to 50C VCUn VCLn VCLn VDLn VDUn VDUn VIOV1 7 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Table 4 (2 / 2) Item [ INPUT VOLTAGE ] Operating voltage between VDD and VSS Symbol VDSOP Conditions Output voltage of DOP and COP fixed Rev.5.2_01 (Ta 25C unless otherwise specified) Test Min. Typ. Max. Unit circuit 2 24 V 2 CTL input voltage "H" VCTLH VDD 0.8 V 2 CTL input voltage "L" VCTLL VDD 0.2 V 2 SEL input voltage "H" VSELH VDD 0.8 V 2 SEL input voltage "L" VSELL VDD 0.2 V 2 [ INPUT CURRENT ] Current consumption during operation Current consumption during power-down VC1 pin current VC2 pin current VC3 pin current VC4 pin current IOPE V1 V2 V3 V4 3.5 V 12 30 A 1 IPDN V1 V2 V3 V4 1.5 V 0.1 A 1 IVC1 IVC2 IVC3 IVC4 V1 V2 V3 V4 3.5 V V1 V2 V3 V4 3.5 V V1 V2 V3 V4 3.5 V V1 V2 V3 V4 3.5 V V1 V2 V3 V4 3.5 V, VCTL VDD V1 V2 V3 V4 3.5 V, VCTL VSS V1 V2 V3 V4 3.5 V, VSEL VDD V1 V2 V3 V4 3.5 V, VSEL VSS 0.3 0.3 0.3 1.5 0 0 0 3 0.3 0.3 0.3 A A A A 5 5 5 5 0.1 A 5 0.4 0.2 A 5 0.1 A 5 0.1 A 5 CTL pin current "H" ICTLH CTL pin current "L" ICTLL SEL pin current "H" ISELH SEL pin current "L" ISELL [ OUTPUT CURRENT ] COP pin leakage current ICOH VCOP 24 V 0.1 5 A 10 COP pin sink current ICOL 5 A VCOP VSS 0.5 V 10 DOP pin source current IDOH VDOP VDD 0.5 V 5 A 10 DOP pin sink current IDOL 5 A VDOP VSS 0.5 V *1. Voltage temperature coefficient 1 : Overcharge detection voltage *2. Voltage temperature coefficient 2 : Overcurrent detection voltage 1 *3. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. 8 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Test Circuits This chapter describes how to test the S-8254A Series when a 4-serial cell is selected by setting the SEL pin to the VDD level. When a 3-serial cell is selected by setting the SEL pin to the VSS level, short the power supply V4. 1. Current Consumption during Operation, Current Consumption during Power-down (Test circuit 1) 1. 1 Current Consumption during operation (IOPE) The current at the VSS pin when V1 V2 V3 V4 3.5 V and VVMP VDD is the current consumption during operation (IOPE). 1. 2 Current Consumption during power-down (IPDN) The current at the VSS pin when V1 V2 V3 V4 1.5 V and VVMP VSS is the current consumption during power-down (IPDN). 2. Overcharge Detection Voltage, Overcharge Release Voltage, Overdischarge Detection Voltage, Overdischarge Release Voltage, Overcurrent Detection Voltage 1, Overcurrent Detection Voltage 2, Overcurrent Detection Voltage 3, CTL Input Voltage "H", CTL Input Voltage "L", SEL Input Voltage "H", SEL Input Voltage "L" (Test circuit 2) Confirm that the COP pin and DOP pin are low (VDD 0.1 V or lower) when VVMP VSEL VDD, VINI VCTL VSS, the CCT pin is open, the CDT pin is open, and V1 V2 V3 V4 3.5 V (this status is referred to as the initial status). 2. 1 Overcharge Detection Voltage (VCU1), Overcharge Release Voltage (VCL1) The overcharge detection voltage (VCU1) is the voltage of V1 when the voltage of the COP pin is "H" (VDD 0.9 V or more) after the V1 voltage has been gradually increased starting at the initial status. The overcharge release voltage (VCL1) is the voltage of V1 when the voltage at the COP pin is "L" after the V1 voltage has been gradually decreased. 2. 2 Overdischarge Detection Voltage (VDL1), Overdischarge Release Voltage (VDU1) The overdischarge detection voltage (VDL1) is the voltage of V1 when the voltage of the DOP pin is "H" after the V1 voltage has been gradually decreased starting at the initial status. The overdischarge release voltage (VDU1) is the voltage of V1 when the voltage at the DOP pin is "L" after the V1 voltage has been gradually increased. When the voltage of Vn (n 2 to 4) is changed, the overcharge detection voltage (VCUn), overcharge release voltage (VCLn), overdischarge detection voltage (VDLn), and overdischarge release voltage (VDUn) can be determined in the same way as when n 1. 2. 3 Overcurrent Detection Voltage 1 (VIOV1) Overcurrent detection voltage 1 (VIOV1) is the voltage of the VINI pin when the voltage of the DOP pin is "H" after the VINI pin voltage has been gradually increased starting at the initial status. 2. 4 Overcurrent Detection Voltage 2 (VIOV2) Overcurrent detection voltage 2 (VIOV2) is the voltage of the VINI pin when the voltage of the DOP pin is "H" after the voltage of the CDT pin was set to VSS following the initial status and the voltage of the VINI pin has been gradually decreased. 2. 5 Overcurrent Detection Voltage 3 (VIOV3) Overcurrent detection voltage 3 (VIOV3) is the voltage difference between VVC1 and VVMP (VVC1 VVMP) when the voltage of the DOP pin is "H" after the VMP voltage has been gradually decreased starting at the initial status. 9 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 2. 6 CTL Input Voltage "H" (VCTLH), CTL Input Voltage "L" (VCTLL) The CTL input voltage "H" (VCTLH) is the voltage of CTL when the voltages at the COP and DOP pins are "H" after the CTL voltage has been gradually increased starting at the initial status. The CTL input voltage "L" (VCTLL) is the voltage of CTL when the voltages at the COP and DOP pins are "L" after the CTL voltage has been gradually decreased. 2. 7 SEL Input Voltage "H" (VSELH), SEL Input Voltage "L" (VSELL) Apply 0 V to V4 in the initial status and confirm that the DOP pin is "H". The SEL input voltage "L" (VSELL) is the voltage of the SEL pin when the voltage at the DOP pin is "L" after the SEL voltage has been gradually decreased. The SEL input voltage "H" (VSELH) is the voltage of the SEL pin when the voltage of the DOP pin is "H" after the SEL voltage has been gradually increased. 3. Overcharge Detection Delay Time, Overdischarge Detection Delay Time, Overcurrent Detection Delay Time 1, Overcurrent Detection Delay Time 2, Overcurrent Detection Delay Time 3 (Test circuit 3) Confirm that the COP pin and DOP pin are "L" when VVMP VDD, VINI VSS, and V1 V2 V3 V4 3.5 V (this status is referred to as the initial status). 3. 1 Overcharge Detection Delay Time (tCU) The overcharge detection delay time (tCU) is the time it takes for the voltage of the COP pin to change from "L" to "H" after the voltage of V1 is instantaneously changed to 4.5 V from the initial status. 3. 2 Overdischarge Detection Delay Time (tDL) The overdischarge detection delay time (tDL) is the time it takes for the voltage of the DOP pin to change from "L" to "H" after the voltage of V1 is instantaneously changed to 1.5 V from the initial status 3. 3 Overcurrent Detection Delay Time 1 (tIOV1) Overcurrent detection delay time 1 (tIOV1) is the time it takes for the voltage of the DOP pin to change from "L" to "H" after the voltage of the VINI pin is instantaneously changed to 0.4 V from the initial status. 3. 4 Overcurrent Detection Delay Time 2 (tIOV2) Overcurrent detection delay time 2 (tIOV2) is the time it takes for the voltage of the DOP pin to change from "L" to "H" after the voltage of the VINI pin is instantaneously changed to VIOV2 max. 0.2 V from the initial status. 3. 5 Overcurrent Detection Delay Time 3 (tIOV3) Overcurrent detection delay time 3 (tIOV3) is the time it takes for the voltage of the DOP pin to change from "L" to "H" after the voltage of the VMP pin is instantaneously changed to VIOV3 min. 0.2 V from the initial status. 10 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series 4. 0 V Battery Charge Starting Charger Voltage (Product with 0 V Battery Charge Function), 0 V Battery Charge Inhibition Battery Voltage (Product with 0 V Battery Charge Inhibition Function) (Test circuit 4) Either the 0 V battery charge starting charger voltage or the 0 V battery charge inhibition battery voltage is applied to each product according to the 0 V battery charge function. 4. 1 0 V Battery Charge Starting Charger Voltage (V0CHA) (Product with 0 V Battery Charge Function) The starting condition is V1 V2 V3 V4 0 V for a product in which 0 V battery charging is available. The COP pin voltage should be lower than V0CHA max. 1 V when the VMP pin voltage VVMP V0CHA max. 4. 2 0 V Battery Charge Inhibition Battery Voltage (V0INH) (Product with 0 V Battery Charge Inhibition Function) The starting condition is V1 V2 V3 V4 V0INH for a product in which 0 V battery charging is inhibited. The COP pin voltage should be higher than VVMP 1 V when the VMP pin voltage VVMP 24 V. 5. Resistance between VMP and VDD, Resistance between VMP and VSS, VC1 Pin Current, VC2 Pin Current, VC3 Pin Current, VC4 Pin Current, CTL pin Current "H", CTL Pin Current "L", SEL Pin Current "H", SEL Pin Current "L", COP Pin Leakage Current, COP Pin Sink Current, DOP Pin Source Current, DOP Pin Sink Current (Test circuit 5) VVMP VSEL VDD, VINI VCTL VSS, V1 V2 V3 V4 3.5 V, and other pins left "open" (this status is referred to as the initial status). 5. 1 Resistance between VMP and VDD (RVMD) The resistance between VMP and VDD (RVMD) is obtained from RVMD VDD / IVMD using the current value of the VMP pin (IVMD) when VVMP is VSS after the initial status. 5. 2 Resistance between VMP and VSS (RVMS) The resistance between VMP and VSS (RVMS) is obtained from RVMS VDD / IVMS using the current value of the VMP pin (IVMS) when V1 V2 V3 V4 1.8 V after the initial status. 5. 3 VC1 Pin Current (IVC1), VC2 Pin Current (IVC2), VC3 Pin Current (IVC3), VC4 Pin Current (IVC4) At the initial status, the current that flows through the VC1 pin is the VC1 pin current (IVC1), the current that flows through the VC2 pin is the VC2 pin current (IVC2), the current that flows through the VC3 pin is the VC3 pin current (IVC3), and the current that flows through the VC4 pin is the VC4 pin current (IVC4). 5. 4 CTL pin Current "H" (ICTLH), CTL Pin Current "L" (ICTLL) In the initial status, the current that flows through the CTL pin is the CTL pin current "L" (ICTLL), after that, when VCTL VDD, the current that flows through the CTL pin is the CTL pin current "H" (ICTLH). 5. 5 SEL Pin Current "H" (ISELH), SEL Pin Current "L" (ISELL) In the initial status, the current that flows through the SEL pin is the SEL pin current "H" (ISELH), after that, when VSEL VSS, the current that flows through the SEL pin is the SEL pin current "L" (ISELL). 11 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 5. 6 COP Pin Leakage Current (ICOH), COP Pin Sink Current (ICOL) The COP pin sink current (ICOL) is the current that flows through the COP pin when VCOP VSS 0.5 V after the initial status. After that, the current that flows through the COP pin when V1 V2 V3 V4 6 V and VCOP VDD is the COP pin leakage current (ICOH). 5. 7 DOP Pin Source Current (IDOH), DOP Pin Sink Current (IDOL) The DOP pin sink current (IDOL) is the current that flows through the DOP pin when VDOP VSS 0.5 V after the initial status. After that, the current that flows through the DOP pin when VVMP VDD 2 V and VDOP VDD 0.5 V is the DOP pin source current (IDOH). S-8254A A 1 2 3 4 5 6 7 8 COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 V1 V2 V3 V4 C1 = 0.1 F Figure 4 Test Circuit 1 S-8254A V V 1 2 3 4 5 6 7 8 COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 Figure 5 Test Circuit 2 12 V1 V2 V3 V4 C1 = 0.1 F BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 S-8254A V C2 = 0.1 F V C3 = 0.1 F 1 2 3 4 5 6 7 8 COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 V1 V2 V3 V4 C1 = 0.1 F Figure 6 Test Circuit 3 S-8254A 1 2 3 4 5 6 7 8 V COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 V1 V2 V3 V4 C1 = 0.1 F Figure 7 Test Circuit 4 S-8254A A A A 1 2 3 4 5 6 7 8 COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 A A A A A A V1 V2 V3 V4 C1 = 0.1 F Figure 8 Test Circuit 5 13 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Operation Remark Refer to " Battery Protection IC Connection Example". 1. Normal Status When the voltage of each of the batteries is in the range from VDLn to VCUn and the discharge current is lower than the specified value (the VINI pin voltage is lower than VIOV1 and VIOV2, and the VMP pin voltage is higher than VIOV3), the charging and discharging FETs are turned on. 2. Overcharge Status When the voltage of one of the batteries becomes higher than VCUn and the state continues for tCU or longer, the COP pin becomes high impedance. The COP pin is pulled up to the EB pin voltage by an external resistor, and the charging FET is turned off to stop charging. This is called the overcharge status. The overcharge status is released when one of the following two conditions holds. (1) The voltage of each of the batteries becomes VCLn or lower. (2) The voltage of each of the batteries is VCUn or lower, and the VMP pin voltage is 39 / 40 VDD or lower (a load is connected and discharging is started via the body diode of the charging FET). 3. Overdischarge Status When the voltage of one of the batteries becomes lower than VDLn and the state continues for tDL or longer, the DOP pin voltage becomes VDD level, and the discharging FET is turned off to stop discharging. This is called the overdischarge status. 3. 1 Power-down Function When the overdischarge status is reached, the VMP pin is pulled down to the VSS level by the internal RVMS resistor of the IC. When the VMP pin voltage is VDD / 2 or lower, the power-down function starts to operate and almost every circuit in the S-8254A Series stops working. The conditions of each output pin are as follows. (1) COP pin : High-Z (2) DOP pin : VDD The power-down function is released when the following condition holds. (1) The VMP pin voltage is VDD / 2 or higher. The overdischarge status is released when the following two conditions hold. (1) In case the VMP pin voltage is VDD / 2 or higher and the VMP pin voltage is lower than VDD, the overdischarge status is released when the voltage of each of the batteries is VDUn or higher. (2) In case a charger is connected, the overdischarge hysteresis is released. And the overdischarge status is released when the voltage of each of the batteries is VDLn or higher. 14 Rev.5.2_01 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series 4. Overcurrent Status The S-8254A Series has three overcurrent detection levels (VIOV1, VIOV2, and VIOV3) and three overcurrent detection delay times (tIOV1, tIOV2, and tIOV3) corresponding to each overcurrent detection level. When the discharging current becomes higher than the specified value (the voltage between VSS and VINI is greater than VIOV1) and the state continues for tIOV1 or longer, the S-8254A Series enters the overcurrent status, in which the DOP pin voltage becomes VDD level to turn off the discharging FET to stop discharging, the COP pin becomes high impedance and is pulled up to the EB pin voltage to turn off the charging FET to stop charging, and the VMP pin is pulled up to the VDD voltage by the internal resistor (RVMD). Operation of overcurrent detection level 2 (VIOV2) and overcurrent detection delay time 2 (tIOV2) is the same as for VIOV1 and tIOV1. In the overcurrent status, the VMP pin is pulled up to the VDD level by the internal resistor in the IC (RVMD resistor). The overcurrent status is released when the following condition holds. (1) The VMP pin voltage is VIOV3 or higher because a charger is connected or the load (30 M or more) is released. 5. 0 V Battery Charge Function Regarding the charging of a self-discharged battery (0 V battery), the S-8254A Series has two functions from which one should be selected. (1) 0 V battery charging is allowed (0 V battery charging is available.) When the charger voltage is higher than V0CHA, the 0 V battery can be charged. (2) 0 V battery charging is prohibited (0 V battery charging is unavailable.) When the battery voltage is V0INH or lower, the 0 V battery cannot be charged. Caution When the VDD pin voltage is lower than the minimum value of VDSOP, the operation of the S-8254A Series is not guaranteed. 6. Delay Time Setting The overcharge detection delay time (tCU) is determined by the external capacitor connected to the CCT pin. The overdischarge detection delay time (tDL) and overcurrent detection delay time 1 (tIOV1) are determined by the external capacitor connected to the CDT pin. Overcurrent detection delay times 2 and 3 (tIOV2, tIOV3) are fixed internally. min. typ. max. tCU [s] (5.00, 10.0, 15.0) CCCT [F] tDL [s] (0.50, 1.00, 1.50) CCDT [F] tIOV1 [s] (0.05, 0.10, 0.15) CCDT [F] 7. CTL Pin The S-8254A Series has control pins. The CTL pin is used to control the COP and DOP pin output voltages. CTL pin takes precedence over the battery protection circuit. Table 5 Conditions Set by CTL Pin CTL Pin COP Pin DOP Pin High High-Z VDD Open High-Z VDD *1 Normal status *1 Normal status Low *1. The status is controlled by the voltage detector. Caution Please note unexpected behavior might occur when electrical potential difference between the CTL pin (`L' level) and VSS is generated through the external filter (RVSS and CVSS) as a result of input voltage fluctuations. 15 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 8. SEL pin The S-8254A Series has control pins. The SEL pin is used to switch between 3-cell and 4-cell protection. When the SEL pin is low, overdischarge detection of the V4 cell is prohibited and an overdischarge is not detected even if the V4 cell is shorted, therefore, the V4 cell can be used for 3-cell protection. The SEL pin takes precedence over the battery protection circuit. Use the SEL pin at high or low. Table 6 Conditions Set by SEL Pin SEL Pin High Open Low 16 Condition 4-cell protection Undefined 3-cell protection BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Timing Chart 1. Overcharge Detection and Overdischarge Detection VCUn VCLn Battery voltage VDUn VDLn (n = 1 to 4) VDD DOP pin voltage VSS VEB COP pin voltage High-Z High-Z VSS VEB VDD 39 / 40VDD VMP pin voltage 1 / 2VDD VSS Charger connection Load connection Overcharge detection delay time (tCU) Status*1 <1> Overdischarge detection delay time (tDL) <2> <1> <4> <1> <3> *1. < 1 > : Normal status < 2 > : Overcharge status < 3 > : Overdischarge status < 4 > : Power-down status Remark The charger is assumed to charge with a constant current. VEB indicates the open voltage of the charger. Figure 9 17 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 2. Overcurrent detection VHC VCUn VCLn Battery voltage VDUn VDLn VHD (n = 1 to 4) VDD DOP pin voltage VSS VEB High-Z COP pin voltage High-Z High-Z VSS VDD VIOV3 VMP pin voltage VSS VDD VINI pin voltage VIOV2 VIOV1 VSS Load connection Status*1 Overcurrent 1 detection delay time (tIOV1) <1> <2> Overcurrent 2 detection Overcurrent 3 detection delay time (tIOV3) delay time (tIOV2) <1> <2> <1> <2> <1> *1. < 1 > : Normal status < 2 > : Overcurrent status Remark The charger is assumed to charge with a constant current. VEB indicates the open voltage of the charger. Figure 10 18 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Battery Protection IC Connection Example 1. 3-serial Cell Charging Discharging FET FET EB RVMP RDOP RCOP S-8254A 1 2 3 4 5 6 7 8 RVINI CCDT CCCT COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 CVC1 CVC2 CVC3 RVC1 RVC2 RVC3 RCTL RSEL CTL CVSS RVSS RSENSE EB Figure 11 2. 4-serial Cell Charging Discharging FET FET EB RVMP RDOP RCOP RVINI CCDT CCCT S-8254A 1 2 3 4 5 6 7 8 COP VMP DOP VINI CDT CCT VSS NC VDD VC1 VC2 VC3 VC4 CTL SEL NC 16 15 14 13 12 11 10 9 CVC1 CVC2 CVC3 RVC1 RVC2 RVC3 RVC4 RCTL CVC4 RSEL CTL CVSS RVSS RSENSE EB Figure 12 19 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Table 7 Constants for External Components Symbol Min. Typ. 0 1 0 1 0 1 0 1 RDOP 2 5.1 RCOP 0.1 1 RVMP 1 5.1 RCTL 1 1 RVINI 1 1 RSEL 1 1 RSENSE 0 *1 RVSS 10 51 CVC1*1 0 0.1 CVC2*1 0 0.1 CVC3*1 0 0.1 *1 CVC4 0 0.1 CCCT 0.01 0.1 CCDT 0.07 0.1 CVSS*1 2.2 2.2 *1. Please set up a filter constant to be RVSS CVSS 51 F and RVC3 CVC3 = R VC4 CVC4 = RVSS CVSS. RVC1*1 RVC2*1 RVC3*1 RVC4*1 Caution Max. 1 1 1 1 10 1 10 100 100 100 51 0.33 0.33 0.33 0.33 10 to be RVC1 CVC1 = Unit k k k k k M k k k k m F F F F F F F RVC2 CVC2 = 1. The above constants may be changed without notice. 2. It is recommended that filter constants between VDD and VSS should be set approximately to 112 F . e.g. CVSS RVSS 2.2 F 51 112 F Enough evaluation of transient power supply variation and overcurrent protection function in the actual application is needed to determine the proper constants. Contact our sales office in case the constants should be set to other than 112 F * or so. 3. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant. Precautions The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. Batteries can be connected in any order, however, there may be cases when discharging cannot be performed when a battery is connected. In this case, short the VMP pin and VDD pin or connect the battery charger to return to the normal status. When an overcharged battery and an overdischarged battery intermix, the circuit is in both the overcharge and overdischarge statuses, so charging and discharging are not possible. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 20 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 Characteristics (Typical Data) 1. Current Consumption 40 35 30 25 20 15 10 5 0 0 1. 2 IOPE vs. Ta IOPE [A] IOPE [A] 1. 1 IOPE vs. VDD 5 10 15 VDD [V] 20 24 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 0 0 25 Ta [C] 50 75 85 1. 4 IPDN vs. Ta IPDN [A] IPDN [A] 1. 3 IPDN vs. VDD 40 35 30 25 20 15 10 5 0 40 25 5 10 15 VDD [V] 20 24 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 40 25 0 25 Ta [C] 50 75 85 2. Overcharge Detection / Release Voltage, Overdischarge Detection / Release Voltage, Overcurrent Detection Voltage, and Delay Times 4.375 4.370 4.365 4.360 4.355 4.350 4.345 4.340 4.335 4.330 4.325 40 25 2. 2 VCL vs. Ta 4.20 4.18 VCL [V] VCU [V] 2. 1 VCU vs. Ta 0 25 Ta [C] 50 4.10 40 25 75 85 0 25 Ta [C] 50 75 85 0 25 Ta [C] 50 75 85 2. 4 VDL vs. Ta VDL [V] VDU [V] 4.14 4.12 2. 3 VDU vs. Ta 2.80 2.78 2.76 2.74 2.72 2.70 2.68 2.66 2.64 2.62 2.60 40 25 4.16 0 25 Ta [C] 50 75 85 2.08 2.06 2.04 2.02 2.00 1.98 1.96 1.94 1.92 40 25 21 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series 0.35 0.34 0.33 0.32 0.31 0.30 0.29 0.28 0.27 0.26 0.25 10 2. 6 VIOV1 vs. Ta VIOV1 [V] VIOV1 [V] 2. 5 VIOV1 vs. VDD 11 12 13 14 VDD [V] 15 16 11 12 13 14 VDD [V] 15 16 1.0 1.0 1.1 1.1 VIOV3 [V] 0.9 1.2 1.3 11 12 13 14 VDD [V] 15 75 85 0 25 Ta [C] 50 75 85 0 25 Ta [C] 50 75 85 1.2 1.3 1.5 40 25 16 2. 12 tCU vs. Ta 100 1.4 10 1.2 tCU [s] tCU [s] 50 1.4 2. 11 tCU vs. CCCT 1 1.0 0.8 0.1 0.01 0.01 25 Ta [C] 2. 10 VIOV3 vs. Ta 1.4 22 0.60 0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 0.40 40 25 0.9 1.5 10 0 2. 8 VIOV2 vs. Ta 2. 9 VIOV3 vs. VDD VIOV3 [V] 0.325 0.320 0.315 0.310 0.305 0.300 0.295 0.290 0.285 0.280 0.275 40 25 VIOV2 [V] VIOV2 [V] 2. 7 VIOV2 vs. VDD 0.60 0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 0.40 10 Rev.5.2_01 0.1 CCCT [F] 1 0.6 40 25 0 25 Ta [C] 50 75 85 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 2. 14 tDL vs. Ta 10 200 1 150 tDL [ms] tDL [s] 2. 13 tDL vs. CCDT 0.1 50 0.01 0.001 0.07 0.1 0 40 25 1 CCDT [F] 2. 15 tIOV1 vs. CCDT 1 20 0.1 15 0.01 0.0001 0.07 0.1 50 75 85 0 25 Ta [C] 50 75 85 10 0 40 25 1 CCDT [F] 2. 17 tIOV2 vs. Ta 2. 18 tIOV3 vs. Ta 500 2.0 400 1.5 tIOV3 [ms] tIOV2 [ms] 25 Ta [C] 5 0.001 1.0 0.5 0 40 25 0 2. 16 tIOV1 vs. Ta tIOV1 [ms] tIOV1 [s] 100 300 200 100 0 25 Ta [C] 50 75 85 0 40 25 0 25 Ta [C] 50 75 85 23 BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK S-8254A Series Rev.5.2_01 3. COP / DOP Pin 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 3. 2 ICOL vs. VCOP 25 20 ICOL [mA] ICOH [A] 3. 1 ICOH vs. VCOP 0 5 10 15 VCOP [V] 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0 0 24 3.5 7 VCOP [V] 10.5 14 7 VDOP [V] 10.5 14 3. 4 IDOL vs. VDOP 25 20 IDOL [mA] IDOH [mA] 10 5 3. 3 IDOH vs. VDOP 24 15 15 10 5 1.8 3.6 VDOP [V] 5.4 7.2 0 0 3.5 5.10.2 0.65 16 9 1 8 0.170.05 0.220.08 No. FT016-A-P-SD-1.2 TITLE TSSOP16-A-PKG Dimensions FT016-A-P-SD-1.2 No. ANGLE UNIT mm ABLIC Inc. +0.1 4.00.1 o1.5 -0 0.30.05 2.00.1 8.00.1 1.50.1 o1.60.1 (7.2) 4.20.2 +0.4 6.5 -0.2 1 16 8 9 Feed direction No. FT016-A-C-SD-1.1 TITLE TSSOP16-A-Carrier Tape No. FT016-A-C-SD-1.1 ANGLE UNIT mm ABLIC Inc. 21.41.0 17.41.0 +2.0 17.4 -1.5 Enlarged drawing in the central part o210.8 20.5 o130.2 No. FT016-A-R-SD-2.0 TITLE TSSOP16-A- Reel FT016-A-R-SD-2.0 No. ANGLE UNIT QTY. mm ABLIC Inc. 2,000 21.41.0 17.41.0 +2.0 17.4 -1.5 Enlarged drawing in the central part o210.8 20.5 o130.2 No. FT016-A-R-S1-1.0 TITLE TSSOP16-A- Reel No. FT016-A-R-S1-1.0 ANGLE QTY. UNIT mm ABLIC Inc. 4,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com