© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 1 of 8
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MLCC Surface Mount EMI Filters E01 & E07
EMI filters E01 & E07 feedthrough capacitors
The Syfer E01 and E07 ranges of feedthrough MLCC
chip ‘C’ filters are 3 terminal chip devices designed to
offer reduced inductance compared to conventional
MLCCs when used in signal line filtering.
The filtered signal passes through the chip internal
electrodes and the noise is filtered to the grounded side
contacts, resulting in reduced length noise transmission
paths.
Available in C0G/NP0 & X7R dielectrics, with current
ratings of 300mA, 1A, 2A, 3A and voltage ratings of
25Vdc to 200Vdc. Also available with FlexiCap™
termination which is strongly recommended for new
designs.
Commonly used in automotive applications, a range
qualified to AEC-Q200 is also available.
Electrical Details
Capacitance Range 10pF to 1.8µF
Temperature Coefficient of
Capacitance (TCC)
C0G/NP0 0 ± 30ppm/˚C
X7R ±15% from -55˚C to +125˚C
Dissipation Factor
C0G/NP0
Cr > 50pF 0.0015
Cr 50pF = 0.0015(15÷Cr+0.7)
X7R 0.025
Insulation Resistance (IR) 100G or 1000secs (whichever is the less)
Dielectric Withstand Voltage (DWV) Voltage applied for 5 ±1 seconds, 50mA
charging current maximum
Ageing Rate
C0G/NP0 Zero
X7R <2% per time decade
E01 300mA, E07 1A/2A/3A
Dimensions
0805 1206 1806 1812
L 2.0 ± 0.3
(0.079 ± 0.012) 3.2 ± 0.3
(0.126 ± 0.012) 4.5 ± 0.35
(0.177 ± 0.014) 4.5 ± 0.35
0.18 ± 0.014
W 1.25 ± 0.2
(0.049 ± 0.008) 1.6 ± 0.2
(0.063 ± 0.008) 1.6 ± 0.2
(0.063 ± 0.008) 3.2 ± 0.3
0.126 ± 0.012
T 1.0 ± 0.15
(0.039 ± 0.006) 1.1 ± 0.2
(0.043 ± 0.008) 1.1 ± 0.2
(0.043 ± 0.008) 2.1
0.08
B1 0.60 ± 0.2
(0.024 ± 0.008) 0.95 ± 0.3
(0.037 ± 0.012) 1.4 ± 0.3
(0.055 ± 0.012) 1.45± 0.35
(0.057 ± 0.014)
B2 0.3 ± 0.15
(0.012 ± 0.006) 0.5 ± 0.25
(0.02 ± 0.01) 0.5 ± 0.25
(0.02 ± 0.01) 0.75± 0.25
(0.03 ± 0.01)
0805 1206 1806 1812
A 0.95 (0.037) 1.2 (0.047) 1.2 (0.047) 2.65
B 0.9 (0.035) 0.9 (0.035) 1.4 (0.055) 1.4 (0.055)
C 0.3 (0.012) 0.6 (0.024) 0.8 (0.031) 0.8 (0.031)
D 0.4 (0.016) 0.8 (0.031) 1.4 (0.055) 1.4 (0.055)
E 0.75 (0.030) 1.0 (0.039) 1.0 (0.039) 2.05 (0.081)
Notes: 1) All dimensions mm (inches).
2) Pad widths less than chip width gives improved mechanical performance.
3) The solder stencil should place 4 discrete solder pads. The unprinted distance between ground pads is shown as
dimension E.
4) Insulating the earth track underneath the filters is acceptable and can help avoid displacement of filter during
soldering but can result in residue entrapment under the chip.
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 2 of 8
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Type E01
Chip Size 0805 1206 1806
Max Current 300mA 300mA 300mA
Rated Voltage Dielectric Minimum and maximum capacitance values
25Vdc C0G/NP0 180pF-1.5nF 560pF-3.9nF 820pF-4.7nF
X7R 470pF-100nF 5.6nF-330nF 3.9nF-560nF
50Vdc C0G/NP0 22pF-820pF 22pF-3.3nF 22pF-3.9nF
X7R 560pF-68nF 4.7nF-220nF 3.3nF-330nF
100Vdc C0G/NP0 22pF-560pF 22pF-2.2nF 22pF-3.3nF
X7R 560pF-27nF 1.8nF-100nF 3.3nF-180nF
200Vdc C0G/NP0 - 560pF-1.2nF 56pF-1nF
X7R - 2.7nF-56nF 3.9nF-100nF
Note: 1) Unshaded E01 cells indicate AEC-Q200 qualified range.
Type E07
Chip Size 0805 1206 1806 1812
Max Current 1A 2A 2A 3A
Rated Voltage Dielectric Minimum and maximum capacitance values
25Vdc C0G/NP0 180pF-1.5nF 560pF-3.9nF 820pF-4.7nF -
X7R 820pF-100nF 10nF-330nF 22nF-560nF 560nF-1.8µF
50Vdc C0G/NP0 10pF-220pF 22pF-1nF 100pF-2.2nF -
X7R 1nF-68nF 10nF-220nF 22nF-330nF 330nF-1.5µF
100Vdc C0G/NP0 10pF-120pF 22pF-560pF 100pF-680pF -
X7R 1nF-27nF 10nF-100nF 22nF-180nF 180nF-820nF
200Vdc C0G/NP0 - 15pF-180pF 56pF-470pF -
X7R - 12nF-56nF 22nF-100nF 100nF-270nF
E07 25Vdc C0G/NP0 1206 to 1806 have a maximum current of 1A.
Ordering Information – E01 & E07 feedthrough capacitors
1206 Y 100 0103 M X T E07
Chip Size Termination Rated Voltage Capacitance in Pico
farads (pF) Capacitance
Tolerance Dielectric
Codes Packaging Type
0805
1206
1806
1812
J = Nickel Barrier (Tin)
*Y = FlexiCap™ (Tin -
X7R only)
A = (Tin/Lead) Not
RoHS compliant.
*H = FlexiCap™
(Tin/Lead) Not RoHS
compliant.
025 = 25V
050 = 50V
100 = 100V
200 = 200V
First digit is 0. Second and
third digits are significant
figures of capacitance code.
The fourth digit is number of
zeros following
Example: 0103=10000pF.
M = ±20%
A = C0G/NP0
AEC-Q200
C = C0G/NP0
E = X7R
AEC-Q200
X = X7R
T = 178mm
(7”) reel
R = 330mm
(13”) reel
B = Bulk pack
– tubs or trays
E01
E07
Note: * FlexiCap™ termination only available in X7R material. Please contact our Sales Office for any special requirements.
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 3 of 8
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Open board insertion loss performance in 50 system
Open Board Performance
Capacitance 0.1MHz 1MHz 10MHz 100MHz 1GHz Resonance Freq (MHz) approx.
10pF 0 0 0 0 7.5 2200
22pF 0 0 0 0 16 1600
33pF 0 0 0 1 22 1350
47pF 0 0 0 2 28 1150
68pF 0 0 0 3 41 900
100pF 0 0 0 5 28 800
150pF 0 0 0 8 24 700
220pF 0 0 0 12 20 600
330pF 0 0 1 15 20 500
470pF 0 0 2 18 20 425
560pF 0 0 3 20 20 350
680pF 0 0 4 22 20 300
820pF 0 0 5 24 20 260
1nF 0 0 7 27 20 220
1.5nF 0 0 9 31 20 200
2.2nF 0 0 12 34 20 170
3.3nF 0 1 14 39 20 135
4.7nF 0 2 18 46 20 110
6.8nF 0 3 21 50 20 90
10nF 0 5 24 48 20 80
15nF 0 8 27 45 20 65
22nF 0 12 31 43 20 56
33nF 1 14 34 40 20 40
47nF 2 17 38 40 20 34
68nF 4 20 41 40 20 30
100nF 6 24 45 40 20 28
150nF 8 26 48 40 20 24
220nF 10 30 52 40 20 17
330nF 13 33 55 40 20 15.5
470nF 16 36 60 40 20 14
560nF 18 39 65 40 20 12
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 4 of 8
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Soldering Information
Syfer MLCCs are compatible with all recognised
soldering/mounting methods for chip capacitors. A detailed
application note is available at syfer.com
Reflow Sold ering
Syfer recommend reflow soldering as the preferred method for
mounting MLCCs. Syfer MLCCs can be reflow soldered using a
reflow profile generally defined in IPC/FEDEC J-STD-020. Sn
plated termination chip capacitors are compatible with both
conventional and lead free soldering with peak temperatures of
260 to 270˚C acceptable.
The heating ramp rate should be such that components see a
temperature rise of 1.5 to 4˚C per second to maintain
temperature uniformity through the MLCC.
The time for which the solder is molten should be maintained
at a minimum, so as to prevent solder leaching. Extended
times above 230˚C can cause problems with oxidation of Sn
plating. Use of an inert atmosphere can help if this problem is
encountered. Palladium/Silver (Pd/Ag) terminations can be
particularly susceptible to leaching with free lead, tin rich
solders and trials are recommended for this combination.
Cooling to ambient temperature should be allowed to occur
naturally, particularly if larger chip sizes are being soldered.
Natural cooling allows a gradual relaxation of thermal
mismatch stresses in the solder joints. Forced cooling should
be avoided as this can induce thermal breakage.
Wave Soldering
Wave soldering is generally acceptable, but the thermal
stresses caused by the wave have been shown to lead to
potential problems with larger or thicker chips. Particular care
should be taken when soldering SM chips larger than size 1210
and with a thickness greater than 1.0mm for this reason.
Maximum permissible wave temperature is 270˚C for SM
chips.
The total immersion time in solder should be kept to a
minimum. It is strongly recommended that Sn/Ni plated
terminations are specified for wave soldering applications.
Sold er Leaching
Leaching is the term for the dissolution of silver into the solder
causing a failure of the termination system which causes
increased ESR, tan δ and open circuit faults, including
ultimately the possibility of the chip becoming detached.
Leaching occurs more readily with higher temperature solders
and solders with a high tin content. Pb free solders can be very
prone to leaching certain termination systems. To prevent
leaching, exercise care when choosing solder allows and
minimize both maximum temperature and dwell time with the
molten solder.
Plated terminations with nickel or copper anti-leaching barrier
layers are available in a range of top coat finishes to prevent
leaching occurring. These finishes also include Syfer FlexiCapTM
for improved stress resistance post soldering.
Multilayer ceramic chip with nickel or copper barrier
termi
natio
n
Rework of Chip Capa cito rs
Syfer recommend hot air/gas as the preferred method of
applying heat for rework. Apply even heat surrounding the
component to minimise internal thermal gradients. Soldering
irons or other techniques that apply direct heat to the chip or
surrounding area should not be used as these can result in
micro cracks being generated.
Minimise the rework heat duration and allow components to
cool naturally after soldering.
Use of Silver Loade d Ep oxy Adhesives
Chip capacitors can be mounted to circuit boards using silver
loaded adhesive provided the termination material of the
capacitor is selected to be compatible with the adhesive. This
is normally PdAg. Standard tin finishes are often not
recommended for use with silver loaded epoxies as there can
be electrical and mechanical issues with the joint integrity due
to material mismatch.
Handling & Storage
Components should never be handled with fingers;
perspiration and skin oils can inhibit solderability and will
aggravate cleaning.
Chip capacitors should never be handled with metallic
instruments. Metal tweezers should never be used as these
can chip the product and leave abraded metal tracks on the
product surface. Plastic or plastic coated metal types are
readily available and recommended – these should be used
with an absolute minimum of applied pressure.
Incorrect storage can lead to problems for the user. Rapid
tarnishing of the terminations, with an associated degradation
of solderability, will occur if the product comes into contact
with industrial gases such as sulphur dioxide and chlorine.
Storage in free air, particularly moist or polluted air, can result
in termination oxidation.
Packaging should not be opened until the MLCs are required
for use. If opened, the pack should be re-sealed as soon as
practicable. Alternatively, the contents could be kept in a
sealed container with an environmental control agent.
Long term storage conditions, ideally, should be temperature
controlled between -5 and +40˚C and humidity controlled
between 40% and 60% R.H.
Taped product should be stored out of direct sunlight, which
might promote deterioration in tape or adhesive performance.
Product, stored under the conditions recommended above, in
its “as received” packaging, has a minimum shelf life of 2
years.
SM Pad Design
Syfer conventional 2-terminal chip capacitors can generally be
mounted using pad designs in accordance with IPC-7351,
Generic Requirements for Surface Mount Design and Land
Pattern Standards, but there are some other factors that have
been shown to reduce mechanical stress, such as reducing the
pad width to less than the chip width. In addition, the position
of the chip on the board should also be considered.
3-terminal components are not specifically covered by IPC-
7351, but recommended pad dimensions are included in the
Syfer catalogue/website for these components.
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 5 of 8
Tel: +44 1603 723300 | Email SyferSales@knowles.com | www.knowlescapacitors.com/syfer
FlexiCapTM Termination
FlexiCapTM has been developed as a result of listening to
customer’s experiences of stress damage to MLCCs from many
manufacturers, often caused by variations in production
processes.
Our answer is a proprietary flexible epoxy polymer termination
material that is applied to the device under the usual nickel
barrier finish. FlexiCapTM will accommodate a greater degree of
board bending than conventional capacitors.
Ranges are available with FlexiCapTM termination material
offering increased reliability and superior mechanical
performance (board flex and temperature cycling) when
compared with standard termination materials. Refer to Syfer
application note reference AN0001. FlexiCapTM capacitors
enable the board to be bent almost twice as much as before
mechanical cracking occurs. Refer to application note AN0002.
FlexiCapTM is also suitable for space applications having passed
thermal vacuum outgassing tests. Refer to Syfer application
note reference AN0026.
Syfer has delivered millions of FlexiCapTM components and
during that time has collected substantial test and reliability
data, working in partnership with customers world wide, to
eliminate mechanical cracking.
An additional benefit of FlexiCapTM is that MLCCs can withstand
temperature cycling from -55 to 125˚C in excess of 1,000
times without cracking.
FlexiCapTM termination has no adverse effect on any electrical
parameters, nor affects the operation of the MLCC in any way.
Application Notes
FlexiCapTM may be handled, stored and transported in the
same manner as standard terminated capacitors. The
requirements for mounting and soldering FlexiCapTM are the
same as for standard SMD capacitors.
For customers currently using standard terminated capacitors
there should be requirement to change the assembly process
when converting to FlexiCapTM.
Based upon the board bend tests in accordance with IEC
60384-1 the amount of board bending required to
mechanically crack a FlexiCapTM terminated capacitor is
significantly increased compared with standard terminated
capacitors.
Product: X7R Typical bend performance under
AEC-Q200 test conditions
Standard
Termination 2mm to 3mm
FlexiCapTM Typically 8mm to 10mm
REACH (Registration, Evaluation, Authorisation and
restriction of Chem icals) Statement
The main purpose of REACH is to improve the protection of
human health and the environment from the risks arising from
the use of chemicals.
Syfer Technology Ltd maintains both ISO 14001,
Environmental Management System and OHSAS 18001 Health
& Safety Management System approvals that require and
ensure compliance with corresponding legislation such as
REACH.
For further information, please contact the sales office at
SyferSales@knowles.com
RoHS Compliance
Syfer routinely monitors world wide material restrictions (e.g.,
EU/China and Korea RoHS mandates) and is actively involved
in shaping future legislation.
All standard C0G/NPO, X7R, X5R and High Q Syfer MLCC
products are compliant with the EU RoHS directive (see below
for special exemptions) and those with plated terminations are
suitable for soldering common lead free solder alloys (refer to
‘Soldering Information’ for more details on soldering
limitations). Compliance with EU RoHS directive automatically
signifies compliance with some other legislation (e.g., Korea
RoHS). Please refer to the Sales Office for details of
compliance with other materials legislation.
Breakdown of material content, SGS analysis reports and tin
whisker test results are available on request.
Most Syfer MLCC components are available with non-RoHS
compliant tin/lead (SnPb) Solderable termination finish for
exempt applications and where pure tin is not acceptable.
Other tin free termination finishes may also be available –
please refer to the Sales Office for further details.
X8R ranges <250Vdc are not RoHS 2011/65/EU compliant.
Check the website, www.syfer.com for latest RoHS update.
Export Controls and Du al-use Regulati on s
Certain Syfer catalogue components are defined as ‘dual-use’
items under international export controls – those that can be
used for civil and military purposes which meet certain
specified technical standards.
The defining criteria for a dual-use component with respect to
Syfer products is one with a voltage rating of >750V and a
capacitance value >250nF and a series inductance <10nH.
Components defined as ‘dual-use’ under the above criteria
automatically require a licence for export outside the EU, and
may require a licence for export with the EU.
The application for a licence is routine, but customers for these
products will be asked to supply further information.
Please refer to the sales office if you require any further
information on export restrictions.
Other special components may additionally need to comply
with export regulations.
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 6 of 8
Tel: +44 1603 723300 | Email SyferSales@knowles.com | www.knowlescapacitors.com/syfer
Ageing of Ceramic Capacitors
Capacitor ageing is a term used to describe the negative,
logarithmic capacitance change which takes place in ceramic
capacitors with time. The crystalline structure for barium
titanate based ceramics changes on passing through its Curie
temperature (known as the Curie Point) at about 125ºC. The
domain structure relaxes with time and in doing so, the
dielectric constant reduces logarithmically; this is known as the
ageing mechanism of the dielectric constant. The more stable
dielectrics have the lowest ageing rates.
The ageing process is reversible and repeatable. Whenever the
capacitor is heated to a temperature above the Curie Point the
ageing process starts again from zero.
The ageing constant, or ageing rate, is defined as the
percentage loss of capacitance due to the ageing process of
the dielectric which occurs during a decade of time (a tenfold
increase in age) and is expressed as percent per logarithmic
decade of hours. As the law of decrease of capacitance is
logarithmic, this means that for a capacitor with an ageing rate
of 1% per decade of time, the capacitance will decrease at a
rate of:
a) 1% between 1 and 10 hours
b) An additional 1% between the following 10 and 100
hours
c) An additional 1% between the following 100 and 1000
hours
d) An additional 1% between the following 1000 and
10000 hours
e) The ageing rate continues in this manner throughout
the capacitor’s life.
Typical values of the ageing constant for our MLCCs are
Dielectric Class Typical Values
Ultra Stable C0G/NP0 Negligible capacitance loss
through ageing
Stable X7R <2% per decade of time
Capacitance Measurements
Because of ageing it is necessary to specify an age for
reference measurements at which the capacitance shall be
within the prescribed tolerance. This is fixed at 1000 hours,
since for all practical purposes there is not much further loss of
capacitance after this time.
All capacitors shipped are within their specified tolerance at the
standard reference age of 1000 hours after having cooled
through their Curie temperature.
The ageing curve for any ceramic dielectric is a straight line
when plotted on semi-log paper.
Capacitance vs. Time
(Ageing X7R @ 1% per decade)
Tight Tolerance
One of the advantages of Syfer’s unique ‘wet process’ of
manufacture is the ability to offer capacitors with exceptionally
tight capacitance tolerances.
The accuracy of the printing screens used in the fully
automated, computer controlled manufacturing process allows
for tolerance as close as ± 1% on C0G/NP0 parts greater than
or equal to 10pF. For capacitance value less than 4.7pF
tolerances can be as tight as ± 0.05pF.
Periodic Tests Conducted and Reliability Data
For standard surface mount capacitors components are
randomly selected on a sample basis and the following routine
tests conducted:
Load Test. 1,000 hours @ 125˚C (150˚C for X8R).
Applied voltage depends on components tested
Humidity Test. 168 hours @ 85˚C/85%RH
Board Deflection (bend test)
Test results are available on request.
Conversion Factors
From To Operation
FITs MTBF (hours) 109 ÷ FITs
FITs MTBF (years) 109 ÷ (FITs × 8760)
FIT = Failures In Time. 1 FIT = 1 failure in 109 hours
MTBF = Mean Time Between Failure
Example of FIT Data Available
Component type: 0805 (C0G/NP0 and X7R)
Testing Location: Syfer reliability test department
Results based on: 16,622,000 component test hours
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 7 of 8
Tel: +44 1603 723300 | Email SyferSales@knowles.com | www.knowlescapacitors.com/syfer
Packaging Information
Tape and reel packing of surface mounting chip capacitors for
automatic placement are in accordance with IEC60286-3.
Peel Force
The peel force of the top sealing tape is between 0.2 and 1.0
Newton at 180˚. The breaking force of the carrier and sealing
tape in the direction of unreeling is greater than 10 Newton.
Reel Dimensions
Symbol
Description 178mm
Reel 330mm
Reel
A Reel diameter 178
(7)
330
(13)
G Reel inside width 8.4
(0.33)
12.4
(0.49)
T Reel outside width 14.4
(0.56) max
18.4
(0.72) max
Tape Dimensions
Dimensions mm (inches)
Symbol Description 8mm Tape 12mm Tape
A0
B0
K0
Width of cavity
Length of cavity
Depth of cavity
Dependent on chip size to minimize rotation
W Width of tape 8.0 (0.315) 12.0 (0.472)
F Distance between drive hole centres and cavity centres 3.5 (0.138) 5.5 (0.213)
E Distance between drive hole centres and tape edge 1.75 (0.069)
P1 Distance between cavity centres 4.0 (0.156) 8.0 (0.315)
P2 Axial distance between drive hole centres and cavity centres 2.0 (0.079)
P0 Axial distance between drive hole centres 4.0 (0.156)
D0 Drive hole diameter 1.5 (0.059)
D1 Diameter of cavity piercing 1.0 (0.039) 1.5 (0.059)
T Carrier tape thickness 0.3 (0.012) ±0.1 (0.04) 0.4 (0.016) ±0.1 (0.04)
t1 Top tape thickness 0.1 (0.004) max
© Knowles 2014 E01E07Datasheet Issue 5 (P109782) Release Date 03/11/14 Page 8 of 8
Tel: +44 1603 723300 | Email SyferSales@knowles.com | www.knowlescapacitors.com/syfer
Packing Information
Missing Components
The number of missing components in the tape may not
exceed 0.25% of the total quantity with not more than three
consecutive components missing. This must be followed by at
least six properly placed components
Identification
Each reel is labelled with the following information:
manufacturer, chip size, capacitance, tolerance, rated voltage,
dielectric type, batch number, date code and quantity of
components.
Leader Trailer
Component Orientation
Tape and reeling is in accordance with IEC 60286 part 3, which
defines the packaging specifications for leadless components
on continuous tapes.
Notes: 1) IEC60286-3 states A0 <B0
2) Regarding the orientation of 1825 and 2225
components, the termination bands are right to
left, NOT front to back. Please see diagram.
Outer Packaging
Outer carton dimensions mm (inches) max
Reel Size No. of Reels L W T
178
(7) 1 185
(7.28)
185
(7.28)
25
(0.98)
178
(7) 4 190
(7.48)
195
(7.76)
75
(2.95)
330
(13) 1 335
(13.19)
335
(13.19)
25
(0.98)
Reel Quantities
178mm
(7”) reel
0805 1206 1806 330mm
13” reel
0805 1206 1806
3000 2500 2500 12000 10000 10000
Bulk Packing – Tubs
Chips are supplied in rigid re-sealable plastic tubs together
with impact cushioning wadding. Tubs are labelled with the
details: chip size, capacitance, tolerance, rated voltage,
dielectric type, batch number, date code and quantity of
components.
Dimensions mm (inches)
H 60mm (2.36”)
D 50mm (1.97”)
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Syfer:
0805J1000103MXTE01 1806J0500204MXTE01 1806J1000222MCTE01 0805J1000221MCTE01
0805J1000221MCBE01 0805J1000102MXTE01 0805J1000471MCTE01 0805J1000332MXTE07
1206J0500223MXTE07 0805J0500473MXTE01 0805J1000222MXTE01 0805J1000470MCTE01
1206J1000220MCTE01 1206J0500223MXTE01 1206J1000101MCTE01 0805Y1000101MCTE01
1806A0500204MXTE07 1806J1000101MCTE01 1806J1000222MXTE01 0805J0500223MXTE01
1806J0500204MXTE07 1806J1000471MCTE01 1806Y1000333MXTE07 0805Y1000102MXTE01
1806J0500222MXTE01 1206Y1000103MXTE07 0805J1000472MXTE01 0805Y0500101MCTE01
0603J0250183MXTE01 0603J0250391MCTE01 0603J0500123MXTE01 0603J0500560MCTE01
0805Y0500222MXTE01 0805Y0500223MXTE07 0805Y0500473MXTE07 0805Y1000102MXTE07
0805Y1000222MXTE01 0805Y1000222MXTE07 1206Y1000104MXTE01 1806Y0500224MXTE07
1806Y1000683MXTE01 0805J0500101MCTE01 0805J1000101MCTE01 1206J0500104MXBE07
0805J1000102MXTE07 1806J1000103MXTE01 0805Y1000103MXTE01 0805Y1000103METE01
1206J1000220MATE01 0805Y0500103METE01 1206J1000471MATE01 1806Y0500204METE07
0805Y0500473METE01 0805J1000221MATE01 0805J1000220MATE01 1206Y1000472METE01
1806Y1000103METE01 0805J1000221MARE01 1206Y0500223METE07