LTC3103EDD#TRPBF - Linear Technology Corporation

LTC3103

3103f

TYPICAL APPLICATION

FEATURES DESCRIPTION

1.8µA Quiescent Current,

15V, 300mA Synchronous

Step-Down DC/DC

Converter

The LTC

3103 is a high efficiency, monolithic synchronous

step-down converter using a current mode architecture

capable of supplying 300mA of output current.

The LTC3103 offers two operational modes: automatic

Burst Mode operation and forced continuous mode allow-

ing the user the ability to optimize output voltage ripple,

noise and light load efficiency. With Burst Mode operation

enabled, the typical DC input supply current at no load

drops to 1.8µA maximizing the efficiency for light loads.

Selection of forced continuous mode provides very low

noise constant frequency, 1.2MHz operation.

Additionally, the LTC3103 includes an accurate RUN com-

parator, thermal overload protection, a power good output

and an integrated soft-start feature to guarantee that the

power system start-up is well controlled.

APPLICATIONS

n Ultralow Quiescent Current: 1.8µA

n Synchronous Rectification: Efficiency Up to 95%

n Wide VIN Range: 2.5V to 15V

n Wide VOUT Range: 0.6V to 13.8V

n 300mA Output Current

n User-Selectable Automatic Burst Mode

or Forced

Continuous Operation

n Accurate and Programmable RUN Pin Threshold

n 1.2MHz Fixed Frequency PWM

n Internal Compensation

n Power Good Status Output for VOUT

n Available in Thermally Enhanced 3mm × 3mm ×

0.75mm, 10-Pin DFN and 10-Pin MSOP Packages

n Remote Sensor Networks

n Distributed Power Systems

n Multicell Battery or SuperCap Regulator

n Energy Harvesters

n Portable Instruments

n Low Power Wireless Systems

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

of Linear Technology Corporation. All other trademarks are the property of their respective

owners.

VIN 0.022µF

BST3V TO 15V

MODE SW

RUN PGOOD

VCC FB

LTC3103

GND

665k

10µH 2.2V

300mA

3103 TA01a

47µF

1µF

10µF 1.78M

12pF

Efficiency vs Output Current

OUTPUT CURRENT (A)

EFFICIENCY (%)

POWER LOSS (mW)

100

0.0001 0.01 0.1 1

3103 TA01b

50 0.1

100

0.001

VIN = 3V

VIN = 5V

VIN = 10V

VIN = 15V

LTC3103

3103f

ABSOLUTE MAXIMUM RATINGS

VIN ............................................................. –0.3V to 18V

SW ................................................ –0.3V to (VIN + 0.3V)

FB ................................................................ –0.3V to 6V

BST ........................................ (SW – 0.3V) to (SW + 6V)

RUN, MODE ............................................... –0.3V to VIN

VCC, PGOOD ................................................. –0.3V to 6V

(Note 1)

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3103EDD#PBF LTC3103EDD#TRPBF LFXH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C

LTC3103IDD#PBF LTC3103IDD#TRPBF LFXH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C

LTC3103EMSE#PBF LTC3103EMSE#TRPBF LTFXJ 10-Lead Plastic MSOP –40°C to 125°C

LTC3103IMSE#PBF LTC3103IMSE#TRPBF LTFXJ 10-Lead Plastic MSOP –40°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the full operating

junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 10V unless otherwise noted.

TOP VIEW

GND

DD PACKAGE

10-LEAD (3mm × 3mm) PLASTIC DFN

1MODE

RUN

VCC

VIN

BST

GND

PGOOD

TJMAX = 125°C, θJA = 58°C/W, θJC = 10°C/W

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

VIN

BST

GND

PGOOD

MODE

RUN

VCC

TOP VIEW

GND

MSE PACKAGE

10-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 40°C/W, θJC = 5.0°C/W

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

PIN CONFIGURATION

Operating Junction Temperature Range

(Notes 2, 3) ............................................ –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

MSE Only .......................................................... 300°C

PARAMETER CONDITIONS MIN TYP MAX UNITS

Step-Down Converter

Input Voltage Range l2.5 15 V

Input Undervoltage Lockout Threshold VIN Rising

VIN Rising, TJ = 0°C to 85°C (Note 4)

l2.1

2.1

2.6

2.5

Input Undervoltage Lockout Hysteresis (Note 4) 0.4 V

LTC3103

3103f

ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the full operating

junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 10V unless otherwise noted.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3103 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3103E is guaranteed to meet specifications from

0°C to 85°C junction temperature. Specifications over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3103I is guaranteed over the full –40°C to 125°C operating junction

temperature range. The junction temperature (TJ) is calculated from the

ambient temperature (TA) and power dissipation (PD) according to the

formula:

TJ = TA + (PD)(θJA°C/W)

where θJA is the package thermal impedance. Note the maximum ambient

temperature consistent with these specifications is determined by specific

operating conditions in conjunction with board layout, the rated package

thermal resistance and other environmental factors.

Note 3: This IC includes overtemperature protection that is intended to

protect the device during momentary overload conditions. The maximum

rated junction temperature will be exceeded when this protection is active.

Continuous operation above the specified absolute maximum operating

junction temperature may impair device reliability or permanently damage

the device.

Note 4: Specification is guaranteed by design.

Note 5: The LTC3103 has a proprietary test mode that allows testing in a

feedback loop which servos VFB to the balance point for the error amplifier.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Feedback Voltage (Note 5) l0.588 0.6 0.612 V

Feedback Voltage Line Regulation VIN = 2.5V to 15V (Note 5) 0.02 0.05 %/V

Feedback Input Current (Note 5) l1 20 nA

Oscillator Frequency

TJ = 0°C to 85°C (Note 4)

l0.930

1.2

1.55

1.45

MHz

Quiescent Current, VIN—Active RUN = VIN, MODE = 0V, FB > 0.612 Nonswitching 600 µA

Quiescent Current, VIN— Sleep RUN = VIN, FB > 0.612, MODE = VIN, TJ = 0°C to 85°C (Note 4)

RUN = VIN, FB > 0.612, MODE = VIN

1.8

2.6

3.3

µA

Quiescent Current, VIN—Shutdown RUN = 0V, TJ = 0°C to 85°C (Note 4)

RUN = 0V

1.8

1.7

3.3

µA

N-Channel MOSFET Synchronous Rectifier

Leakage Current

VIN = VSW = 15V, VRUN = 0V 0.01 0.3 µA

N-Channel MOSFET Switch Leakage Current VIN = 15V, VSW = 0V, VRUN = 0V 0.01 0.3 µA

N-Channel MOSFET Synchronous

Rectifier RDS(ON)

ISW = 200mA 0.85 Ω

N-Channel MOSFET Switch RDS(ON) ISW = –200mA 0.65 Ω

Peak Current Limit l0.40 0.50 0.75 A

PGOOD Threshold FB Falling, Percentage Below FB –14 –10 –5 %

PGOOD Hysteresis Percentage of FB 2 %

PGOOD Voltage Low IPGOOD = 100µA 0.2 V

PGOOD Leakage Current VPGOOD = 5V 0.01 0.3 µA

Maximum Duty Cycle l89 92 %

Switch Minimum Off Time (tOFF(MIN)) (Note 4) 65 ns

Synchronous Rectifier Minimum On Time

(tON(MIN))

(Note 4) 70 ns

RUN Pin Threshold RUN Pin Rising l0.76 0.80 0.85 V

RUN Pin Hysteresis 0.06 V

RUN Input Current RUN = 1.2V l0.01 0.4 µA

MODE Threshold l0.5 0.8 1.2 V

MODE Input Current MODE = 1.2V 0.1 4 µA

Soft-Start Time 0.7 1.4 2.5 ms

LTC3103

3103f

TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency vs Output Current

Efficiency vs Input Voltage

(Automatic Burst Mode Operation)

Application No-Load Input Current

vs Supply Voltage (Automatic

Burst Mode Operation)

TA = 25°C unless otherwise noted

OUTPUT CURRENT (A)

EFFICIENCY (%)

100

0.0001 0.01 0.1 1

3103 G01

0.001

VIN = 4V

VIN = 7V

VIN = 10V

VIN = 15V

VOUT = 3.3V

L = 15µH

INPUT VOLTAGE (V)

EFFICIENCY (%)

3103 G02

4 6 10

100

12 14 16

VOUT = 2.2V

L = 10µH

ILOAD = 300mA

ILOAD = 100mA

ILOAD = 10mA

ILOAD = 1mA

ILOAD = 100µA

INPUT VOLTAGE (V)

1.6

INPUT CURRENT (µA)

1.9

1.8

1.7

2.0

2.1

2.2

2 4 6 8

3103 G03

10 12 14 16 18

FRONT PAGE APPLICATION

Efficiency vs Output Current

(Forced Continuous Operation)

Efficiency vs Input Voltage

(Forced Continuous Operation)

Feedback Voltage

vs Temperature

Oscillator Frequency

vs Temperature RDS(ON) vs Temperature

Application No-Load Input Current

vs Supply Voltage (Forced

Continuous Operation)

OUTPUT CURRENT (A)

EFFICIENCY (%)

100

0.0001 0.01 0.1 1

3103 G04

0.001

VIN = 3.7V

VIN = 5V

VIN = 7V

VIN = 10V

VIN = 15V

VOUT = 3.3V

L = 10µH

INPUT VOLTAGE (V)

EFFICIENCY (%)

100

711 13 15

3103 G05

5 9

VOUT = 3.3V, L = 10µH

ILOAD = 300mA

ILOAD = 100mA

ILOAD = 10mA

ILOAD = 1mA

INPUT VOLTAGE (V)

2.0

2.5

3.5

8 12

3103 G06

1.5

1.0

4 6 10 14 16

0.5

3.0

INPUT CURRENT (mA)

FRONT PAGE APPLICATION

LDO ENABLED

TEMPERATURE (°C)

–60

CHANGE IN V

(%)

0.25

0.50

0.75

100

3103 G07

–0.25

–0.50 –20–40 200 60 80 120

40 140

NORMALIZED TO 25°C

TEMPERATURE (°C)

–50

–10

FREQUENCY CHANGE (%)

–8

–4

–2

050 75

3103 G08

–6

–25 25 100 125 150

NORMALIZED TO 25°C

TEMPERATURE (°C)

–50

CHANGE IN RESISTANCE (%)

3103 G09

–10

–25 0 50

–20

–30

75 100 125

NORMALIZED TO 25°C

VIN = 10V

SYNCHRONOUS

RECTIFIER MAIN

SWITCH

LTC3103

3103f

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C unless otherwise noted

Application No-Load Input Current

vs Temperature (Automatic Burst

Mode Operation)

SW Leakage vs Temperature

Peak Current Limit Change

vs Temperature

TEMPERATURE (°C)

–50

LEAKAGE CURRENT (nA)

350

3103 G10

200

100

–25 0 50

400

300

250

150

75 100 150125

VIN = 10V

MAIN

SWITCH

SYNCHRONOUS

RECTIFIER

TEMPERATURE (°C)

–50

PEAK CURRENT LIMIT CHANGE (%)

–2.5

2.5

40 100

3103 G11

–5.0

–7.5

–10.0 –20 10 70

5.0

7.5

10.0

130

TEMPERATURE (°C)

–50

INPUT CURRENT (µA)

2.2

2.6

110

3103 G12

1.8

1.6

1.0 –10 30 70

–30 10 50 90

3.0

2.0

2.4

1.4

1.2

2.8

VIN = 10V

VOUT = 2.5V

Automatic Burst Mode Operation Forced Continuous Operation

Start-Up into Pre-Biased Output

(Automatic Burst Mode Operation)

Start-Up into Pre-Biased Output

(Forced Continuous Operation)

Start-Up from Shutdown

(Automatic Burst Mode Operation)

VOUT

50mV/DIV

AC-COUPLED

100mA/DIV

10µs/DIV 3103 G13

ILOAD = 25mA

VIN = 10V

CIN = 10µF

L = 10µH

VOUT = 2.5V

COUT = 22µF

VOUT

20mV/DIV

AC-COUPLED

100mA/DIV

1µs/DIV 3103 G14

ILOAD = 25mA

VIN = 10V

CIN = 10µF

L = 10µH

VOUT = 2.5V

COUT = 22µF

RUN

5V/DIV

VOUT

1V/DIV

PGOOD

5V/DIV

100mA/DIV

500µs/DIV 3103 G15

ILOAD = 2mA

VIN = 10V

CIN = 10µF

L = 10µH

VOUT = 2.5V

COUT = 47µF

BURST CURRENT

PULSES

SOFT-START

PERIOD

VBST REFRESH

CURRENT PULSES

RUN

5V/DIV

VOUT

1V/DIV

100mA/DIV

PGOOD

5V/DIV

500µs/DIV 3103 G16

ILOAD = 2mA

VIN = 10V

L = 10µH

VOUT = 2.5V

VBST REFRESH

CURRENT PULSES

RUN

5V/DIV

PGOOD

5V/DIV

VOUT

1V/DIV

100mA/DIV

500µs/DIV 3103 G17

ILOAD = 25mA

VIN = 10V

L = 10µH

VOUT = 2.5V

Start-Up from Shutdown

(Forced Continuous Operation)

RUN

5V/DIV

VOUT

1V/DIV

100mA/DIV

500µs/DIV 3103 G18

ILOAD = 5mA

VIN = 10V

L = 10µH

VOUT = 2.5V

SOFT-START

FOLDBACK PERIOD

LTC3103

3103f

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C unless otherwise noted

Automatic Burst Mode Threshold

vs Supply Voltage

Load Step

(Automatic Burst Mode Operation)

Load Step

(Forced Continuous Operation)

Load Regulation

(Automatic Burst Mode Operation)

Load Regulation

(Automatic Burst Mode Operation)

Load Regulation

(Automatic Burst Mode Operation)

Maximum Duty Cycle

vs Input Voltage

Minimum Input Voltage at

Maximum Duty Cycle vs Load

Current

Minimum Input Voltage at

Maximum Duty Cycle vs Load

Current

OUT

200mV/DIV

AC-COUPLED

200mA/DIV

ILOAD

200mA/DIV

200µs/DIV 3103 G19

ILOAD = LOAD STEP, 5mA TO 300mA

VIN = 10V

CIN = 10µF

L = 10µH

VOUT = 2.2V

COUT = 47µF

OUT

50mV/DIV

AC-COUPLED

100mA/DIV

ILOAD

100mA/DIV

200µs/DIV 3103 G20

ILOAD = LOAD STEP, 50mA TO 200mA

VIN = 10V

L = 10µH

VOUT = 2.5V

COUT = 22µF

INPUT VOLTAGE (V)

BURST THRESHOLD (I

LOAD

, mA)

100

140

4810

3103 G27

160

120

2 6 12 14 16

VOUT = 1.2V

VOUT = 1.8V

VOUT = 2.5V

VOUT = 3.3V

VOUT = 5V

LOAD CURRENT (mA)

2.5

INPUT VOLTAGE (V)

3.0

3.5

4.0

4.5

5.5

50 100 150 200

3103 G21

250 300

5.0

VOUT = 4.2V

VOUT = 3.3V

VOUT = 2.5V

VOUT = 2.2V

VOUT = 1.8V

VOUT = 1.5V

LOAD CURRENT (mA)

INPUT VOLTAGE (V)

50 100 150 200

3103 G22

250

300

VOUT = 12V

VOUT = 9V

VOUT = 5V

ILOAD (mA)

–2.0

CHANGE IN V

OUT

(%)

–1.5

–1.0

–0.5

0.5

1.0

10 20 30 40

3103 G23

NORMALIZED AT ILOAD = 100mA

VIN = 10V

VOUT = 5V

CFF = 12pF

COUT = 68µF

COUT = 47µF

COUT = 22µF

ILOAD (mA)

–2.0

CHANGE IN V

OUT

(%)

–1.5

–1.0

–0.5

20 40 60 80

3103 G24

0.5

1.0

10 30 50 70

NORMALIZED AT ILOAD = 100mA

VIN = 10V

VOUT = 3.3V

CFF = 12pF

COUT = 68µF

COUT = 47µF

COUT = 33µF

ILOAD (mA)

CHANGE IN V

OUT

(%)

–1.5

–1.0

–0.5

60 100

3103 G25

–2.0

–2.5

–3.0 20 40 80

0.5

1.0

NORMALIZED AT ILOAD = 100mA

VIN = 10V

VOUT = 1.8V

CFF = 12pF

COUT = 100µF

COUT = 68µF

COUT = 47µF

INPUT VOLTAGE (V)

100

5 7

3103 G26

3 4 6 8 9

MAXIMUM DUTY CYCLE (%)

IOUT = 1mA

IOUT = 300mA

LTC3103

3103f

PIN FUNCTIONS

VIN (Pin 1): Main Supply Pin. Decouple with a 10µF or

larger ceramic capacitor. The capacitor should be as close

to the part as possible.

SW (Pin 2): Switch Pin Connects to the Inductor. This pin

connects to the drains of the internal main and synchronous

power MOSFET switches.

BST (Pin 3): Bootstrapped Floating Supply for the High

Side Gate Drive. Connect to SW through a 22nF (minimum)

capacitor. The capacitor must be connected between BST

and SW and be located as close as possible to the part

as possible.

GND (Pin 4): Power Ground.

PGOOD (Pin 5): Open-drain output that is pulled to ground

when the feedback voltage falls 10% (typical) below the

regulation point, during a thermal shutdown event or if

the converter is disabled. The PGOOD output is valid 1ms

after the buck converter is enabled.

VCC (Pin 6): Internally Regulated Supply Rail. Internal

power rail regulated off of VIN to power control circuitry.

Decouple with a 1µF or larger ceramic capacitor placed

as close to the part as possible.

RUN (Pin 7): Run Pin Comparator Input. A voltage greater

than 0.84V will enable the IC. Tie this pin to VIN to enable

the IC or connect to an external resistor divider from VIN

to provide an accurate undervoltage lockout threshold.

60mV of hysteresis is provided internally.

FB (Pin 8): Feedback Input to Error Amplifier. The resis-

tor divider connected to this pin sets the buck converter

output voltage.

NC (Pin 9): No Connect Pin Must be Tied to GND.

MODE (Pin 10): Logic-Controlled Input to Select Mode

of Operation. Forcing this pin high commands high ef-

ficiency automatic Burst Mode operation where the buck

will automatically transition from PWM operation at heavy

load to Burst Mode operation at light loads. Forcing this

pin low commands low noise, fixed frequency, forced

continuous operation.

GND (Exposed Pad Pin 11): Backpad Ground Common.

This pad must be soldered to the PC board and connected

to the ground plane for optimal thermal performance.

LTC3103

3103f

BLOCK DIAGRAM

–

UVLO

IPEAK

IPEAK(REF)

TOP_ON

BOT_ON

VREF_GOOD

SHUTDOWN CONTROL

LOGIC

ANTICROSS

CONDUCT

BURST ENABLE

TSD

VREF

UVLO

VCC

OSC

IBIAS

BOOSTVCC

VCC

PRE-REG

0.8V

RUN

0.6V 0.8V

–

SD LOGIC

BST

VIN

CBST

VOUT

VCC

MODE

THERMAL

SHUTDOWN

PWM

COMP

SLEEP

COMP SLEEP

REF

GND

0.6V – 10%

PWM

–

IPEAK

COMP

–

IZERO

COMP

SLOPE COMP

0.6V

SSgm

SW 2

FB R2

3103 BD

PGOOD 5

LTC3103

3103f

OPERATION

The LTC3103 step-down DC/DC converter is capable of

supplying 300mA to the load. The output voltage is adjust-

able over a broad range and can be set as low as 0.6V.

Both the power and the synchronous rectifier switches

are internal N-channel MOSFETs. The converter uses a

constant-frequency, current mode architecture and may

be configured using automatic Burst Mode operation for

highly efficient light load operation or configured for low

noise forced conduction continuous operation where the

converter is optimized to operate over a broad range of

step-down ratios without pulse skipping. With the auto-

matic Burst Mode feature enabled the typical DC supply

current drops to only 1.8µA with no load.

Main Control Loop

During normal operation, the internal top power MOSFET

is turned on at the beginning of each cycle and turned off

when the PWM current comparator trips. The peak induc-

tor current at which the comparator trips is controlled by

the voltage on the output of the error amplifier. The FB

pin allows the internally compensated error amplifier to

receive an output feedback voltage from an external resis-

tive divider from VOUT

. When the load current increases,

the output begins to fall causing a slight decrease in the

feedback voltage relative to the 0.6V reference, this in turn

causes the control voltage to increase until the average

inductor current matches the new load current. While the

top MOSFET is off, the bottom MOSFET is turned on until

either the inductor current starts to reverse as indicated by

the current reversal comparator, IZERO, or the beginning

of the next clock cycle. IZERO is set to 40mA (typical) in

automatic Burst Mode operation and –110mA (typical) in

forced continuous mode.

Forced Continuous Mode

Grounding MODE enables forced continuous operation

and disables Burst Mode operation. At light loads, forced

continuous mode minimizes output voltage ripple and

noise but is less efficient than Burst Mode operation.

Forced continuous operation may be desirable for use in

applications that are sensitive to the Burst Mode output

voltage ripple or its harmonics. The LTC3103 offers a broad

range of possible step-down ratios without pulse skipping

but for very small step-down ratios, the minimum on-time

of the main switch will be reached and the converter will

begin turning off for multiple cycles in order to maintain

regulation.

Burst Mode Operation

Holding the MODE pin above 1.2V will enable automatic

Burst Mode operation and disable forced continuous

operation. As the load transitions current increases the

converter will automatically transition between Burst

Mode and PWM operation. Conversely the converter will

automatically transition from PWM operation to Burst

Mode operation as the load decreases. Between bursts

the converter is not active (i.e., both switches are off)

and most of the internal circuitry is disabled to reduce the

quiescent current to 1.8µA. Burst Mode entry and exit is

determined by the peak inductor current and therefore the

load current at which Burst Mode operation will be entered

or exited depends on the input voltage, the output voltage

and the inductor value. Typical curves for Burst Mode

entry threshold are provided in the Typical Performance

Characteristics section of this data sheet.

Soft-Start

The converter has an internal closed-loop soft-start circuit

with a nominal duration of 1.4ms. The converter remains

in regulation during soft-start and will therefore respond

to output load transients that occur during this time. In

addition, the output voltage rise time has minimal depen-

dency on the size of the output capacitor or load current.

Thermal Shutdown

If the die temperature exceeds 150°C (typical) the converter

will be disabled. All power devices will be turned off and

the switch node will be forced into a high impedance state.

The soft-start circuit is reset during thermal shutdown

to provide a smooth recovery once the overtemperature

condition is eliminated. If enabled, the converter will restart

when the die temperature drops to approximately 130°C.

LTC3103

3103f

OPERATION

Power Good Status Output

The PGOOD pin is an open-drain output which indicates

the output voltage status of the step-down converter. If the

output voltage falls 10% below the regulation voltage, the

PGOOD open-drain output will pull low. A built-in deglitch-

ing delay prevents false trips due to voltage transients on

load steps. The output voltage must rise 2% above the

falling threshold before the pull-down will turn off. The

PGOOD output will also pull low during overtemperature

shutdown and undervoltage lockout to indicate these fault

conditions. The PGOOD output is valid 1ms after the buck

converter is enabled. When the converter is disabled the

open-drain device is forced on into a low impedance state.

The PGOOD pull-up voltage must be below the 6V absolute

maximum voltage rating of the pin.

Current Limit

The peak inductor current limit comparator shuts off the

buck switch once the internal limit threshold is reached.

Peak switch current is no less than 400mA.

Slope Compensation

Current mode control requires the use of slope com-

pensation to prevent sub-harmonic oscillations in the

inductor current waveform at high duty cycle operation. In

some current mode ICs, current limiting is performed by

clamping the error amplifier voltage to a fixed maximum

which leads to a reduced output current capability at low

step-down ratios. Slope compensation is accomplished

on the LTC3103 internally through the addition of a com-

pensating ramp to the current sense signal. The current

limiting function is completed prior to the addition of the

compensation ramp and therefore achieves a peak inductor

current limit that is independent of duty cycle.

Short-Circuit Protection

When the output is shorted to ground, the error amplifier

will saturate high and the high side switch will turn on at

the start of each cycle and remain on until the current limit

trips. During this minimum on-time, the inductor current

will increase rapidly and will decrease very slowly during

the remainder of the period due to the very small reverse

voltage produced by a hard output short. To eliminate the

possibility of inductor current runaway in this situation, the

switching frequency is reduced to approximately 300kHz

when the voltage on FB falls below 0.3V.

BST Pin Function

The input switch driver operates from the voltage gener-

ated on the BST pin. An external capacitor between the SW

and BST pins and an internal synchronous PMOS boost

switch are used to generate a voltage that is higher than

the input voltage. When the synchronous rectifier is on

(SW is low) the internal boost switch connects one side

of the capacitor to VCC replenishing its charge. When the

synchronous rectifier is turned off the input switch is turned

on forcing SW high and the BST pin is at a potential equal

to VCC + SW relative to ground.

A comparator ensures there is sufficient voltage across

the boost capacitor to guarantee start-up after long sleep

periods or if starting up into a pre-biased output.

Undervoltage Lockout

The LTC3103 has an internal UVLO which disables the

converter if the supply voltage decreases below 2.1V

(typical), the converter will be disabled. The soft-start for

the converter will be reset during undervoltage lockout to

provide a smooth restart once the input voltage increases

above the undervoltage lockout threshold. The RUN pin

can alternatively be configured as a precise undervoltage

lockout (UVLO) on the VIN supply with a resistive divider

connected to the RUN pin.

LTC3103

3103f

APPLICATIONS INFORMATION

The basic LTC3103 application circuit is shown as the

Typical Application on the front page of this data sheet.

The external component selection is determined by the

desired output voltage, output current, desired noise im-

munity and ripple voltage requirements for each particular

application. However, basic guidelines and considerations

for the design process are provided in this section.

Inductor Selection

The choice of inductor value influences both the efficiency

and the magnitude of the output voltage ripple. Larger

inductance values will reduce inductor current ripple

and will therefore lead to lower output voltage ripple. For

a fixed DC resistance, a larger value inductor will yield

higher efficiency by lowering the peak current to be closer

to the average. However, a larger value inductor within the

same family will generally have a greater series resistance,

thereby offsetting this efficiency advantage. Given a desired

peak-to-peak current ripple, ∆IL(A), the required inductance

can be calculated via the following expression:

L≥VOUT

1.2 •∆IL

•1– VOUT

VIN









 µH

( )

A reasonable choice for ripple current is ∆IL = 120mA

which represents 40% of the maximum 300mA load

current. The DC current rating of the inductor should be

at least equal to the maximum load current plus half the

ripple current in order to prevent core saturation and loss

of efficiency during operation. To optimize efficiency the

inductor should have a low series resistance. In particularly

space restricted applications it may be advantageous to

use a much smaller value inductor at the expense of larger

ripple current. In such cases, the converter will operate

in discontinuous conduction for a wider range of output

loads and efficiency will be reduced. In addition, there is a

minimum inductor value required to maintain stability of the

current loop (given the fixed internal slope compensation).

Specifically, if the buck converter is going to be utilized at

duty cycles greater than 40%, the inductance value must

be at least LMIN as given by the following equation:

LMIN ≥ 2.5 • VOUT (µH)

Table 1 depicts the minimum required inductance for

several common output voltages using standard induc-

tor values.

Table 1. Minimum Inductance

OUTPUT VOLTAGE (V) MINIMUM INDUCTANCE (µH)

0.8 2.2

1.2 3.3

2.0 5.6

2.7 6.8

3.3 8.3

5.0 15

A large variety of low ESR, power inductors are available that

are well suited to the LTC3103 converter applications. The

trade-off generally involves PCB area, application height,

required output current and efficiency. Table 2 provides a

representative sampling of small surface mount inductors

that are well suited for use with the LTC3103. The induc-

tor specifications listed are for comparison purposes but

other values within these inductor families are generally

well suited to this application as well. Within each family

(i.e., at a fixed inductor size), the DC resistance generally

increases and the maximum current generally decreases

with increased inductance.

LTC3103

3103f

APPLICATIONS INFORMATION

Output Capacitor Selection

A low ESR output capacitor should be utilized at the buck

output in order to minimize voltage ripple. Multilayer ce-

ramic capacitors are an excellent choice as they have low

ESR and are available in small footprints. In addition to

controlling the output ripple magnitude, the value of the

output capacitor also sets the loop crossover frequency

and therefore can impact loop stability. There is both a

minimum and maximum capacitance value required to

ensure stability of the loop. If the output capacitance is

too small, the loop crossover frequency will increase to

the point where switching delay and the high frequency

parasitic poles of the error amplifier will degrade the

phase margin. In addition, the wider bandwidth produced

by a small output capacitor will make the loop more sus-

ceptible to switching noise. At the other extreme, if the

output capacitor is too large, the crossover frequency

can decrease too far below the compensation zero and

also lead to degraded phase margin. Table 3 provides a

guideline for the range of allowable values of low ESR

output capacitors assuming a feedforward capacitor is

used. See the Output Voltage Programming section for

details on selecting a feedforward capacitor. Larger value

output capacitors can be accommodated provided they

have sufficient ESR to stabilize the loop, or by increasing

the value of the feedforward capacitor in parallel with the

upper resistor divider resistor.

In Burst Mode operation, the output capacitor stores energy

to satisfy the load current when the LTC3103 is in a low

current sleep state between the burst pulses. It can take

several cycles to respond to a large load step during a sleep

period. If large transient load currents are required then

a larger capacitor can be used at the output to minimize

output voltage droop until the part transitions from Burst

Mode operation to continuous mode operation.

Note that even X5R and X7R type ceramic capacitors have

a DC bias effect which reduces their capacitance when a

DC voltage is applied. It is not uncommon for capacitors

offered in the smallest case sizes to lose more than 50%

of their capacitance when operated near their rated volt-

age. As a result it is sometimes necessary to use a larger

capacitance value or use a higher voltage rating in order to

realize the intended capacitance value. Consult the manu-

facturer’s data for the capacitor you select to be assured

of having the necessary capacitance in your application.

Table 3. Recommended Output Capacitor Limits

OUTPUT VOLTAGE (V) CMIN (µF) CMAX (µF)

0.8 22.0 220

1.2 15.0 220

2.0 12.0 100

2.7 6.8 68

3.3 4.7 47

5.0 4.7 47

Table 2. Representative Inductor Selection

PART NUMBER

VALUE

(µH)

DCR

(Ω)

MAX DC

CURRENT

(A)

SIZE (MM)

W × L × H

Coilcraft

EPL3015 6.8 0.19 1.00 3.0 × 3.0 × 1.5

LPS3314 10 0.33 0.70 3.3 × 3.3 × 1.3

LPS4018 15 0.26 1.12 4.0 × 4.0 × 1.8

Cooper-Bussman

SD3114 6.8 0.30 0.98 3.1 × 3.1 × 1.4

SD3118 10 0.3 0.75 3.2 × 3.2 × 1.8

Murata

LQH3NPN 6.8 0.20 1.25 3.0 × 3.0 × 1.4

LQH44PN 10 0.16 1.10 4.0 × 4.0 × 1.7

Sumida

CDRH3D16 6.8 0.17 0.73 3.8 × 3.8 × 1.8

CDRH3D16 10 0.21 0.55 3.8 × 3.8 × 1.8

Taiyo-Yuden

CBC3225 6.8 0.16 0.93 3.2 × 2.5 × 2.5

NR3015 10 0.23 0.70 3.0 × 3.0 × 1.5

NR4018 15 0.30 0.65 4.0 × 4.0 × 1.8

Würth

744029006 6.8 0.25 0.95 2.8 × 2.8 × 1.4

744031006 6.8 0.16 0.85 3.8 × 3.8 × 1.7

744031100 10 0.19 0.74 3.8 × 3.8 × 1.7

744031100 15 0.26 0.62 3.8 × 3.8 × 1.7

Panasonic

ELLVGG6R8N 6.8 0.23 1.00 3.0 × 3.0 × 1.5

ELL4LG100MA 10 0.20 0.80 3.8 × 3.8 × 1.8

TDK

VLF3012 6.8 0.18 0.78 3.0 × 2.8 × 1.2

VLC4018 10 0.16 0.85 4.0 × 4.0 × 1.8

LTC3103

3103f

Input Capacitor Selection

The VIN pin provides current to the power stages of the

buck converter. It is recommended that a low ESR ceramic

capacitor with a value of at least 10µF be used to bypass

the pin. These capacitors should be placed as close to

the pin as possible and should have a short return path

to the GND pin.

Output Voltage Programming

The output voltage is set by a resistive divider according

to the following formula:

VOUT =0.6V •1+R2











The external divider is connected to the output as shown

in Figure 1. Note that FB divider current is not included in

the LTC3103 quiescent current specification. For improved

transient response, a feedforward capacitor, CFF

, may be

placed in parallel with resistor R2. The capacitor modifies

the loop dynamics by adding a pole-zero pair to the loop

dynamics which generates a phase boost that can improve

the phase margin and increase the speed of the transient

response, resulting in smaller voltage deviation on load

transients. The zero frequency depends not only on the

value of the feed forward capacitor, but also on the upper

resistor divider resistor. Specifically, the zero frequency,

fZERO, is given by the following equation:

fZERO =1

2•π•R2 •CFF1

For R2 resistor values of ~1M a 12pF ceramic capacitor

will suffice, however that value may be increased or de-

creased to optimize the converter’s response for a given

set of application parameters.

Minimum Off-Time/On-Time Considerations

The maximum duty cycle is limited in the LTC3103 by the

boost capacitor refresh time, the rise/fall times of the switch

as well as propagation delays in the PWM comparator, the

level shifts and the gate drive. This minimum off time is

typically 65ns which imposes a maximum duty cycle of:

DCMAX = 1 – (f • tOFF(MIN))

where f is the 1.2MHz switching frequency and tOFF(MIN)

is the minimum off-time. If the maximum duty cycle is

surpassed, due to a dropping input voltage for example,

the output will drop out of regulation. The minimum input

voltage to avoid this dropout condition is:

VIN(MIN) =VOUT

1– f •tOFF(MIN)

( )

Conversely, the minimum on-time is the smallest duration

of time in which the buck switch can be in its “on” state.

This time is limited by similar factors and is typically 70ns.

In forced continuous operation, the minimum on-time limit

imposes a minimum duty cycle of:

DCMIN = f • tON(MIN)

where tON(MIN) is the minimum on-time. In extreme step-

down ratios where the minimum duty cycle is surpassed,

the output voltage will still be in regulation but the rectifier

switch will remain on for more than one cycle and sub-

harmonic switching will occur to provide a higher effective

duty cycle. The result is higher output voltage ripple. This is

an acceptable result in many applications so this constraint

may not be of critical importance in some cases.

Precise Undervoltage Lockout

The LTC3103 is in shutdown when the RUN pin is low and

active when the pin is higher than the RUN pin threshold.

The rising threshold of the RUN pin comparator is an

accurate 0.8V, with 60mV of hysteresis. This threshold is

enabled when VIN is above the 2.5V minimum value. If VIN

is lower than 2.5V, an internal undervoltage monitor puts

the part in shutdown independent of the RUN pin state.

The RUN pin can be configured as a precise undervoltage

lockout (UVLO) on the VIN supply with a resistive divider

CFF

3103 F01

VOUT

GND

LTC3103

Figure 1. Setting the Output Voltage

APPLICATIONS INFORMATION

LTC3103

3103f

tied to the RUN pin as shown in Figure 2 to meet specific

VIN voltage requirements. If used, note that the external

divider current is not included in the LTC3103 quiescent

current specification.

The rising UVLO threshold can be calculated using the

following equation:

VUVLO =0.8V •1+R4











APPLICATIONS INFORMATION

Internal VCC Regulator

The LTC3103 uses an internal NMOS source follower

regulator off of VIN to generate a low voltage internal rail,

VCC. The regulator is designed to deliver current only to

the internal drivers and other internal control circuits and

not to an external load. The VCC pin should be bypassed

with a 1µF or larger ceramic capacitor.

Boost Capacitor Selection

The LTC3103 uses a bootstrapped supply to power the

buck switch gate drivers. When the synchronous rectifier

turns on, an internal PMOS switch turns on synchronously

to charge the boost capacitor, CBST

, to the voltage on VCC.

For most applications a 0.022µF will suffice. The capaci-

tor should be placed as close to their respective pins as

possible.

Figure 3. PCB Layout Recommendations

1MODE

RUN

VCC

VIN

BST

GND

PGOOD KELVIN TO VOUT

3103 F03

UNINTERRUPTED GROUND PLANE

SHOULD EXIST UNDER ALL COMPONENTS

SHOWN AND UNDER THE TRACES

CONNECTING THOSE COMPONENTS

VOUT

VIA GROUND PLANE

VIN

RUN

LTC3103

GND

VIN

3103 F02

Figure 2. Setting the Undervoltage Lockout Threshold

LTC3103

3103f

TYPICAL APPLICATIONS

VIN CBST

0.022µF

BST

VIN

5V TO 9V

MODE SW

RUN

PGOOD

VCC FB

LTC3103

GND

442k

10µH VOUT

3.3V

300mA

3103 TA02a

47µF

L1: TDK VLC4018

1µF

10µF R2

CFF

12pF

Portable LF RFID Reader, Dual Lithium-Ion to 3.3V/300mA

Regulator with Ultralow IQ

Efficiency vs Output Current

12V to 2.2V/300mA Regulator with 9V Accurate UVLO Start-Up with Ramped Input Power

VIN CBST

0.022µF

BST

VIN

12V

MODE SW

RUN PGOOD

PGOOD

VCC FB

LTC3103

GND

665k

2.05M

200k

10µH VOUT

2.2V

300mA

3103 TA03a

47µF

L1: MURATA LQH44PN1

1µF

10µF R2

1.78M

CFF

12pF

LOAD CURRENT (A)

EFFICIENCY (%)

100

0.0001 0.01 0.1 1

3103 TA02b

0.001

VIN = 5V

VIN = 9V

VOUT

1V/DIV

VIN

5V/DIV

100mA/DIV

20ms/DIV 3103 TA03b

LTC3103

3103f

TYPICAL APPLICATIONS

Slolar-Powered 2.2V Supply with Li Battery Backup and Run Threshold Set to Battery Minimum Voltage

VIN

CBST

22nF

BST

MODE

RUN

PGOOD

VCC FB

LTC3103

GND

665k

3.09M

SDM20E-40C

715k

15µH VOUT

2.2V

3103 TA04

COUT

22µF

1µF

L1: COILCRAFT LP54018

CIN

10µF

CBULK

100µF

3.6V TADIRAN

AA LITHIUM

BATTERY

1.78M

CFF

22pF

3.2V RUN

THRESHOLD

4.8V, 0.5W

SOLAR PANEL

MPT4.8-150

(6.5VOC)

LTC3103

3103f

TYPICAL APPLICATIONS

5V to 1.2V/300mA Low Noise Regulator Using Forced Continuous Operation

Efficiency vs Output Current

VIN CBST

0.022µF

BST

VIN

MODE SW

RUN PGOOD

PGOOD

VCC FB

LTC3103

GND

402k

4.7µH VOUT

1.2V

300mA

3103 TA05a

10µF

L1: SUMIDA CDRH4D11NP-4R7N

1µF

10µF

OFF

402k

CFF

22pF

OUTPUT CURRENT (A)

EFFICIENCY (%)

100

0.0001 0.01 0.1 1

3103 TA05b

0.001

VIN = 2.5V

VIN = 3.3V

VIN = 5V

LTC3103

3103f

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699 Rev C)

3.00 ±0.10

(4 SIDES)

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40 ± 0.10

BOTTOM VIEW—EXPOSED PAD

1.65 ± 0.10

(2 SIDES)

0.75 ±0.05

R = 0.125

TYP

2.38 ±0.10

(2 SIDES)

106

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DD) DFN REV C 0310

0.25 ± 0.05

2.38 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.65 ±0.05

(2 SIDES)2.15 ±0.05

0.50

BSC

0.70 ±0.05

3.55 ±0.05

PACKAGE

OUTLINE

0.25 ± 0.05

0.50 BSC

PIN 1 NOTCH

R = 0.20 OR

0.35 × 45°

CHAMFER

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3103

3103f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

MSOP (MSE) 0911 REV H

0.53 ± 0.152

(.021 ± .006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.17 – 0.27

(.007 – .011)

TYP

0.86

(.034)

REF

0.50

(.0197)

BSC

1234 5

4.90 ± 0.152

(.193 ± .006)

0.497 ± 0.076

(.0196 ± .003)

REF

8910

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD

SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

0.254

(.010) 0° – 6° TYP

DETAIL “A”

GAUGE PLANE

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

0.889 ± 0.127

(.035 ± .005)

RECOMMENDED SOLDER PAD LAYOUT

1.68 ± 0.102

(.066 ± .004)

1.88 ± 0.102

(.074 ± .004)

0.50

(.0197)

BSC

0.305 ± 0.038

(.0120 ± .0015)

TYP

BOTTOM VIEW OF

EXPOSED PAD OPTION

1.68

(.066)

1.88

(.074)

0.1016 ± 0.0508

(.004 ± .002)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.05 REF

0.29

REF

MSE Package

10-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1664 Rev H)

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3103

3103f

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2011

LT 1111 • PRINTED IN USA

RELATED PARTS

TYPICAL APPLICATION

12V to 5V/300mA Regulator with High Efficiency, Ultralow IQ

(1.8µA with VOUT in Regulation, No Load)

VIN CBST

0.022µF

BST

VIN

12V

MODE SW

RUN PGOOD

VCC FB

LTC3103

GND

255k

10µH VOUT

300mA

PGOOD

3103 TA06

47µF

L1: SUMIDA CDRH4D16FB

1µF

10µF R2

1.87M

CFF

10pF

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3mm × 3mm DFN-8, MSOP-8

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ISD < 1µA, 3mm × 4mm DFN-12, SSOP-16

LTC3109 Auto-Polarity, Ultralow Voltage Step-Up Converter

and Power Manager

VIN: 0.03V to 1V, VOUT(MIN) Fixed 2.35V to 5V, IQ = 7µA,

ISD < 1µA, 4mm × 4mm QFN-20, SSOP-20

LTC4071 Li-Ion/Polymer Shunt Battery Charger System with Low

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Charger Plus Pack Protection in One IC Low Operating Current

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LTC4070 Li-Ion/Polymer Low Current Shunt Battery Charger System Selectable VFLOAT = 4.0V, 4.1V, 4.2V, Max Shunt Current = 50mA,

ICCQ = 450nA to 1.04mA, ICCQLB = 300nA, 2mm × 3mm DFN-8,

MSOP-8

LTC1877 10V, 600mA High Efficiency Synchronous Step-Down

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VIN: 2.65V to 10V, VOUT(MIN) = 0.8V, IQ = 10µA, ISD < 1µA, MSOP-8

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