DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 1
NEW Product
File Name: PTHxx010Y.pdf Rev (02): 19 Dec 2005
2YEAR WARRANTY
All specifications aretypical at nominal input, VREF =1.25 V,full load at 25 °C
Unless otherwise stated. Cin, Co1 and Co2 =typical value SPECIFICATIONS
The PTHxx010Y are a new series of non-isolated dc-dc converters designed specifically
for bus termination in DDR and QDR memory applications. Operating from either a
3.3 Vdc, 5 Vdc or 12 Vdc input, the modules generate a
VTT
output that will source or
sink up to 15 A of current to accurately track their
VREF
input.
VTT
is the required bus
termination supply voltage, and
VREF
is the reference voltage for the memory and chipset
bus receiver comparators.
VREF
is usually set to half the
VDDQ
power supply voltage.
The PTHxx010Y series employs an actively switched synchronous rectifier output to
provide state of the art stepdown switching conversion. The products are small in size
and arean ideal choice wherespace, performance and high efficiency are desired.
•VTT bus termination output (output the system VREF)
•15 A output current
•3.3 Vdc, 5 Vdc or 12 Vdc input voltage
•DDR and QDR compatible
•ON/OFF inhibit (for VTT standby)
•Under-voltage lockout
•Operating temperature range: -40 ºC to +85 ºC
•Efficiencies up to 91%
•Output overcurrent protection (non-latching, auto-reset)
•Point-of-Load-Alliance (POLA) compatible
•Available RoHS compliant
PTHxx010Y
3.3/5/12 Vin Single Output
OUTPUT SPECIFICATIONS
Output current
(over ∆VREF range) PTH03010Y and PTH05010Y ±15 A
(See Note 1) PTH12010Y ±12 A
Tracking range for VREF 0.55-1.8 Vdc
Tracking tolerance to VREF (VTT - VREF)-10 mV to +10 mV
(over line, load
and temperature)
Ripple and noise 20 MHz bandwidth 20 mV pk-pk
Load transient response 30 µs settling time
(See Note 4) Overshoot/undershoot 30 mV typ.
Output capacitance:
Non-ceramic values PTH03010Y 470 µF typ., 8,200 µF max.
(See Notes 4 and 5) PTH05010Y 470 µF typ., 8,200 µF max.
PTH12010Y 940 µF typ., 6,600 µF max.
Ceramic values PTH03010Y 200 µF typ., 300 µF max.
(See Notes 4) PTH05010Y 200 µF typ., 300 µF max.
PTH12010Y 400 µF typ., 600 µF max.
(See Note 6) ESR (non-ceramic) 4 mΩmin.
INPUT SPECIFICATIONS
Input current No load 10 mA
Input voltage range PTH03010Y 2.95-3.65 Vdc
PTH05010Y 4.5-5.5 Vdc
PTH12010Y 10.8-13.2 Vdc
Undervoltage lockout:
PTH03010Y Vin increasing 2.45 V typ., 2.80 V max.
Vin decreasing 2.20 V min., 2.40 V typ.
PTH05010Y Vin increasing 4.30 V typ., 4.45 V max.
Vin decreasing 3.40 V min., 3.70 V typ.
PTH12010Y Vin increasing 9.5 V typ., 10.4 V max.
Vin decreasing 8.80 V min., 9.0 V typ.
INPUT SPECIFICATIONS CONTD.
Input capacitance PTH03010Y and PTH05010Y 470 µF
(See Note 3) PTH12010Y 560 µF
Remote ON/OFF Positive logic
GENERAL SPECIFICATIONS
Efficiency PTH03010Y 88% typ.
Io = 10 A PTH05010Y 88% typ.
PTH12010Y 85% typ.
Insulation voltage Non-isolated
Switching frequency PTH03010Y 300-400 kHz
PTH05010Y 300-400 kHz
PTH12010Y 200-300 kHz
Approvals and EN60950
standards (pending) UL/cUL60950
Material flammability UL94V-0
Dimensions (L xWxH) 34.80 x 15.75 x 9.00 mm
1.370 x 0.620 x 0.354 in
Weight 3.7 g (0.13 oz)
MTBF Telcordia SR-332 6,000,000 hours
ENVIRONMENTAL SPECIFICATIONS
Thermal performance Operating ambient, -40 ºC to +85 ºC
(See Note 2) temperature
Non-operating -40 ºC to +125 ºC
MSL (‘Z’ suffix only) JEDEC J-STD-020C Level 3
PROTECTION
Overcurrent threshold PTH03010Y and PTH05010Y27.5 A typ.
(Auto reset) PTH12010Y 20.0 A typ.
File Name: PTHxx010Y.pdf Rev (02): 19 Dec 2005
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 2
NEW Product
NNootteess
1Rating is conditional on the module being soldered to a 4 layer PCB with
1 oz. copper. See the SOA curves or contact the factory for appropriate
derating.
2This control pin has an internal pull-up to the input voltage Vin. If it is left
open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further
information, consult Application Note 177.
3An input capacitor is required for proper operation. The capacitor must
be rated for a minimum of 800 mA rms of ripple current.
4The typical value of external output capacitance value ensures that VTT
meets the specified transient performance requirements for the memory
bus terminations. Lower values of capacitance may be possible when the
measured peak change in output current is consistently less than 3 A.
Test conditions were 15 A/µs load step, -1.5 A to +1.5 A.
PTH05010YAST
Part Number System with Options
Product Family
Point of Load Alliance
Compatible
Mounting Option (8)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
Output Current
01 = 15 A
Packaging Options
No Suffix = Trays
T = Tape and Reel (7)
Input Voltage
03 = 3.3 V, 05 = 5 V
and 12 = 12 V
Mechanical Package
Always 0
Pin Option
A= Through-Hole Std. Pin Length (0.140”)
A = Surface-Mount Tin/Lead Solder Ball
Output Voltage Code
Y = DDR Module
PTHxx010Y
3.3/5/12 Vin Single Output
OUTPUT INPUT VTT OUTPUT OUTPUT EFFICIENCY MODEL
POWER VOLTAGE RANGE CURRENT CURRENT (TYP.) NUMBER (8,9)
(MAX.) (MIN.) (MAX.)
27 W 2.95-3.65 Vdc 0.55-1.8 Vdc 0 A ±15 A 88% PTH03010Y
27 W 4.5-5.5 Vdc 0.55-1.8 Vdc 0 A ±15 A 88% PTH05010Y
21.6 W 10.8-13.2 Vdc 0.55-1.8 Vdc 0 A ±12 A 85% PTH12010Y
5This is the calculated maximum. The minimum ESR limitation will often
result in a lower value. Consult Application Note 177 for further details.
6This is the typical ESR for all the electrolytic (non-ceramic) output
capacitance. Use 7 mΩas the minimum when using max-ESR values to
calculate.
7Tape and reel packaging only available on the surface-mount versions.
8To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option ‘S’ with ‘Z’, e.g. PTHXX010YAZ. To order Pb-free (RoHS
compatible) through-hole parts replace the mounting option ‘H’ with ‘D’,
e.g. PTHXX010YAD.
9NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 3
NEW Product
File Name: PTHxx010Y.pdf Rev (02): 19 Dec 2005
EFFICIENCY (%)
3.3V
5.0V
12.0V
50
60
70
80
90
100
0 3 6 9 12 15
Vin
OUTPUT CURRENT (A)
Nat conv
100 LFM
200 LFM
0
2
4
6
8
10
12
14
16
010 20 30 40 50 60 70 80
OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (ºC)
Figure 3 - Efficiency vs Load Current
VREF = 1.25 V (See Note B)
Figure 1 - Safe Operating Area
Vin = 3.3 V, VREF = 1.25 V, Iout = 15 A (See Note A)
PTHxx010Y
3.3/5/12 Vin Single Output
NNootteess
AThe SOA curves represent the conditions at which internal components
are within the Artesyn derating guidelines.
BCharacteristic data has been developed from actual products tested at
25 °C. This data is considered typical data for the converter.
Q
1
BSS138
(Optional)
1 k
1 k
1 %
1 %
SSTL-2
Data/
Address/
Bus
V
TT
Termination Island
GND
V
in
Standby
V
DDQ
C
in
(Required)
PTHxx010Y
(Top View)
Co
1
Low-ESR
(Required) Co
2
Ceramic
(Optional)
Co
n
hf-Ceramic
V
TT
VREF
45
1
2
3
6
7
+
8910
+
Figure 4 - Standard Application
OUTPUT CURRENT (A)
Nat conv
100 LFM
200 LFM
AMBIENT TEMPERATURE (ºC)
0
2
4
6
8
10
12
010 20 30 40 50 60 70 80
14
Figure 2 - Safe Operating Area
Vin = 12 V, VREF = 1.25 V, Iout = 12 A (See Note A)
File Name: PTHxx010Y.pdf Rev (02): 19 Dec 2005
Please consult our website for the following items: 4 Application Note www.artesyn.com
Datasheet © Artesyn Technologies
®
2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module 4
NEW Product
0.070 (1.78)
(Standoff Shoulder)
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
TOP VIEW
SIDE VIEW
1.370 (34.80)
0.620
6
7
35
4
1098
1
2
MAX.
0.354 (9.00)
Host Board
(15.75)
ø
0.040 (1.02)
5 Places
0.375
(9.52)
0.125 (3.18)
0.625 (15.88)
0.125 (3.18)
(1.52)
0.060
(12.70)
0.500
(1.52)
0.060
(3.55)
0.140
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
TOP VIEW
1.370 (34.80)
0.620
6
7
35
4
10 98
1
2
(15.75)
0.375
(9.52)
0.125 (3.18)
0.625 (15.88)
0.125 (3.18)
(1.52)
0.060
(12.70)
0.500
(1.52)
0.060
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
Host Board
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
SIDE VIEW
Solder Ball
ø
0.040 (1.02)
10 Places
*After solder reflow
on customer board
0.354 (9.00)
max.*
Figure 5 - Plated Through-Hole Mechanical Drawing
Figure 6 - Surface-Mount Mechanical Drawing
PTHxx010Y
3.3/5/12 Vin Single Output
*Denotes negative logic:
Open = Normal operation
Ground = Function active
PIN CONNECTIONS
PIN NO. FUNCTION
1 Ground
2Vin
3 Inhibit*
4 N/C
5 Vo sense
6V
TT
7 Ground
8V
REF
9 N/C
10 N/C
