LT3596
8
3596fa
pin FuncTions
FB (Pin 2): Feedback Pin. This pin is regulated to the
internal bandgap voltage. The maximum buck output
voltage is set by connecting this pin to a resistor divider
from VOUT
.
EN/UVLO (Pin 4): Enable and Undervoltage Lockout Pin.
Accurate 1.5V falling threshold. UVLO threshold is pro-
grammed by using a resistor divider from VIN.
TSET (Pin 6): Thermal Regulation Pin. Programs the
LT3596 junction temperature at which LED current begins
to derate.
VREF (Pin 7): 2V Reference Output Pin. This pin sources
up to 200µA and is used to program TSET and CTRLM.
GND (Pin 9/Exposed Pad Pin 53): Ground Pin. This is
the ground for both the IC and the switching converter.
Exposed pad must be soldered to PCB ground.
NC (Pins 11, 12, 18, 22, 23, 26, 34, 35, 39, 41, 43): No
Connection Pins. Tie to ground if unused.
CTRLM (Pin 13): Master Control Pin. LED current derating
vs temperature is achievable for all channels if the voltage
on CTRLM has a negative coefficient using an external
NTC resistor divider from VREF
.
ISET1, ISET2, ISET3 (Pins 14, 15, 16): LED Current Pro-
gramming Pin. Resistor to ground programs full-scale
LED current.
RT (Pin 17): Switching Frequency Programming Pin. A
resistor to ground programs switching frequency between
200kHz and 1MHz. For the SYNC function, choose the
resistor to program a frequency 20% slower than the
SYNC pulse frequency.
VOUT (Pin 19): Buck Output. This is the buck regulator
output voltage sense into the IC.
LED1, LED2, LED3 (Pins 20, 21, 24): Constant-Current
Sink Pin. These are three LED driver outputs, each contain-
ing an open collector, constant current sink. All outputs are
matched within ±1.5% and are individually programmed
up to 100mA using an external resistor at the ISET1-3 pin.
Outputs are rated to allow a maximum VOUT of 42V. Con-
nect the cathode of the LED string to LED1-3. Connect the
anode of the LED string to VOUT
.
FAULT (25): Fault Detection Pin. Open-collector pin used
to report open LED faults. FAULT must be externally pulled
to a positive supply.
SYNC (Pin 27): External Clock Synchronization Pin. When
an external clock drives this pin, the buck regulator is
synchronized to that frequency. Frequency programmed
by the RT pin resistor must be at least 20% slower than
the SYNC pin clock frequency.
PWM1, PWM2, PWM3 (Pins 30, 29, 28): PWM Dimming
Control Pin. When driven to a logic high, the LED1-3 current
sink is enabled. Channels can be individually disabled by
tying PWM1-3 to ground. If PWM dimming is not desired
then the pin should be connected to VREF
.
CTRL1, CTRL2, CTRL3 (Pins 33, 32, 31): Analog Dimming
Control Pin. This pin is used to dim the LED current in an
analog fashion. If the pin is tied to a voltage lower than
1.0V, it will linearly reduce the LED current. If unused the
pin must be connected to VREF
.
BIAS (37): Supply Pin. This pin is the supply for an internal
voltage regulator for analog and digital circuitry. BIAS must
be locally bypassed with a 4.7µF capacitor.
DA (44): Catch Diode Anode. This pin is used to provide
frequency foldback in extreme situations.
BOOST (Pin 46): Boost Capacitor Pin. This pin is used to
provide a voltage above the input voltage when the switch
is on. It supplies current to the switch driver.
SW (Pin 48): Switch Pin. Connect the inductor, catch diode
and boost capacitor to this pin.
VIN (Pins 50, 51): Input Supply Pins. Pins are electrically
connected inside the package. VIN must be locally bypassed
with a 10µF capacitor to ground.