VNQ600AP-E Quad channel high side driver Datasheet - production data Thermal shutdown Current limitation Very low standby power dissipation Protection against: loss of ground and loss of VCC Reverse battery protection In compliance with the 2002/95/EC european directive 62 GRXEOHLVODQG *$3*36 Description Features Type RDS(on)(1) Ilim VCC VNQ600AP-E 35 m 25 A 36 V 1. Per each channel DC short circuit current: 25 A CMOS compatible inputs Proportional load current sense Undervoltage and overvoltage shutdown Overvoltage clamp The VNQ600AP-E is a quad HSD formed by assembling two VND600-E chips in the same SO-28 package. The VND600-E is a monolithic device designed in| STMicroelectronics VIPower M0-3 Technology. The VNQ600AP-E is intended for driving any type of multiple loads with one side connected to ground. This device has four independent channels and four analog sense outputs which deliver currents proportional to the outputs currents. Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. Device automatically turns off in case of ground Table 1. Device summary Order codes Package SO-28 February 2015 This is information on a product in full production. Tube Tape and reel VNQ600AP-E VNQ600APTR-E DocID10873 Rev 5 1/27 www.st.com Contents VNQ600AP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 14 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 Microcontroller I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 19 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 5 2/27 SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DocID10873 Rev 5 VNQ600AP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (9 V< VCC< 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DocID10873 Rev 5 3/27 3 List of figures VNQ600AP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. 4/27 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching characteristics (resistive load RL= 2.6 ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms (per each chip). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 21 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal fitting model of a quad channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-28 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID10873 Rev 5 VNQ600AP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 9&& /6%26/,4!'% 5.$%26/,4!'% $%-!' '5,9(5 287387 ,1387 ,/,0 /2*,& ,287 ,1387 . &855(17 6(16( $%-!' *1' '5,9(5 287387 ,/,0 /6%24%-0 ,287 /6%24%-0 . /6%26/,4!'% &855(17 6(16( 9&& 5.$%26/,4!'% $%-!' '5,9(5 287387 ,1387 ,/,0 /2*,& ,287 ,1387 . &855(17 6(16( $%-!' '(0$* *1' '5,9(5 287387 ,/,0 /6%24%-0 /6%24%-0 ,287 . &855(17 6(16( *$3*36 DocID10873 Rev 5 5/27 26 Block diagram and pin description VNQ600AP-E Figure 2. Configuration diagram (top view) 9&& 9&& *1' 287387 ,1387 287387 ,1387 287387 &855(176(16( 287387 &855(176(16( 287387 9&& 287387 9&& 287387 *1' 287387 ,1387 287387 ,1387 287387 &855(176(16( 287387 &855(176(16( 287387 9&& 9&& *$3*36 Table 2. Suggested connections for unused and not connected pins 6/27 Connection/pin Current sense N.C. Output Input Floating Not allowed X X X To ground Through 1 kresistor X Not allowed Through 10 kresistor DocID10873 Rev 5 VNQ600AP-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions ,6 ,6 9&& 9&& 9&& 9) 9&& ,,1 ,6(16( 9,1 ,,1 96(16( ,6(16( 9,1 96(16( 9,1 ,,1 ,6(16( 96(16( ,,1 9,1 ,6(16( 96(16( ,1387 ,287 &856(16( 287387 9287 ,287 ,1387 287387 &856(16( 9287 ,287 ,1387 &856(16( 287387 ,287 ,1387 &856(16( *1' 287387 ,*1' 9287 9287 *1' ,*1' *$3*36 1. VFn = VCCn - VOUTn during reverse battery condition 2.1 Absolute maximum ratings Table 3. Absolute maximum rating Symbol Parameter Value Unit 41 V -0.3 V VCC Supply voltage (continuous) -VCC Reverse supply voltage (continuous) IOUT Output current (continuous), for each channel 15 A IR Reverse output current (continuous), for each channel -15 A IIN Input current 10 mA -3 +15 V V VCSENSE Current sense maximum voltage IGND Ground current at Tpins < 25 C (continuous) -200 mA VESD Electrostatic discharge (Human Body Model: R=1.5 K C=100 pF) - Input - Current Sense - Output - VCC 4000 2000 5000 5000 V V V V EMAX Maximum switching energy (L=0.11 mH; RL=0 ; Vbat=13.5 V; Tjstart=150 C; IL=40 A) 126 mJ Power dissipation (per island) at Tlead=25 C 6.25 W Ptot DocID10873 Rev 5 7/27 26 Electrical specifications VNQ600AP-E Table 3. Absolute maximum rating (continued) Symbol Tj Tstg 2.2 Parameter Junction operating temperature Storage temperature Value Unit Internally limited C -55 to 150 C Thermal data Table 4. Thermal data (per island) Symbol Parameter Value Unit 15 C/W Rthj-lead Thermal resistance Junction-lead (max) Rthj-amb Thermal resistance Junction-ambient (one chip on max) 60(1) 44(2) C/W Thermal Resistance Junction-ambient (two chips on max) 46(1) 31((2)) C/W Rthj-amb 2 1. When mounted on a standard single-sided FR-4 board with 0.5 cm of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2.3 Electrical characteristics Values specified in this section are for 8 V< VCC < 36 V; -40 C < Tj < 150 C, unless otherwise specified. Table 5. Power Symbol Parameter VCC(1) VUSD VOV (1) (1) RON Vclamp IS(1) IL(off1) 8/27 Test conditions Min. Typ. Max. Unit Operating supply voltage 5.5 13 36 V Undervoltage shutdown 3 4 5.5 V Overvoltage shutdown 36 - - V - - 35 70 120 m m m 41 48 55 V 12 40 A 12 25 A 6 mA 50 A On-state resistance IOUT1,2,3,4 = 5 A; Tj = 25 C IOUT1,2,3,4 = 5 A; Tj = 150 C IOUT1,2,3,4 = 3 A; VCC = 6 V Clamp voltage ICC=20 mA(2) Supply current Off-state; VCC = 13 V; VIN = VOUT = VSENSE = 0 V Off-state; VCC = 13 V; VIN = VOUT = VSENSE = 0 V; Tj =25 C On-state; VCC =13 V; VIN=5 V; IOUT=0 A; RSENSE=3.9 K VSENSE=0 V - VIN=VOUT=VSENSE=0V 0 Off-state output current DocID10873 Rev 5 - VNQ600AP-E Electrical specifications Table 5. Power (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit IL(off3) Off-state output current VIN=VOUT=VSENSE=0 V; VCC=13 V; Tj =125 C - - 5 A IL(off4) Off-state output current VIN=VOUT=VSENSE=0 V; VCC=13 V; Tj =25 C - - 3 A Min. Typ. Max. Unit 1. Per island 2. Vclamp and VOV are correlated. Typical difference is 5 V. Table 6. Switching (VCC=13 V) Symbol Parameter Test conditions tD(on) Turn-on delay time RL=2.6 channels 1,2,3,4 (see Figure 4) - 40 - s tD(off) Turn-off delay time RL=2.6 channels 1,2,3,4 (see Figure 4) - 40 - s - See relative diagra m - Vs - See relative diagra m - Vs Min. Typ. Max. Unit - - 0.6 V Min. Typ. Max. Unit (dVOUT/dt)on Turn-on voltage slope RL=2.6 channels 1,2,3,4 (see Figure 4) (dVOUT/dt)off Turn-off voltage slope RL=2.6 channels 1,2,3,4 (see Figure 4) Table 7. VCC - output diode Symbol VF Parameter Forward on voltage Test conditions -IOUT=2.3 A; Tj=150 C Table 8. Logic input Symbol Parameter Test conditions VIL Low level input voltage - - 1.25 V VIH High level input voltage 3.25 - - V VI(hyst) Input hysteresis voltage 0.5 - - V IIL Low level input current VIN = 1.25 V 20 65 - A IIh High level input current VIN = 3.25 V - 75 110 A Input clamp voltage IIN = 1 mA IIN = -1 mA 6 6.8 -0.7 8 V V VICL DocID10873 Rev 5 9/27 26 Electrical specifications VNQ600AP-E Table 9. Protections Symbol Ilim TTSD TR Thyst Vdemag VON Note: Parameter Min. Typ. Max. Unit 25 40 70 70 A A Thermal shutdown temperature 150 175 200 C Thermal reset temperature 135 - - C 7 15 - C DC short circuit current Test conditions VCC=13 V 5.5 V8 V; IOUT1,2=4 A; RSENSE=10 K VSENSEH Analog sense output voltage in over temperature condition VCC=13 V; RSENSE=3.9 K RVSENSEH Analog sense output impedance in over temperature condition Current sense delay response tDSENSE 2 Unit V - - - 5 - V VCC=13 V; Tj>TTSD; All channels open - 400 - to 90% ISENSE(2) - - 500 s 1. See Figure 7. 2. Current sense signal delay after positive input slope. 10/27 Min. DocID10873 Rev 5 4 V VNQ600AP-E Electrical specifications Table 11. Truth table Conditions Input Output Sense Normal operation L H L H 0 Nominal Over temperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Overvoltage L H L L 0 0 Short circuit to GND L H H L L L 0 (TjTTSD) VSENSEH Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp L L 0 Table 12. Electrical transient requirements (part 1/3) Test level ISO T/R 7637/1 test pulse I II III IV Delays and impedance 1 -25 V -50 V -75 V -100 V 2 ms, 10 2 +25 V +50 V +75 V +100 V 0.2 ms, 10 3a -25 V -50 V -100 V -150 V 0.1 s, 50 3b +25 V +50 V +75 V +100 V 0.1 s, 50 4 -4 V -5 V -6 V -7 V 100 ms, 0.01 5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Table 13. Electrical transient requirements (part 2/3) Test levels result ISO T/R 7637/1 test pulse I II III IV 1 C C C C 2 C C C C 3a C C C C 3b C C C C 4 C C C C 5 C E E E DocID10873 Rev 5 11/27 26 Electrical specifications VNQ600AP-E Table 14. Electrical transient requirements (part 3/3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Figure 4. Switching characteristics (resistive load RL= 2.6 ) 9287 G9287 GW RII G9287 GW RQ WU WI W ,6(16( ,1387 W W'6(16( WG RQ WG RII W *$3*36 12/27 DocID10873 Rev 5 VNQ600AP-E Electrical specifications Figure 5. Waveforms (per each chip) 1250$/23(5$7 ,21 ,1387Q /2$'&855(17 Q 6(16( Q 81'(592/7$*( 9&& 986'K \ VW 986' ,1387Q /2$'&855(17 Q 6(16( Q 29(592/7$*( 92 9 9&& 9&& 92 9 9&& !92 9 ,1387Q /2$'&855(17 Q 6(16( Q 6+25772*5281' ,1387Q /2$'&855(17 Q /2$'92/7$*(Q 6(16( Q 6+257729 && ,1387Q /2$'92/7$*(Q /2$'&855(17 Q 6(16( Q 7M 1RPLQDO 776' 75 1RPLQDO 29(57(03(5$785( ,1387Q /2$'&855(17 Q 6(16( Q ,6(16( 96(16(+ 56(16( *$3*36 DocID10873 Rev 5 13/27 26 Application information 3 VNQ600AP-E Application information Figure 6. Application schematic 9 5SURW ,1387 9&& 9&& 'OG 5SURW &6(16( 5SURW ,1387 5SURW &6(16( 287387 ,1387 287387 287387 & 5SURW 5SURW 5SURW &6(16( 287387 ,1387 5SURW &6(16( *1' *1' 5*1' 56(16( 9*1' '*1' *$3*36 Note: Channels 3 and 4 have the same internal circuit as channel 1 and 2 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND 600 mV / 2(IS(on)max) 2. RGND VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output 14/27 DocID10873 Rev 5 VNQ600AP-E Application information values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1 k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift ( 600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in input line is also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. Safest configuration for unused input pin is to leave it unconnected, while unused sense pin has to be connected to ground pin. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table. 3.3 Microcontroller I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/O pins from latching up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Example For the following conditions: VCCpeak= -100 V Ilatchup 20 mA VOHC 4.5 V 5 k Rprot 65 k. Recommended values are: Rprot =5 k DocID10873 Rev 5 15/27 26 Application information VNQ600AP-E Figure 7. IOUT/ISENSE versus IOUT 16/27 DocID10873 Rev 5 VNQ600AP-E 3.4 Application information Electrical characteristics curves Figure 8. Off-state output current Figure 9. High level input current ,LK $ ,/ RII $ 2IIVWDWH 9FF 9 9LQ 9RXW 9 9LQ 9 7F & 7F & *$3*36 Figure 10. Input clamp voltage *$3*36 Figure 11. Input high level 9LK 9 9LFO 9 ,LQ P$ 7F & Figure 12. Input low level 7F & *$3*36 *$3*36 Figure 13. Input hysteresis voltage 9LO 9 9K\VW 9 7F & *$3*36 DocID10873 Rev 5 7F & *$3*36 17/27 26 Application information VNQ600AP-E Figure 14. Overvoltage shutdown 9RY 9 Figure 15. ILIM vs Tcase ,OLP $ 9FF 9 *$3*36 *$3*36 Figure 16. Turn-on voltage slope Figure 17. Turn-off voltage slope G9RXWGW RQ 9PV G9RXWGW RII 9PV 9FF 9 5O 2KP 9FF 9 5O 2KP 7F & *$3*36 Figure 19. On-state resistance vs VCC 5RQ P2KP 7F & 5RQ P2KP ,RXW $ 9FF 9 9 *$3*36 Figure 18. On-state resistance vs Tcase ,RXW $ 7F & 7F & 7F & 7F & 18/27 7F & 7F & *$3*36 DocID10873 Rev 5 9FF 9 *$3*36 VNQ600AP-E 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 20. Maximum turn-off current versus load inductance ,/0$; $ $ % & / P+ *$3*36 Legend: A = Single Pulse at TJstart = 150 C B = Repetitive pulse at TJstart = 100 C C = Repetitive Pulse at TJstart = 125 C Conditions: VCC = 13.5 V Values are generated with RL = 0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 21. Demagnetization 9,1,/ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ W *$3*36 DocID10873 Rev 5 19/27 26 Package and PCB thermal data VNQ600AP-E 4 Package and PCB thermal data 4.1 SO-28 thermal data Figure 22. SO-28 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 m, Copper areas: 0.5 cm2, 3 cm2, 6 cm2). Table 15. Thermal calculation according to the PCB heatsink area Chip 1 Chip 2 Tjchip1 Tjchip2 Note On Off RthA x Pdchip1 + Tamb RthC x Pdchip1 + Tamb Off On RthC x Pdchip2 + Tamb RthA x Pdchip2 + Tamb On On RthB x (Pdchip1 + Pdchip2) + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb On On (RthA x Pdchip1) + RthC x Pdchip2 + Tamb (RthA x Pdchip2) + RthC x Pdchip1 + Tamb Pdchip1Pdchip2 Pdchip1=Pdchip2 RthA = Thermal resistance Junction to Ambient with one chip on RthB = Thermal resistance Junction to Ambient with both chips on and Pdchip1=Pdchip2 RthC = Mutual thermal resistance 20/27 DocID10873 Rev 5 VNQ600AP-E Package and PCB thermal data Figure 23. Rthj-amb Vs PCB copper area in open box free air condition 57+MBDP E &: 5WK$ 5WK% 5WK& 3&%&XKHDWVLQNDUHD FP A LVODQG *$3*36 Figure 24. Thermal impedance junction ambient single pulse =WK &: FP ALV ODQG FP ALV ODQG FP ALV ODQG 2QHFKDQQHO21 7ZRFKDQQHOV 21RQVDPHFKLS WLPH V DocID10873 Rev 5 *$3*36 21/27 26 Package and PCB thermal data VNQ600AP-E Equation 1: pulse calculation formula Z TH = R TH + Z THtp 1 - where = t p T Figure 25. Thermal fitting model of a quad channel HSD in SO-28 7MB 3 G 7MB & & & & & & 5 5 5 5 5 5 & & & & 5 & 5 3 G 5 7MB 5 & & & 5 5 5 3 G 7MB 3 G & 5 5 5 5 & 5 7 BD P E *$3*36 Table 16. Thermal parameter 22/27 Area/island (cm2) 0.5 6 R1=R7=R13=R15 (C/W) 0.05 - R2=R8=R14=R16 (C/W) 0.3 - R3=R9 (C/W) 3.4 - R4=R10 (C/W) 11 - R5=R11 (C/W) 15 - R6=R12 (C/W) 30 13 C1=C7=C13=C15 (W.s/C) 0.001 - C2=C8=C14=C16 (W.s/C) 5.00E-03 - C3=C9 (W.s/C) 1.00E-02 - C4=C10 (W.s/C) 0.2 - C5=C11 (W.s/C) 1.5 - C6=C12 (W.s/C) 5 8 R17=R18 (C/W) 150 - DocID10873 Rev 5 VNQ600AP-E 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. SO-28 package information Figure 26. SO-28 package outline ' % GGG F $ $ K[ & 6($7,1* 3/$1( & PP *$*(3/$1( 3,1 ,'(17,),&$7,21 N $ ( + 5.1 / H *$3*36 Table 17. SO-28 mechanical data Dimensions Ref. Millimeters Min. Typ. Max. A 2.35 2.65 A1 0.10 0.30 B 0.33 0.51 C 0.23 0.32 D(1) 17.70 18.10 DocID10873 Rev 5 23/27 26 Package information VNQ600AP-E Table 17. SO-28 mechanical data Dimensions Ref. Millimeters Min. E Typ. 7.40 e 7.60 1.27 H 10.0 10.65 h 0.25 0.75 L 0.40 1.27 k 0 8 ddd 0.10 1. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 24/27 Max. DocID10873 Rev 5 VNQ600AP-E 5.2 Package information SO-28 packing information Figure 27. SO-28 tube shipment (no suffix) & % %DVH4W\ %XON4W\ 7XEHOHQJWK $ % & $OOGLPHQVLRQVDUHLQPP $ *$3*36 Figure 28. SO-28 tape and reel shipment (suffix "TR") DocID10873 Rev 5 25/27 26 Package information 5.3 VNQ600AP-E Revision history Table 18. Document revision history Date Revision 01-Oct-2004 1 Initial release. 08-Jun-2009 2 Features: - Changed Ilim value from 22 A to 25 A - Changed DC short circuit current value from 22 A to 25 A Table 9: changed Ilim min value from 22 A to 25 A 15-Oct-2009 3 Updated Figure 2: Configuration diagram (top view). 20-Sep-2013 4 Updated Disclaimer. 6 Updated: - Section 5.1: SO-28 package information; - Tape dimensions in Figure 28: SO-28 tape and reel shipment (suffix "TR") on page 25. 18-Feb-2015 26/27 Changes DocID10873 Rev 5 VNQ600AP-E IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2015 STMicroelectronics - All rights reserved DocID10873 Rev 5 27/27 27