Data Sheet
August 29, 2012
QBDW033A0B Series Power Modules; DC-DC Conver t e rs
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
^ PMBus name and logo are registered trademarks of SMIF, Inc.
*
UL is a registered trademark of Underwriters Laboratories, Inc.
†
CSA is a registered trademark of Canadian Standards Association.
‡
VDE is a trademark of Verband Deutscher Elektrotechniker e.V.
§ This product is intende d for integration into end
-user equipment . All of the required procedures of end-use equipment should be followed.
¤ IEEE and 802 are registered trademarks of the Institute of Electrical and Electronics Engineers, Incorporated.
** ISO is a registered trademark of the International Or ganization of Standards..
Document No: DS10-006 ver 1.31
PDF Name:
QBDW033A0B.pdf
BARRACUDA SERIES™
Features
Compliant to RoHS EU Directive 2002/95/EC (-Z versions )
High and flat efficiency profile >95.3% at 12Vdc,
30% to 100% rated output
Wide input voltage range: 36-75Vdc
Delivers up to 33Adc output current
Remote sense and output voltage trim
Fully very tightl y regulated out put voltage
Output voltage adjust: 8. 1Vdc to 13.2V dc
Low output ripple and noise
Industry standard, DOSA compliant, Quarter brick:
58.4 mm x 36.8 mm x 11.7 mm
(2.30 in x 1.45 in x 0.46 in)
Constant switc hing frequency
Positive remote O n/Of f l ogic
Output over current/vol t age protecti on
Digital i nterface with P MBus™ Rev.1.2 compliance^
Over temperature protection
Wide operating temperat ure range (-40°C to 85°C)
UL* 60950-1, 2nd Ed. Recognized, C S A† C 22.2 No.
60950-1-07 Certi fied, and VDE‡ (EN6095 0-1, 2nd
Ed.) Licensed
CE mark 2006/96/EC directives§
Meets the voltage and current requirem ents for ETSI 300-
132-2 and complies with and licensed for Basic insulation
rating per EN60950-1
2250 Vdc Isolation test ed in compliance with IEEE 802.3 ¤
PoE standards
ISO** 9001 and ISO14001 certified manufacturing facilities
Applications
Distributed power architectures
Intermedi at e bus voltage applic ations
Servers and storage applicat i ons
Networking equipm ent i ncludi ng Power over Ethernet (PoE)
Fan assemblies other systems requiring a ti ghtly regulated
output voltage
Options
Negative Remote On/Off logic (1=option code, factory
preferred)
Auto-restart after fault s hutdown (4=option c ode, factory
preferred)
Base plate option (-H=option code)
Passive Droop Load Sharing (-P=option code)
Description
The QBDW033A0B series of dc-dc converters are a new generation of DC/DC power modules designed to support
9.6 -12Vdc intermediate bus applications where multiple low voltages are subsequently generated using point of load
(POL) converters, as well as other application requiring a tightly regulated output voltage. The QBDW033A0B series
operate from an input voltage range of 36 to 75Vdc and provide up to 33A out put curr e nt at output voltages from
8.1Vdc to 12Vdc, and 400W output power from output voltages of 12.1Vdc to 13.2Vdc in a DOSA standard quarter brick.
The converter in corporates dig ital con trol, synchronous rectification technology, a fully regulated control topology, and
innovative packaging techniques to achieve efficiency exceeding 96% peak at 12Vdc output. This leads to lower
power dissipations such that for many applications a heat sink is not required. Standard features include output
voltage trim, remote sense, on/off control, output overcurrent and over voltage protection, over temperature
protection, input under and over voltage lockout, power good signal and PMBus interface.
The output is fully isolated from the input, allowing versatile polarity configurations and grounding connections. Built-
in filtering for both input and output minimizes the need for external filtering.
RoHS Compliant
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
Absolute Maxim um Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute
stress ratings only, functional operation of the device is not implied at these or any other conditions in excess of those
given in the operations sections of the Data Sheet. Exposure to absolute maximum ratings for extended periods can
adversely affect device reliability.
Parameter
Device
Symbol
Min
Max
Unit
Input Voltage*
Continuous VIN -0.3 75 Vdc
Operating transient ≤ 100mS 100 Vdc
Non- operating continuous VIN 80 100 Vdc
Operating Ambient Temperature
All
TA
-40
85
°C
(See Thermal Considerations section)
Logic Pin Voltage (to SIG_GND or V
O
(-))
TRIM/C1, C2, ADDR0, ADDR1, CLK, DATA, SMBALERT All Vpin -0.3 3.6 Vdc
Storage Temperature All Tstg -55 125 °C
I/O Isolation Voltage (100% factory Hi-P ot test ed) All
2250 Vdc
* Input over voltage protection will shutdown the output voltage when the input voltage exceeds threshold level.
Electri cal Sp ec i fi cat i o ns
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature
conditions.
Parameter Device Symbol Min Typ Max Unit
Operating Input Voltage
VIN
36
48
75
Vdc
Maximum Input Current
IIN,max - - 12 Adc
(VIN=0V to 75V, IO=IO, max)
Input No Load Current All IIN,No load 80 mA
(VIN = VIN, nom, IO = 0, module enabled)
Input Stand-by Current All IIN,stand-by 22 mA
(VIN = VIN, nom, module disabled)
External Input Capacitance All 100 - - μF
Inrush Transient All I2t - - 1 A2s
Input Reflected Ripple Current, peak-to-peak
(5Hz to 20MHz, 12μH source impedance; VIN=
48V, IO= IOmax ; see Figure 10) All - 40 - mAp-p
Input Ripple Rejection (120Hz) All - 25 - dB
CAUTION: This power module is not i n ternally fused. An input line fuse must always be used.
This power module can be used in a wide variety of applications, ranging from simple standalone operation to an
integrated part of sophisticated power architecture. To preserve maximum flexibility, internal fusing is not included,
however, to achieve maximum safety and system protection, always use an input line fuse. The safety agencies require a
fast-acting fuse with a maximum rating of 30 A (see Safety Considerations section). Based on the information provided in
this Data Sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be used.
Refer to the fuse manufacturer’s Data Sheet for furth er infor mati on.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
3
Electri cal Sp ec i fi cat i o ns (continued)
Parameter Device Symbol Min Typ Max Unit
Output Voltage Set-point (Default)
(VIN=VIN,nom, IO=16.5A, TA =25°C)
(Adjustable via PMBus)
All VO, set 11.97 12.00 12.03 Vdc
Output Voltage Variatio n from D efault
(Over all operating input voltage (40V to 75V),
resistive load, and temperature conditions until
end of life)
All w/o -P VO 11.76 12.24 Vdc
-P Option VO 11.63 12.37 Vdc
Output Voltage (VIN=3 6V, TA = 25ºC) All VO 11.00 Vdc
Output Regulation [V
IN, min
= 40V]
Line (VIN= VIN, min to VIN, max) All 0.2 % VO, set
Load (IO=IO, min to IO, max) All w/o -P 0.2 % VO, set
Load (IO=IO, min to IO, max), Intentional Droop -P Option 0.50 Vdc
Temperature (TA = -40ºC to +85ºC) All 2 % VO, set
Output Ripple and Noise on nomina l out put
(VIN=VIN, nom and IO=IO, min to IO , max)
RMS (5Hz to 20MHz bandwidth) All 70 mVrms
Peak-to-Peak (5Hz to 20MHz bandwidth) All 200 mVpk-pk
External Output Capacitance
For CO >5000uF, IO must be < 50% IO, max during
Trise.
All CO, max 0 10,000 μF
Output Current
All
IO
0
33
Adc
VOUT_OC_FAULT_LIMIT (Default)
(Adjustable via PMBus)
All IO,lim 40 Adc
Efficiency
VIN=VIN, nom, TA=25°C
IO=100% IO, max, VO= VO,set
All
η
95.3
%
IO=40% IO, max to 75% IO, max , VO= VO,set
All
η
95.8
%
Switching Frequency fsw 150 kHz
Dynamic Load Response
dI
O
/d
t
=1A/10µs; V
in
=V
in
,
nom
; T
A
=25°C;
(Tested with a 1.0μF ceramic, a 10μF tantalum,
and 470μF capacitor and across the load.)
Load Change from I
O
= 50% to 75% of I
O,max
:
Peak Deviation
Settling Time (VO <10% peak deviatio n)
All Vpk
ts
__ 500
700
__ mVpk
µs
Load Change from IO = 75% to 50% of IO,max:
Peak Deviation
Settling Time (VO <10% peak deviatio n) All
Vpk
ts
__
__
500
700 __
mVpk
µs
Isolation Specifications
Parameter
Symbol
Min
Typ
Max
Unit
Isolation Capacitance
Ciso
1000
pF
Isolation Resistance
Riso
10
MΩ
General Specifications
Parameter
Symbol
Device
Typ
Unit
Calculated Reliability Based upon Telcordia SR-
332 Issue 2: Method I, Case 3, (IO=80%IO, max,
TA=40°C, Airflow = 200 LFM), 90% confidence
MTBF All 3,108,685 Hours
FIT All 321.7 10
9
/Hours
Weight – Open Frame
47.4 (1.67)
g (oz.)
Weight – with Base plate option
66.4 (2.34)
g (oz.)
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
4
Feature Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature
conditions. See Feature Descriptions for additional information.
Parameter
Device
Symbo
l
Min
Typ
Max
Unit
Remote On/Off Signal Interface
(V
IN
=V
IN, min
to V
IN, max
, Signal referenced to V
IN-
terminal)
Negative Logic: device code suffix “1”
Logic Low = module On, Logic High = module
Positive Logic: No device code suffix required
Logic Low = module Off, Logic High = module
On
Logic Low Specification
On/Off Thresholds:
Remote On/Off Current – Logic Low (Vin =100V) All Ion/off 280 310 μA
Logic Low Voltage All Von/off -0.3 0.8 Vdc
Logic High Voltage – (Typ = Open Collector) All Von/off 2.0 14.5 Vdc
Logic High maximum allowable leakage current
(Von/off = 2.0V)
All Ion/off 10 μA
Maximum voltage allowed on On/Off pin All Von/off 14.5 Vdc
TON_DELAY and TON_RISE (IO=IO, max)
(Adjustable via PMBus)
T
delay
=Time until V
O
= 10% of V
O,set
from either
application of Vin with Remote On/Off set to On
(Enable with Vin); or operation of Remote On/Off
from Off to On with Vin already applied for at
least 150 milli-secon ds (Enable with on/off).
* Increased Tdelay due to startup for parallel
modules.
All w/o -P
T
delay, Enable
with Vin
150 ms
All w/o-P
T
delay,
Enable
with on/off
10 ms
w/ -P
T
delay
,
Enable with Vi n
180* ms
w/ -P Tdelay, Enable
with on/off
40* ms
T
rise
=Time for V
O
to rise from 1 0% to 90% of
VO,set, For CO >5000uF, IO must be < 50% IO, max
during Trise.
* Increased Trise when Vo exists at startup for
parallel module s.
All w/o -P Trise
15 ms
w/ -P Trise
300* ms
Load Sharing Current Balance
(difference in output current across all modules
with outputs in parallel, no load to full load)
-P Option Idiff 3 A
Remote Sense Range All VSense
0.5 Vdc
VOUT_COMMAND
(Adjustable via PMBus)
All VO, set 8.1 13.2 Vdc
VOUT_OV_FAULT_LIMIT
(Adjustable via PMBus)
All VO,limit
V
O,set-
+2.5V
V
O,set-
+5.0V
Vdc
OT_FAULT_LIMIT
(Adjustable via PMBus)
All Tref 140 °C
Input Undervoltage Lockout
(Adjustable via PMBus)
VIN_ON 33 35 36 Vdc
VIN_OFF 31 33 34 Vdc
Input Overvoltage Lockout
(Adjustable via PMBus)
Turn-off Threshold [VIN_OV_FAULT_LIMIT]
85
Vdc
Turn-on Threshold
(follows VIN_OV_FAULT_LIMIT -7V)
78 Vdc
Pull down resistance of PGOOD pin
Sink current capability into PGOOD pin
(VPG=2.2V)
All
All 150
15
Ω
mA
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
5
Digital Interface Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature
conditions. See Feature Descriptions for additional information.
Parameter Conditions Symbol Min Typ Max Unit
PMBus Signal Interface Characteristics
Input High Voltage (CLK, DATA)
VIH
2.1
3.6
V
Input Low Voltage (CLK, DATA)
VIL
0.8
V
Input high level current (CLK, DATA)
IIH
-10
10
μ
A
Input low level current (CLK, DATA)
I
IL
-10
10
μ
A
Output Low Voltage (CLK, DATA,
SMBALERT#) IOUT=2mA VOL 0.4 V
Output high level open drain leakage
current (DATA, SMBALERT#)
VOUT=3.6V IOH 0 10 μA
Pin capacitance CO 0.7 pF
PMBus Operating frequency range Slave Mode FPMB 100 400 kHz
Measurement System Characteristics
Output current reading range
IOUT(RNG) 1.6500 63.937 A
Output current reading blanking IOUT(BNK) 0 1.5875 A
Output current reading resolution
IOUT(RES)
62.5
mA
Output current reading accuracy 16.5A > Iout >33.0A
IOUT(ACC) -5.0 -1.4 3.0 %
Output current reading accuracy (absolute
differenc e betw een act ual and reported
1.65A > Iout >16.5A
IOUT(ACC) -1.7 2.5 A
VOUT reading range
VOUT(RNG)
0
15.9997
V
VOUT reading resolution
VOUT(RES)
0.244
mV
VOUT reading accuracy
VOUT(ACC)
-2.0
0.6
2.0
%
VIN reading range
VIN(RNG) 0 127.875 V
VIN reading resolution
VIN(RES)
125
mV
VIN reading accuracy
VIN(ACC)
-4.0
0.8
4.0
%
Temperature reading resolution
T(RES)
0.25
°C
Temperature reading accuracy
T(ACC)
-5.0
5.0
%
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
6
Characteristic Curves
The following figures provide typical characteristics for the QBDW033A0B (12V, 33A) at 25ºC. The figures are identical for
either positive or negative Remote On/Off logic.
IN PUT CURRENT, Ii (A)
EFFCIENCY, η (%)
INPUT VO L TAGE, V
O
(V)
OUTPUT CURRENT, I
O
(A)
Figure 1. Typical Input Characteristic.
Figure 2. Typical Converter Efficiency vs. Output
Current.
OUTPUT VOLTAGE,
VO (V) (50mV/div)
OUTPUT CURRENT OUTPUT VOLTAGE
IO (A) (10A/div) VO (V) (200mV/div)
TIME , t ( 2 µs/div)
TIME, t (500 μs/div)
Figure 3. Typical Output Ripple and Noise, I
o
= I
o,max
.
Figure 4. Typical Transient Response to 0.1A/µs
Step Change in Load from 50% to 75% to 50% of
Full Load, Co=470µF and 48 Vdc Input.
OUTPUT VOLTAGE INPUT VOLTAGE
VO (V) (5V/div) VIN(V) (20V/di v)
OUTPUT VOLTAGE On/Off VOLTAGE
VO (V) (5V/ div ) VON/OFF (V)(2V/div)
TIME, t (20 ms/div)
TIME , t ( 5 ms/div)
Figure 5. Typical Start-Up Using Vin with Remote
On/Off enabled, negative logic version shown.
Figure 6. Typical Start-Up Using Remote On/Off
with Vin applied, negative logic version shown.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
7
Characteristic Curves (continued)
.
OUTPUT VOLTAGE, V
O
(V)
OUTPUT VOLTAGE, V
O
(V)
INPUT VO L TAGE, V
in
(V)
OUTPUT CURRENT, I
O
(A)
Figure 7. Typical Output Voltage Regulation vs. Input
Voltage.
Figure 8. Typical Output Voltage Regulation vs.
Output Current.
OUTPUT VOLTAGE, V
O
(V)
OUTPUT VOLTAGE, VO (V)
INPUT VO L TAGE, V
in
(V)
OUTPUT CURRENT, I
O
(A)
Figure 9. Typical Output Voltage Regulation vs. Input
Voltage for the –P Version.
Figure 10. Typical Output Voltage Regulation vs.
Output Current for the –P Version.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
8
Test Configurations
Note: Measure input reflected-ripple current with a
simulated
source inductance (LTEST) of 12 µH. Capacitor CS offsets
possibl e battery impedanc e. Measure current as shown above.
Figure 11. Input Reflected Ripple Current Test Setup.
Note: Use a 1.0 µF ceramic capacitor and a 10 µF aluminum or
tantalum capacitor. Scope measurement should be made
using a BNC socket. Position the load between
51 mm and 76 mm (2 in. and 3 in. ) from the module.
Figure 12. Output Ripple and Noise Test Setup.
Note: All measurements are taken at the module terminals.
When socketing, place Kelvin connections at module terminals
to avoid measurement errors due to socket contact resist ance.
Figure 13. Output Voltag e and Efficiency Test Setup.
Design Considerations
Input Source Impedance
The power module should be connected to a low
ac-impedance source. A highly inductive source
impedance can affect the stability of the power module.
For the test configuration in Figure 10, a 100μF
electrolytic capacitor, Cin, (ESR<0.7Ω at 100kHz),
mounted close to the power module helps ensure the
stability of the unit. If the module is subjected to rapid
on/off cycles, a 330μF input capacitor is required.
Consult the factory for further application guidelines.
Safety Considerations
For safety-agency approval of the system in which the
power module is used, the power module must be
installed in compliance with the spacing and separation
requirements of the end-u se s afety agency stand ar d, i.e.,
UL60950-1 2nd Ed., CSA C22.2 No. 60950-1 2nd Ed., and
VDE0805-1 EN60950-1 2nd Ed.
If the input source is non-SELV (ELV or a hazardous
voltage greater than 60 Vdc and less than or equal to
75Vdc), for the module’s output to be considered as
meeting the requirements for safety extra-low voltage
(SELV), all of the following must be true:
The input source is to be provided with reinforced
insulation from any other hazardous voltages,
including the ac mains.
One VIN pin and one VOUT pin are to be grounded, or
both the input and output pins are to be kept
floating.
The input pins of the module are not operator
accessible.
Another SELV reliability test is conducted on the
whole system (combination of supply source and
subject module), as required by the safety agencies,
to verify that under a single fault, hazardous
voltages do not appear at the module’s output.
Note: Do not ground either of the input pins of the
module without grounding one of the output pins.
This may allow a non-SELV voltage to appear
between the output pins and ground.
The power module has safety extra-low voltage (SELV)
outputs when all inputs are SELV.
The input to these units is to be provided with a
maximum 30 A fast-acting (or time-delay) fuse in the
unearthed lea d.
The power module has internally generated voltages
exceeding safe ty ex tr a-low voltage. Consideration should
be taken to restrict operato r accessibility .
LOAD
CONT A CT AND
SUPPLY
I
I
CONTACT
V
I
(+)
V
I
(–)
V
O1
DISTRIBUTION LOSSES
RESISTANCE
I
O
V
O2
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
9
Feature Descr i pti ons
Overcurrent Protection
To provide protection in a fault output overload condition,
the QBDW033A0B module is equipped with inter nal
current-limiting circuitr y and ca n endure current limiting
continuously. If the overcurrent condition causes the
output voltage to fall below 4.0V, the module w ill shut
down. The module is factory default configured for auto-
restart operation. The auto-restart fe ature co ntin ual ly
attempts to restore the operation until fault condition is
cleared. If the output overload condition still exists when
the module restarts, it will shut down again. This
operation will continue indefinitely until the overcurrent
condition is corrected.
The IOUT_OC_WARN threshold level,
IOUT_OC_FAULT threshold level, and
IOUT_OC_FAULT_RESPONSE can be reconfigured via
the PMBus interface. If the FAULT _RESPONSE is
reconfigured to remain latched off following an
overcurrent shutdown, the overcurrent latch is reset by
either cycling the inp ut pow er , or by toggling the on/off
pin for one millisecond.
Output Overvoltage Protection
The module contains circuitry to detect and respond to
output overv olta ge cond itio ns. If the overvoltage
condition causes the output voltage to rise above the
limit in the Specifications Table, the module will shut
down. The QBDW033A0B module is fact or y default
configured for auto-restart operation. The auto-restart
feature continually attempts to restore the operation until
fault condition is cleared. If the output overvoltage
condition still exists when the module restarts, it will shut
down again. This operation will continue indefinitely until
the overvolt age con diti on is cor recte d.
The VOUT_OV_FAULT threshold level and
VOUT_OV_FAULT _RESPONSE can be reconfigured
via the PMBus interface. If the FAULT _RESPONSE is
reconfigured to remain latched off following an
overvoltage shutdown, the overvoltage latch is reset by
either cycling the inp ut pow er , or by toggling the on/off
pin for one millisecond.
Overtemperature Protection
The modules feat ure an overte mper a ture pr ote cti on
circuit to safeguard against thermal damage. The circuit
shuts down the module when the default maximum
device reference temperature is exceeded. The module
is factory default configured to automatically restart once
the reference temperature cools by ~25°C.
The OT_W A RNING and OT _FAU LT threshold lev els
and OT_FAULT_RESPONSE can be reconfigured via
the PMBus interface. If the FAULT _RESPONSE is
reconfigured to remain latched off following an
overtemperature shutdown, the overtemperature latch is
reset by either cycling the input power or by toggling the
on/off pin for one millisecond.
Input Under Voltage Lockout
When Vin exceeds VIN_ON, the module output is
enabled, when Vin falls below VIN_OFF, the module
output is disabled. VIN_ON and VIN_OFF can be
reconfigured via the PMBus interface. A minimu m 2V
hysteresis between VIN_ON and VIN_OFF is required.
Input Over Voltage Lockout
The QBDW033A0B module co ntain s circ uitry to detect
and respond to input overvoltage conditions. If the
overvoltage condition causes the input voltage to rise
above the limit in the Specifications Table, the module
will shut down. The module is factory default configured
for auto-res tar t operation. The auto-restart feature
continually monitors the input voltage and will restart the
module when the level falls 7V below the
VIN_OV_FAULT level.
The VIN_OV_FAULT threshold level can be reconfigured
via the PMBus interface.
Remote On/Off (i)
The module contains a standard on/off control circuit
reference to the VIN(-) terminal. Two factory configured
remote on/off logic options are available. Positive logic
remote on/off turns the module on during a logic-high
voltage on the ON/OFF pin, and off during a logic LO .
Negative logic remote on/off turns the module off during
a logic HI, and on during a lo gic LO. Negative logic,
device code suffix "1," is the factory-preferred
configuration. The On/Off circuit is powered from an
internal bias supply, derived from the input voltage
terminals. To turn the power module on and off, the user
must supply a switch to control the voltage between the
On/Off terminal and the VIN(-) terminal (Von/off). The
switch can be an open collector or equivalent (see Figure
14). A logic LO is Von/off = -0.3V to 0.8V. The typical Ion/off
during a logic LO (Vin=48V, On/Off Terminal=0.3V) is
147µA. The switch should maintain a logic-low voltage
while sinking 310µA. During a logic HI, the maximum
Von/off generated by the power module is 8.2V. The
maximum allowable leakage current of the switch at
Von/off = 2.0V is 10µA. If using an ex ternal volt age source,
the maximum voltage Von/off on the pin is 14.5V with
respect to the VIN(-) terminal.
If not using the remote on/off feature, perfor m one of the
following to turn the unit on:
For negative logic, short ON/OFF pin to VIN(-).
For positive logic: leave ON/OFF pin open.
Figure 14. Remote On/Off Implementation.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
10
Feature Descr i pti ons (continued)
Load Sharing
For higher power requirements, the QBDW033A0 power
module offers an optional feature for parallel operation (-
P Option code). This feature provides a precise forced
output voltage load regulation droop characteristic. The
output set point and droop slope are fac tory calibr at ed to
insure optimum mat ch ing of multip le mod ule s’ load
regulation characteristics. To implement load sharing,
the following requirements should be followed:
The VOUT(+) and VOUT(-) pins of all parallel modules
must be connected together. Balance the trace
resistance for each module ’s p ath to the outp ut power
planes, to insure best load sharing and operating
temperature balance.
VIN must remain between 40Vdc and 75Vdc for droop
sharing to be functional.
It is permissible to use a common Remote On/Off signal
to start all modules in parallel.
These modules contain means to block reverse current
flow upon start-up, when output voltage is present from
other parallel modules, thus eliminating the requirement
for external output ORing devices. Modules with the –P
option will self determine the presence of voltage on the
output from other oper at ing m odule s, and auto mat ica lly
increase its Turn On delay, Tdelay, as specified in the
Feature Specifications Table.
When parallel modul es start up into a pre-biased output,
e.g. partially discharged output capacitance, the Trise is
automatically increased, as specified in the Feature
Specifications Table, to insure graceful startup.
Insure that the load is <50% IO,MAX (for a single module)
until all parallel modules have started (load full start >
module Tdelay time max + Trise time).
If fault tolerance is desired in parallel applications,
output ORing devices should be used to prevent a
single module fail ure fr om collapsing the load bus.
Remote Sense
Remote sense minimizes the effects of distribution
losses by regulating the voltage at the remote-sense
connections (See Figure 15). The SENSE(-) pin should
be always connected to VO(–).The voltage between the
remote-sense pins and the output terminals must not
exceed the output voltage sense range given in the
Feature Specifications tab le:
[VO(+) – VO(–)] – [SENSE(+) ] ≤ 0.5 V
Although the output voltage can be increased by both the
remote sense and by the trim, the maximum increase for
the output voltage is not the sum of both. The maximum
increase is the larger of either the remote sense or the
trim. The amount of power deli v ered by the module is
defined as the voltage at the output terminals multiplied
by the out put curr ent . When using remote sen se and
trim, the output volta ge of th e module can be incr eas ed,
which at the same output current, w ould incr eas e the
power output of the module. Care should be taken to
ensure that the maximum output power of the module
remains at or below the maximum rated power
(Maximum rated power = Vo,set x Io,max).
Figure 15. Circuit Configuration for remote
.
Configura b le Control Pins
The QBDW033A0B contains two configurable control
pins, T/C1 and C2, referenced to the module secondary
SIG_GND. See Mechanical Views for pin locations. The
following table list the default factory configurations for
the functions assigned to these pins. Additional
configura tio ns can be accomplished via the PMBus
command, MFR_CPIN_ARA_CONFIG. Following the
table, there is a feature description for each function.
Pin
Designation/Function
Module
Code Configuration
T/C1
C2
On/Off ( O)
Power Good
w/o -P
Factory Default
Trim
On/Off ( O)
w/o -P
Via PMBus
Trim
Power Good
w/o -P
Via PMBus
On/Off ( O)
Power Good
with -P
Factory Default
Remote On/Off(o)
The module contains an additional remote on/off control
input On/Off(o), via either the T/C1 or C2 pin, reference
to the VO(-) terminal. The factory default configuration is
set to ignore this input, unless activated by the PMBus
command, MFR_ CPIN_ON_OFF_CONFIG. This
command is also used to configure the logic for the
On/Off(o) pin. Positive logic remote on/off turns the
module on during a logic-high voltage on the ON/OFF
pin, and off during a logic low. Negative logic remote
on/off turns the module off during a logic high, and on
during a logic low. The On/Off(o) circuit is powered from
an internal bias supply, referenced to SIG_GND. To turn
the power module on and off, the user must supply a
switch to control the voltage between the On/Off (o)
terminal and the VO(-) terminal (Von/off(o)). The switch can
be an open collector or equivalent (see Figure 13). A
logic low is Von/off(o) = -0.3V to 0.8V. The typical Ion/off(o)
during a logic low is 330µA. The switch should maintain
a logic-low voltage while sinking 250µA. During a logic
high, the maximum Von/off(o) generated by the power
module is 3.3V. The maximum allowable leakage curr en t
of the switch at Von/off(o) = 2.0V is 130µA. If using an
external voltage source, the maximum voltage Von/off on
the pin is 3.3V with respect to the Vi(-) terminal.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
11
If not using the Remote On/Off(o) feature, the pin may
be left N/C.
Feature Descr i pti ons (continued)
Power Good, PG
The QBDW033A0B module provides a Power Good
(PG) feature, which compares the module’s output
voltage to the module’s POWER_GOOD_ON and
POWER_GOOD_OFF values. These values are
adjustable via PMBus. PG is asserted when the
module’s output voltage is above the
POWER_GOOD_ON value, and PG is de-asserted if any
condition such as overtemperature, overcurrent or loss of
regulation occurs that would result in the output voltage
going below the POWER_GOOD_OFF value.
The PG signal, provided on pin C2, is implemented with
an open-drain node, pulled up via a 10kΩ resistor to
3.3V internally. For Positive Logic PG (default), the PG
signal is HI, when PG is asserted, and LO, when the PG
is de-asserted. For Negative Logic PG, the PG signal is
LO, when PG is asserted, and HI, when the PG is de-
asserted.
The PMBus command MFR_PGOOD _POLARITY is
used to set the logic polarity of the signal.
If not using the Power Good fe ature, t he pin may be
left N/C.
Trim, Output Voltage Programming
Trimming allows the output voltage set point to be
increased or decreased; this is accomplished by
connecting an external resistor between the TRIM pin
and either the VO(+) pin or the VO(-) pin.
V
O
(+)
T/C1
V
O
(-)
R
trim-down
LOAD
QBDW033A0B
R
trim-up
Figure 16. Circuit Configuration to Trim Output
Voltage.
Connecting an external resistor (Rtrim-down) between the
T/C1 pin and the Vo(-) (or Sense(-)) pin decreases the
output voltage set point. To maintain set point accuracy,
the trim resistor tolerance should be ±1.0%.
The following equation determines the required external
resistor value to obtain a percentage output voltage
change of Δ%.
ΚΩ
−
∆
=
−22.10
%
511
downtrim
R
Where
100
0.12
0.12
%×
−
=∆ V
VV desired
For example, to trim-down the output voltage of the
module by 20% to 9.6V, Rtrim-down is calculated as
follows:
20
%=∆
ΚΩ
−=
−22.10
20
511
downtrim
R
Ω=
−
kR
downtrim
3.15
Connecting an external resistor (Rtrim-up) between the
T/C1 pin and the VO(+) (or Sense (+)) pin increases the
output voltage set point. The following equations
determine the required external resistor value to obtain a
percentage output voltage change of Δ%:
ΚΩ
−
∆
−
∆×
∆+××
=
−
22.10
%
511
%225.1 %)100(0.1211.5 V
R
uptrim
Where
100
0
.
12 0.
12
%×
−
=∆ VV
V
desired
For example, to trim-up the output voltage of the module
by 5% to 12.6V, Rtrim-up is calculated is as follows:
5% =∆
ΚΩ
−−
×
+××
=
−
22.10
5
511
5225.1 )5100(0.1211.5
uptrim
R
ΚΩ=
−8.938
uptrim
R
The voltage between the Vo(+) and Vo(–) terminals must
not exceed the minimum output overvoltage protection
value shown in the Feature Specifications table. This
limit includes any increase in voltage due to remote-
sense compensation and output voltage set-point
adjustment trim.
Although the output voltage can be increased by both the
remote sense and by the trim, the maximum increase for
the output voltage is not the sum of both. The maximum
increase is the larger of either the remote sense or the
trim. The amount of power delivered by the module is
defined as the voltage at the output terminals multiplied
by the output current. When using remote sense and
trim, the output voltage of the modu le can be incr eas ed,
which at the same output current would increase the
power output of the module. Care should be taken to
ensure that the maximum output power of the module
remains at or below the maximum rated power
(Maximum rated power = VO,set x IO,max).
.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
12
Feature Descr i pti ons (continued)
Thermal Considerations
The power modules operate in a variety of thermal
environments and sufficient cooling should be provided
to help ensure reliable operation.
Thermal considerations include ambient temperature,
airflow, module power dissipation, and the need for
increased reliability. A reduction in the operating
temperature of the module will result in an increase in
reliability. The thermal data presented here is based on
physical measur e me nts tak en in a wind tunnel.
Heat-dissipating components are mounted on the top
side of the module. Heat is removed by conduction,
convection and radiation to the surrounding environment.
Proper cooling can be verified by measuring the thermal
reference temperature (TH1 or TH2). Peak temperature
occurs at the position indicated in Figure 17 and 18. For
reliable operation this temperature should not exceed
TH1=125°C or TH2=105°C. For extremely high reliability
you can limit this temperature to a lower value.
.
Figure 17. Location of the thermal reference
temperature TH.
Figure 18. Location of the thermal reference
temperature TH3 for Baseplate module.
The output power of the module should not exceed the
rated power for the module as listed in the Ordering
Information table.
Please refer to the Application Note “Thermal
Characterization Process For Open-Frame Board-
Mounted Power Modules” for a detailed discussion of
thermal aspects including maximum device
temperatures.
Heat Transfer via Convection
Increased airflow over the module enhances the heat
transfer via convection. The thermal derating of figure
19- 23 shows the maximum output current that can be
delivered by each module in the indicated orientation
without exceeding the maximum THx temperature
versus local amb ient tem perat ur e (T A) for several air flow
conditions.
The use of Figure 19 is shown in the following example:
Example
What is the minimum airflow necessary for a
QBDW033A0B operating at VI = 48 V, an output current
of 20A, and a maximum ambient temperature of 60 °C in
transverse orientation.
Solution:
Given: Vin= 48V, IO = 20A, TA = 60 °C
Determine required airflow velocity (Use Figure 19):
Velocity = 0.5m/s (100 LFM) or greater.
OUTPUT CURRENT, IO (A)
LOCAL AMBIEN T TEMPERATURE, T
A
(°C)
Figure 19. Output Current Derating for the Open
Frame
QBDW033A0B in the Transverse Orientation;
Airflow Direction from Vin(+) to Vin(-); Vin = 48V.
OUTPUT CURRENT, IO (A)
LOCAL AMBIEN T TEMPERATURE, T
A
(°C)
Figure 20. Output Current Derating for the Base
plate
QBDW033A0B-
H in the Transverse Orientation;
Airflow Direction from Vin(+) to Vin(-); Vin = 48V.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
13
OUTPUT CURRENT, IO (A)
LOCAL AMBIEN T TEMPERATURE, T
A
(°C)
Figure 23. Output Current Derating for the Base
plate
QBDW033A0B-H with 1.0” heatsink in the
Transverse Orientation; Airflow Direction from
Vin(+) to Vin(-); Vin = 48V.
Layout Considerations
The QBDW033A0B power mo dule seri es are low
profile in order to be used in fine pitch system card
architectures. As such, component clearance
between the bottom of th e pow er module and the
mounting board is limited. Avoid placing copper
areas on the outer layer directly underneath the
power module. Also avoid placing via interconnects
underneath the power module.
For additional layout guide-lines, refer to
FLTR100V10 Data Sheet.
Through-Hole Lead-Free Soldering
Information
The RoHS-compliant, Z version, through-hole
products use the SAC (Sn/Ag/Cu) Pb-free solder and
RoHS-compliant compon ents . The non-Z version
products use lead-tin (Pb/Sn) solder and RoHS-
compliant components. Both version modules are
designed to be processed through single or dual wave
soldering machines. The pins have an RoHS-
compliant, pure t in fini sh that i s compat ib le with both
Pb and Pb-free wave soldering processes. A
maximum preheat rate of 3°C/s is suggested. The
wave preheat process should be such that the
temperature of the power module board is kept below
210°C. For Pb solder, the recommended pot
temperature is 260°C, while the Pb-free solder pot is
270°C max. Not all RoHS-compliant throu gh-hole
products can be processed with paste-through-hole
Pb or Pb-free reflow process. If additional information
is needed, please consult with your Lineage Power
representative for more details.
Reflow Lead-Free Soldering
Information
The RoHS-compliant through-hole products can be
processed with the following paste-through-hole Pb or
Pb-free reflow process.
Max. sustain temperature :
245°C (J-STD-020C Table 4-2: Packaging
Thickness>=2.5mm / Volume > 2000mm3),
Peak temperature over 245°C is not suggested due
to the potential reliability risk of components under
continuous hig h-temperature.
Min. sustain duration above 217°C : 90 seconds
Min. sustain duration above 180°C : 150 seconds
Max. heat up rate: 3°C/sec
Max. cool down rate: 4°C/sec
In compliance with JEDEC J-STD-020C spec for 2
times reflow requirement.
Pb-free Reflow Profile
BMP module will com ply with J-STD-020 Rev. C
(Moisture/Reflow Sensitivity Classification for
Nonhermetic Solid State Surface Mount Devices) for
both Pb-free solder profiles and MSL classification
OUTPUT CURRENT, IO (A)
LOCAL AMBIENT TEMP E RATURE, T
A
(°C)
Figure 21. Output Current Derating for the Base
plate
QBDW033A0B-H with 0.25” heatsink in the
Transverse Orientation; Airflow Direction from
Vin(+) to Vin(-); Vin = 48V.
OUTPUT CURRENT, IO (A)
LOCAL AMBIENT TEMP E RATURE, T
A
(°C)
Figure 22. Output Current Derating for the Base
plate
QBDW033A0B-H with 0.5” heatsink in the
Transverse Orientation; Airflow Direction from
Vin(+) to Vin(-); Vin = 48V.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
14
Reflow Lead-Free Soldering
Information (continued)
procedures. BMP will comply with JEDEC J-STD-
020C specification for 3 times reflow requirement. The
suggested Pb-free solder paste is Sn/Ag/Cu (SAC).
The recommended linear reflow profile using
Sn/Ag/Cu solder is shown in Figure 24.
Time
Temp
Ramp up
max. 3°C/Sec
Ramp down
max. 4°C/Sec
Time Limited 90 Sec.
above 217°C
Preheat time
100-150 Sec.
Peak Temp. 240-245°C
25°C
150°C
200°C
217°C
Figure 24. Recommended linear reflow profile
using Sn/Ag/Cu solder.
MSL Rating
The QBDW033A0B modules have a MSL rating of 2a.
Storage and Ha n d ling
The recommended storage environment and handling
procedures for moisture-s en sit iv e surf ace mount
packages is detai led in J-STD-033 Rev. A (Handling,
Packing, Shipping and Use of Moisture/Reflow
Sensitive Surface Mount Devices). Moisture barrier
bags (MBB) with desiccant are required for MSL
ratings of 2 or greater. These sealed packages
should not be broken until time of use. Once the
original package is broken, the floor life of the product
at conditions of ≤30°C and 60% relative humidity
varies according to the MSL rating (see J-STD-033A).
The shelf life for dry packed SMT packages will be a
minimum of 12 months from the bag seal date, when
stored at the following conditions: < 40° C, < 90%
relative humidi t y .
Post Solder Cleaning and Drying
Considerations
Post solder cleaning is usually the final circuit-board
assembly process prior to electrical board testing. The
result of inadequate cleaning and drying can affect
both the reliability of a power module and the
testability of the finished circuit-board assembly. For
guidance on appropr i ate sol de r ing, cle ani ng and
drying procedures, refer to Lineage Power Board
Mounted Power Modules: Soldering and Cleaning
Application Note (AP01-056EPS).
EMC Considerati ons
The circuit and plots in Figure 25 shows a suggested
configuration to meet the conducted emission limits of
EN55022 Class A. For further information on
designing for EMC compliance, please refer to the
FLT012A0Z data she et.
Figure 25. EMC Consideration
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
15
Packaging Details
All versions of the QBDW033A0B are supplie d as
standard in the plastic trays shown in Figure 26.
Tray Specifi catio n
Material
PET (1mm)
Max surface resistivity
109 -1011Ω/PET
Color
Clear
Capacity
12 power modules
Min order quantity
24 pcs (1 box of 2 full
trays + 1 empty top tray)
Each tray contains a total of 12 power modules. The
trays are self-stacking and each shipping box for the
QBDW033A0B module contains 2 full trays plus one
empty hold-down tray giving a total number of 24 power
modules.
Open Frame Module Tray
Base Plate Module Tray
Figure 26. QBDW033 Packaging Tray
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
16
Digital Fea ture Descriptions
PMBus Interface Capability
The QBDW033A0B series is equipped with a digital
PMBus interface to allow the module to be configured,
and communicate with system controllers. Detailed
timing and electrical characteristics of the PMBus can
be found in the PMB Power Management Protocol
Specification, Part 1, r ev isi on 1.2, available at
http://pmbus.org. The QBDW033A0B supports both
the 100kHz and 400kHz bus timing requirements. The
QBDW033A0B shall stretch the clock, as long as it
does not exceed the maximum clock LO period of
35ms. The QBDW033A0B will check the Packet Error
Checking scheme (PEC) byte, if provided by the
PMBus master, and include a PEC byte in all
responses to the master. However, the
QBDW033A0B does not require a PEC byte from the
PMBus master.
The QBDW033A0B supports a subset of the
commands in the PMBus 1.2 specification. Most all of
the controller parameters can be programmed using
the PMBus and stored as defaults for later use. All
commands that require data input or output use the
linear for mat. The exponent of the data words is fixed
at a reasonable value for the command and altering
the exponent is not supported. Direct format data
input or output is not supported by the
QBDW033A0B. The supported commands are
described in greater detail below.
The QBDW033A0B also supports the SMBALERT
response protocol. The SMBALERT response
protocol is a mechani sm throu gh which the
QBDW033A0B can alert the PMBus master that it has
an active status or alarm condition via pulling the
SMBALERT pin to an active low. The master
processes this condition, and simultaneo usly
addresses all slaves on the PMBus through the Alert
Response Address. Only the slave(s) that caused the
alert (and that sup port the protocol) acknowledges
this request. The master perform s a modified receive
byte operation to get the slave’s address. At this
point, the master can use the PMBus status
commands to query the slave that caused the alert.
Note: The QBDW033A0B can only res pon d to a
single address at any given time. Therefore, the
factory defau lt state for the QB DW033A0B mod ule is
to retain it’s resistor programmed address, when it is
in an ALERT active condition, and not respond to the
ARA. This allows master systems, which do not
support ARA, to continue to communicate with the
slave QBDW033A0B using the programmed address,
and using the various READ_STATUS commands to
determine the cause for the SMBALERT. The
CLEAR_FAULTS command will retire the active
SMBALERT. However, when the QBDW033A0B
module is used in systems that do support ARA, Bit 4
of the MFR_CPIN_ARA_CONFIG command can be
used to reconfigure the module to utilize ARA. In this
case, the QBDW033A0B will no longer respond to its
programmed address, when in an ALERT active
state. The master is expected to perform the modified
received byte operation, and retire the ALERT active
signal. At this time, the QBDW033A0B will return to
it’s resistor programmed address, allowing normal
master-slave communications to proceed. The
QBDW033A0B does not contain capability to arbitrate
data bus contention caused by multiple modules
responding to the modified received byte operation.
Therefore, when the ARA is used in a multiple module
PMBus application, it is necessary to have the
QBDW033A0B module at the lowest programmed
address in order for the host to properly determine all
modules’ address that are associated with an active
SMBAlert. Please contact your Lineage Power sales
representative for further assistance, and for more
information on the SMBus alert response protocol,
see the System Management Bus (SMBus)
specification.
The QBDW033A0B contains non-volatile me mory that
is used to store configuration settings and scale
factors. The settings progr a m med into the dev ic e are
not automatically saved into this non-volatile memory
though. The STORE_DEFAULT_ALL command must
be used to commit the current settings to non-volatile
memory as device defaults. The settings that are
capable of being st or ed in non -volatile memory are
noted in their detaile d desc ript i ons.
PMBus Addressing
The power module can be addressed through the
PMBus using a device address. The module has 64
possible addresses (0 to 63 in decimal) which can be
se t usin g res isto rs connected from the ADDR0 and
ADDR1 pins to GND. Note that some of these
addresses (0 through 12, 40, 44, 45, and 55 in
decimal) are reserved according to the SMBus
specifications and may not be useable. The address
is set in the form of two octal (0 to 7) digits, with each
pin setting one digit. The ADDR1 pin sets the high
order digit and ADDR0 sets the low order digit. The
resistor values suggested for each digit are shown in
Table 4 (1% tolerance resistors are recommended).
Note that if either address resistor value is outside the
range specified in Table 4, the module will respond to
address 127. Table 4
Digit
Resistor Value (KΩ)
0
10
1
15.4
2
23.7
3
36.5
4
54.9
5
84.5
6
130
7
200
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
17
ADDR0
SIG_GND
R
ADDR0
R
ADDR1
ADDR1
Figure 27. Circuit showing connection of resistors
used to set the PMBus address of the module.
The user must know which I2C addresses are
reserved in a system for special functions and set the
address of the module to avoid interfering with other
system operations. Both 100kHz and 400kHz bus
speeds are supported by the module. Connection for
the PMBus interface should follow the High Power DC
specifications given in section 3.1.3 in the SMBus
specification V2.0 for the 400kHz bus speed or the
Low Power DC specifications in section 3.1.2. The
complete SMBus specification is available from the
SMBus web site, smbus.org.
PMBus Data Format
For commands that set or report any voltage
thresholds related to output voltage (including
VOUT_COMMAND, VOUT_MARGIN,
POWER_GOOD an d READ_VOUT), the module
supports the linear data format consisting of a two
byte value with a 16-bit, unsigned mantissa, a nd a
fixed exponent of -12. The format of the two data
bytes is shown below:
The value of t he num ber is the n given by
Value = Mantissa x 2-12
For commands that set all other thresholds, voltages
or report such quantities, the module suppor ts the
linear data format consisting of a two byte value with
an 11-bit, tw o’s comp lement m anti ssa and a 5-bit,
two’s complement exponent. The format of the two
data bytes is shown below:
The value is of the number is then given by
Value = Mantissa x 2 Exponent
PMBus Enabled On/Off
The module can also be turned on and off via the
PMBus interface. The OPERATION command is used
to actually turn the module on and off via the PMBus,
while the ON_OFF_CONFIG command configures the
combination of analog ON/OFF pin input and PMBus
commands needed to turn the module on and off. Bit
[7] in the OPERATION command data byte enables
the module, with the following functions:
0 : Out put is disabled
1 : Output is enabled
This module uses the lower five bits of the
ON_OFF_CONFIG data byte to set various ON/OFF
options as follows:
Bit Position
4
3
2
1
0
Access
r
r/w
r
r
r
Function
PU
CMD
CPR
POL
CPA
Default Value
1
1
1
1
1
PU: Factory set to 1. QBDW033A0B requires On/Off(i)
pin to be connected to proper input rail for module to
power up. This bit is used together with the CMD,
CPR and ON bits to determine startup.
Bit Value
Action
1
Module does not power up until
commanded by the analog ON/OFF pin
and the OPERATION command as
programmed in bits [2:0] of the
ON_OFF_CONFIG register.
CMD: The CMD bit controls how the device responds
to the OPERATION command.
Bit Value
Action
0
Module ignores the ON bit in the
OPERATION command
1
Module responds to the ON bit in the
OPERATION command
CPR: Factory set to 1. QBDW033A0B requires
On/Off(i) pin to be connected to proper input rail for
module to power up. This bit is used together with the
CMD and ON bits to determine startup.
Bit Value
Action
1
Module requires the analog ON/OFF pin
to be asserted to start the unit
PMBus Adjustable Input Undervoltage
Lockout
The module allows adjustment of the input under
voltage lockout and hysteresis. The command
VIN_ON allows setting the input voltage turn on
threshold, while the VIN_OFF command sets the
input voltage turn off threshold. For both the VIN_ON
and VIN_OFF commands, possible values range from
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
18
32.000 to 46.000V in 0.125V steps. VIN _ON m ust be
2.000V greater than VIN_OFF.
Both the VIN_ON and VIN_OFF commands use the
“Linear” format with two data bytes. The upper five
bits [7:3] of the high data byte form the two’s
complement representation of the exponent, which is
fixed at –3 (decimal). The remaining 11 bits are used
for two’s complement representation of the mantissa,
with the 11th bit fixed at zero since only positive
numbers are valid. The data associated with VIN_ON
and VIN_OFF can be stored to non-volatile memory
using the STORE_DEFAULT_ALL command.
PMBus Adjustable Soft Start Delay and Rise
Time
The soft start delay and rise time can be adjusted in
the module via PMBus. The TON_DELAY command
sets the delay time in ms, and allows choosing delay
times between 10ms and 500ms, with resolution of
0.5ms. The TON_RISE command sets the rise time in
ms, and allows choosi ng soft s tart time s between
15ms and 500ms, with resolution of 0.5ms. When
setting TON_RISE, make sure that the charging
current for outp ut capa cit ors c an be deliv ered by the
module in addition to any load current to avoid
nuisance tripping of the overcurrent protection
circuitry during startup. Both the TON_RISE and
TON_DELAY commands use the “Linear” format with
two data bytes. The upper five bits [7:3] of the high
data byte form the two’s complement representation
of the exponent, which is fixed at –1 (de cimal) . The
remaining 11 bits are used for two’s complement
representation of the mantissa, with the 11th bit fixed
at zero since only positive numbers are valid. The
data associated with TON_RISE and TON_DELAY
can be stored to non-volatile memory using the
STORE_DEFAULT_ALL command.
Output Voltage Adjustment Using the PMBus
The QBDW033A0B module output voltage set point is
adjusted us ing the VOUT_COMMAND. The output
voltage setting uses the Linear data format, with the
16 bits of the VOUT_COMMAND formatted as an
unsigned mantissa, and a fixed exponent of -12
(decimal) (read from VOUT_MODE).
VOUT = Mantissa x 2-12
The range limits for VOUT_COMMAND are 8.10V to
13.20V, and the resolution is 0.244 mV.
The data associated with VOUT_COMMAND can be
stored to non-volatile memory using the
STORE_DEFAULT_ALL command.
Output Voltage Margini n g Using the PMBus
The QBDW033A0B module can also have its output
voltage margined via PMBus commands. The
command VOUT_MARGIN_HIGH sets the margin
high voltage, while the command
VOUT_MARGIN_LOW sets the margin low voltage.
Both the VOUT_MARGIN_HIGH and
VOUT_MARGIN_LOW commands use the “Linear”
mode with the exponent fixed at –12 (decimal). The
data associated with VOUT_MARGIN_HIGH and
VOUT_MARGIN_LOW can be stored to non-volatile
memory using the STORE_DEFAULT_ALL
command.
The module is commanded to go to the margined high
or low voltages using the OPERATION command.
Bits [5:2] are used to enable m argin ing as foll ows:
00XX : Margin Off
0110 : Margin Low (Act on Fault)
1010 : Margin High (Act on Fault)
Measuring Output Voltage U sing the PMBus
The module can prov ide outp ut voltage information
using the READ_VOUT command. The command
returns two bytes of data in the linear format, with the
16 bits of the READ_VOUT formatted as an unsigned
mantissa, and a fixed exponent of -12 (decimal).
During module manufacture, an offset correction
value is written into the non-volatile memory of the
module to null errors in the tolerance and A/D
conversion of VOUT. The command
MFR_VOUT_READ_CAL_OFFSET can be used to
read the offset - two bytes consisting of a signed 16-
bit mantissa in two’s complement format, using a fixed
exponent of -12 (decimal). The resolution is 0.244mV.
The corrected Output voltage reading is then given
by:
OFFSETCALREADVOUTMFR
DAVadV
OUTOUT
____
)/([)(Re +=
Measuring Input Voltage Using the P MBus
The module can prov ide inp ut v oltage infor mat ion
using the READ_VIN command. The command
returns two bytes of data in the linear format. The
upper five bits [7:3] of the high data byte form the
two’s complement representation of the exponent,
which is fixed at –3 (decimal). The remaining 11 bits
are used for two’s complement representation of the
mantissa, with the 11th bit fixed at zero since only
positive numbers are valid.
During module man ufa cture , offset and gai n
correction values are written into the non-volatile
memory of the module to null errors in the tolerance
and A/D conversion of Vin. The command
MFR_VIN_READ_CAL_OFFSET can be used to read
the offset - two bytes consisting of a five-bit exponent
(fixed at -3) and a 11-bit mantissa in two’s
complement format. The resolution is 125mV. The
command MFR_VIN_READ_CAL_GAIN can be used
to read the gain correction - two bytes consisting of a
unsigned 16 bit number. The resolution of this
co rrection factor 0.000122. The corrected input
voltage read ing is then given b y :
OFFSETCALREADVINMFR
GAINCALREADVINMFRDAV
adV
IN
IN
____
)]8192/____()/([
)(Re
+
×
=
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
19
Measuring Output Current Using the PMBus
The module measure s output current by using the
output filter inductor winding resistance as a current
sense element. The module can provide output
current information using the READ_IOUT command.
The command returns two bytes of data in the linear
format. The upper five bits [7:3] of the high data byte
form the two’s complement representation of the
exponent, which is fixed at –4 (decimal). The
remaining 11 bits are used for two’s complement
representation of the mantissa, with the 11th bit fixed
at zero since only positive numbers are valid. Output
current readings are blanked below 1.65A.
During module man ufa cture , offset and gai n
correction values are written into the non-volatile
memory of the module to null errors in the tolerance
and A/D conversion of IOUT. The command
MFR_IOUT_CAL_OFFSE T can be used to read the
offset - two bytes consisting of a five-bit exponent
(fixed at -4) and a 11-bit mantissa in two’s
complement format. The resolution is 62.5mA. The
command MFR_IOUT_CAL_GAIN can be used to
read the gain correction - two bytes consisting of a
unsigned 16 bit number. The resolution of this
correctio n factor 0.00 0122. The READ_IOUT
command provides module average output current
information. This command only supports positive
current sourced from the module. If the converter is
sinking current a reading of 0 is provided.
OFFSETCALIOUTMFR
GAINCALIOUTMFRDAI
adI
OUT
OUT
___
)]8192/___(
)/([
)(Re
+
×
=
Note that the current reading provided by the modu le
is corre cted for temp er atur e.
Measuring the Temperature using the PMBus
The module can prov ide tem p er ature infor ma tion
using the READ_TEMPERATURE_1 command. The
command returns two bytes of data in the linear
format. The upper five bits [7:3] of the high data byte
form the two’s complement representation of the
exponent, which is fixed at –2 (decimal). The
remaining 11 bits are used for two’s complement
representation of the mantissa.
Note that the module’s temperature sensor is located
close to the module hot spot TH1 (see Thermal
Considerations).and is subjected to temperatures
higher than the ambient air temperature near the
module. The temperature reading will be highly
influenced by module load and airflow conditions.
Reading the Status of the Module using the
PMBus
The module supports a number of status information
commands implemented in PMBus. However, not all
features are supported in these commands. A X in the
FLAG cell indicates the bit is not supported.
STATUS_WORD : Returns two bytes of information
with a summary of the module’s fault/warning
conditions. High Byte
Low Byte
Bit
Position
Flag
Default
Value
7
X
0
6
OFF
0
5
VOUT Overvoltage
0
4
IOUT Overcurrent
0
3
VIN Undervoltage
0
2
Temperature
0
1
CML (Comm. Memory Fault)
0
0
X
0
STATUS_VOUT : Returns one byte of information
relating to the status of the module’s output voltage
related faults.
Bit
Position
Flag
Default
Value
7
VOUT OV Fault
0
6
X
0
5
X
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
STATUS_IOUT : Returns one byte of information
relating to the status of the module’s output
currentrelated faults.
Bit
Position
Flag
Default
Value
7
IOUT OC Fault
0
6
X
0
5
IOUT OC Warning
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
Bit
Position
Flag
Default
Value
15
VOUT fault
0
14
IOUT fault or warning
0
13
Input Voltage fault
0
12
X
0
11
POWER_GOOD# (is negated)
0
10
X
0
9
X
0
8
X
0
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
20
STATUS_INPUT : Returns one byte of information
relating to the status of the module’s input voltage
related faults.
Bit
Position
Flag
Default
Value
7
VIN OV Fault
0
6
X
0
5
X
0
4
VIN UV Fault
0
3
Module Off (Low VIN)
0
2
X
0
1
X
0
0
X
0
STATUS_TEMPERATURE : Returns one byte of
information relating to the status of the module’s
temperature related faults.
Bit
Position
Flag
Default
Value
7
OT Fault
0
6
OT Warning
0
5
X
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
STATUS_CML : Returns one byte of information
relating to the status of the module’s communication
related faults.
Bit
Position
Flag
Default
Value
7
Invalid/Unsupported Command
0
6
Invalid/Unsupported Data
0
5
Packet Error Check Failed
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
21
Summary of Supported PMBus Commands
This section outlines the PMBus command support for the QBDW033A0B bus converters. Each sup porte d com mand
is outlined in order of increasing command codes with a quick reference table of all supported commands included at
the end of the section.
Each command will hav e the following basic informat ion.
Command Name [Code]
Command support
Data format
Factory default
Additional information may be provided in tabular form or other format, if necess ary.
OPERATION [0x01]
Command support : On/Off Immediate and Margins (Act on Fault). Soft off with sequencing not supported and
Margins (Ignore Fault) not supported. Therefore bits 6, 3, 2, 1 and 0 set as read only at factory defaults.
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/w
r
r/w
r/w
r
r
r
r
Function
ON/OFF
Bits[5:4]
Bits[3:2]
N/A
Default Value
1
0
0
0
1
0
0
0
ON_OFF_CONFIG [0x02]
Command support: Bit 1 polarity will be set based upon module code [0=Negative on/off logic, 1=positive on/off logic
to allow customer system to know hardware on/off logic
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r/w
r
r
Function
(reserved)
Bit 4 pu
Bit 3 cmd
Bit 2 cpr
Bit 1 pol
Bit 0 cpa
Default Value 0 0 0 1 1 1
module
code
1
CLEAR_FAULTS [0x03]
Command support: All functionality
STORE_DEFAULT_ALL[0x11]
Command support: All functionality – S tore s operating parameters to EEprom memory.
RESTORE_DEFAULT_ALL[0x12]
Command support: All functionality – Restores operating parameters from EEprom memory.
VOUT_MODE[0x20]
Command support: Supported. Factory default: 0x14 – indicates linear mode with exp = -12
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r
Function
Mode (linear)
2’s complement ex ponent
Default Value
0
0
0
1
0
1
0
0
VOUT_COMMAND [0x21]
Data format: 16 bit unsigned mantissa (implied exponent per VOUT_MODE)
Factory defau lt: 12.000V ( 12.00 / 2-12 → 49,152 = 0xC000 )
Range limits (max/min): 13.200V/8.100V
Units: volt
Command support: Supported
VOUT_CAL_OFFSET [0x23]
Range limits (max/min): +0.25/-0.25
Units: volt
Command support : read/write support, lockout per MFR_DE VICE_TYPE, functionality implemented
VOUT_MARGIN_HIGH [0x25]
Range limits (max/min): 13.2/8.1
Units: volt
Command support: read/write support, full functionality except “Ignore faults”.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
22
Note: Range cross-check - value must be greater than VOUT_MARGIN_LOW value.
VOUT_MARGIN_LOW [0x26]
Range limits (max/min): 13.2/8.1
Units: volt
Command support: read/write support, full functionality except “Ignore faults”.
Note: Range cross-check - value must be less than VOUT_MARGIN_HIGH value.
VOUT_DROOP [0x28]
Factory default: 0 (No droop); 15 (Parallel operation)
Range limits (max / min): 50/0
Units: mv/A
Command support: All functionality
VIN_ON [0x35]
Range limits (max/min): 46/32
Units: volt
Command support: All functionality
Note: Special interlock checks between VIN_ON and VIN_OFF maintain a hysteresis gap of 2V minimum and do not
allow the OFF level to be higher than and ON level
VIN_OFF [0x36]
Range limits (max/min): 46/32
Units: volt
Command support: All functionality
Note: Special interlock checks between VIN_ON and VIN_OFF maintain a hysteresis gap of 2V minimum and do not
allow the OFF level to be higher than and ON level
VOUT_OV_FAULT_LIMIT [0x40]
Range limits (max/min): 15.99/10.9 (See note 2)
Units: volt
Command support: All functionality
Note:
1. Range cross- check – value must be greater than VOUT_COMMAND value.
2. The maximum OV Fault Limit equals the output set point plus 3V, up to 15.99V. This is an automatic
module protection feature that will override a user-set fault limit if the user limit is set too high.
VOUT_OV_FAULT_RESPONSE [0x41]
Command support:
- Response settings (bits RSP0:1) – only a setting of 10, unit shuts down and responds according to the
retry settings below, is supported.
- Retry settings (bits RS0:2) – only settings of 000 (unit does not attempt to restart on fault) and 111 unit
continuously restarts (normal startup) while fault is present until commanded off, bias power is removed
or another fault condition causes the unit to shutdown.
- Delay time setting (bits 0-2) – only DT0:2 = 0 (no delay) supported.
Default Settings: The default settings for the VOUT_OV_FAULT_RESPONSE command are;
- The unit shuts down in response to a VOUT over voltage condition.
- The unit will continuously restart (normal startup) while the VOUT over voltage condition is present until
it is commanded off, bias power is removed or another fault condition causes the unit to shutdown.
- The shutdown delay is set to 0 delay cycles.
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r/w
r/w
r/w
r
r
r
Function
RSP[1]
RSP[0]
RS[2]
RS[1]
RS[0]
DT[2]
DT[1]
DT[0]
Default Value
1
0
1
1
1
0
0
0
IOUT_OC_FAULT_LIMIT [0x46]
Range limits (max/min): 60/20
Units: amp
Command support: All functionality
Note: Range cross-check – value must be greater than IOUT_OC_WARN_LIMIT value.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
23
IOUT_OC_FAULT_RESPONSE [0x47]
Command support :
- Response settings (bits RSP0:1) – only settings of 11, unit shuts down and responds according to the
retry settings below, is supported.
- Retry settings (bits RS0:2) – only settings of 000 (unit does not attempt to restart on fault) and 111 unit
continuously restarts (normal startup) while fault is present until commanded off, bias power is removed
or another fault condition causes the unit to shutdown.
- Delay time setting (bits 0-2) – only DT0:2 = 0 (no delay) supported.
Default Settings: The default settings for the IOUT_OC_FAULT_RESPONSE command are;
- The unit shuts down in response to an IOUT over current condition.
- The unit will continuously restart (normal startup) while the IOUT over current condition is present until it
is commanded off, bia s power is removed or another fault condition causes the unit to shutdown.
- The shutdown delay is set to 0 delay cycles.
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r/w
r/w
r/w
r
r
r
Function
RSP[1]
RSP[0]
RS[2]
RS[1]
RS[0]
DT[2]
DT[1]
DT[0]
Default Value
1
1
1
1
1
0
0
0
IOUT_OC_WARN_LIMIT [0x4A]
Range limits (max/min): 40/10
Units: amp
Command support: read/write support, functionality complete
Note: Range cross-check – value must be less than IOUT_OC_FAULT_LIMIT value.
OT_FAULT_LIMIT [0x4F]
Range limits (max/min): 140/25
Units: degrees C.
Command support: All functionality
Note: Range cross-check – value must be greater than OT_WARN_LIMIT value.
OT_FAULT_RESPONSE [0x50]
Command support :
- Response settings (bits RSP0:1) – only setting of 10, unit shuts down and responds according to the
retry settings below.
- Retry settings (bits RS0:2) – only settings of 000 (unit does not attempt to restart on fault) and 111 unit
continuously restarts (normal startup) while fault is present until commanded off, bias power is removed
or another fault condition causes the unit to shutdown.
- Delay time setting (bits 0-2) – only DT0:2 = 0 (no delay) supported.
Default Settings: The default settings for the OT_FAULT_RES PO N SE command are;
- The unit shuts down in response to an over-temperatur e con ditio n.
- The unit will continuously restart (normal startup) while the over-temperature condition is present until it
is commanded off, bias power is removed or another fault condition causes the unit to shutdown.
- The shutdown delay is set to 0 delay cycles.
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r/w
r/w
r/w
r
r
r
Function
RSP[1]
RSP[0]
RS[2]
RS[1]
RS[0]
DT[2]
DT[1]
DT[0]
Default Value
1
0
1
1
1
0
0
0
OT_WARN_LIMIT [0x51]
Range limits (max/min): 125/25
Units: degrees C.
Command support: All functionality
Note: Range cross-check – value must be less than OT_FAULT_LIMIT value.
VIN_OV_FAULT_LIMIT [0x55]
Range limits (max / min): 90/48
Units: volt
Command support: All functionality
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
24
VIN_OV_FAULT_RESPONSE [0x56]
Command support :
Response settings (bits RSP0:1) – only settings of 11 (The device’s output is disabled while the fault is present.) is
supported..
- Retry settings (bits RS0:2) – only settings of 000 (unit does not attempt to restart on fault.
- Delay time setting (bits 0-2) – only DT0:2 = 0 (no delay) supported.
Default Settings: The default settings for the VIN_OV_FAULT_RESPONSE command are;
- The unit shuts down in response to a VIN over voltage condition.
- The unit will continuously prepares to restart (normal startup) while the VIN over voltage condition is
present until it is commanded off, bias power is removed, the VIN over voltage condition is removed, or
another fault condition causes the unit to shutdown.
- The shutdown delay is set to 0 delay cycles.
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r
Function
RSP[1]
RSP[0]
RS[2]
RS[1]
RS[0]
DT[2]
DT[1]
DT[0]
Default Value
1
1
0
0
0
0
0
0
POWER_GOOD_ON [0x5E]
Range limits (max/min): 13.2/8.1
Units: volt
Command support : full suppo rt
Note: Range cross-check – value must be greater than POWER_GOOD_OFF value by 1.6V.
POWER_GOOD_OFF [0x5F]
Range limits (max/min): 13.2/8.1
Units: volt
Command support : full suppo rt
Note: Range cross-check – value must be less than POWER_GOOD_ON value by 1.6V.
TON_DELAY [0x60]
Range limits (max/min): 500/10
Units: milliseconds
Command support : full suppo rt
TON_RISE [0x61]
Range limits (max / min): 500/15
Units: milliseconds
Command support : full suppo rt
STATUS_WORD [0x79]
Command support : full implementation for supp orted functions (note: Fans, MFR_SPECIFIC, Unknown not
supported)
Format
8 bit unsigned (bit field)
Bit Position
15
14
13
12
11
10
9
8
Access
r
r
r
r
r
r
r
r
Function VOUT I/POUT INPUT MFR_SPEC1
#PWR_
GOOD
FANS1 OTHER1
UN
KNOWN
1
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r
Function BUSY1 OUTPUT
_OFF
VOUT_
OV
_FAULT
IOUT_OC
_FAULT VIN_UV
_FAULT TEMP CML
NONE
OF
ABOVE
1
(1) Not supported
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
25
STATUS_VOUT [0x7A]
Command support: VOUT_OV_FAULT support, all bit reset supported
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/reset(1)
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
Function VOUT_OV
_FAULT VOUT_OV
_WARN1 VOUT_UV
_WARN1 VOUT_UV
_FAULT1
VOUT_
MAX
_WARN
1
TON_
MAX_
FAULT
1
TOFF_
MAX_
WARN
1
VOUT
TRACKING
ERROR
1
(1) Not supported
STATUS_IOUT [0x7B]
Command support : IOUT_OC_FAULT support, all bit reset supported
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/ reset(1)
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
Function
IOUT_OC
_FAULT
IOUT_OC
_LV
_FAULT
1
IOUT_OC
_WARN IOUT_UC
_FAULT1 Current
Share
Fault1
In Power
Limiting
Mode
1
POUT_OP
_FAULT1 POUT_OP
_WARN1
(1) Not supported
STATUS_INPUT [0x7C]
Command support : VIN_OV_FAULT support, all bit reset supported
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/ reset(1)
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
Function VIN_OV
_FAULT VIN_OV
_WARN1 VIN_UV
_WARN1 VIN_UV
_FAULT
Unit Off
(low input
voltage)
IIN_OC
_FAULT1 IIN_OC
_WARN1 PIN_OP
_WARN1
(1) Not supported
STATUS_TEMPERATURE [0x7D]
Command support: OT_WARN, OT_FAULT supported, all bit reset supported
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/ reset(1)
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
Function
OT_
FAULT
OT_
WARN
UT_
WARN
1
UT_
FAULT
1
reserved reserved reserved reserved
(1) Not supported
STATUS_CML [0x7E]
Command support: PEC_FAULT, INVALID_DATA, INVALID_CMD supported, all bit reset supported
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r/ reset(1)
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
r/ reset
Function INVALID
CMD INVALID
DATA PEC
FAILED MEMORY
FAULT1 PROC
FAULT1 reserved COM
FAULT
(other)1
Memory/
Logic
fault
(other)
1
(1) Not supported
READ_VIN [0x88]
Command support : full suppo rt
READ_VOUT [0x8B]
Command support : full suppo rt
READ_IOUT [0x8C]
Command support : full suppo rt
READ_TEMPERATURE_1 [0x8D]
Command support : full suppo rt
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
26
MFR_DEVICE_TYPE [0xD0]
Command support : partial support in place (Mod Name)
Format
Unsigned Binary
Bit Pos.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Access
r/w
r/w
r/w
r/w
r/w
r
r
r
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Function
Reserved
Module Name
WPE
Res
Default
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
Byte
Bit
Description
Value
Meaning
High
Byte
7:0 Reserved
Low
Byte
7:2
Module Name1
1xxxxx
Module Name
1 WPE
0
Write Protec t Enable not active.
1
Write Protect Enable active.
0
Reserved
0
Reserved
1. Present module designations (Non-isolated units will have a 0XXXXX format)
a. QBDW033A0B4xxx: 100000
b. QBDW025A0B4xxx: 100001
c. EBDW025A0B4xxx: 100010
d. EBDW020A0B4xxx: 100011
MFR_VOUT_READ_CAL_GAIN [0xD1]
Factory default: 0x2000
Range limits (max/min): 0x2666/0x1999
Units: N/A
Command support: support for VOUT gain calibration (factor in flash), lockout per MFR_DEVICE_TYPE
MFR_VOUT_READ_CAL_OFFSET [0xD2]
Range limits (max/min): exp must = -12
Units: N/A
Command support: support for VOUT offset calibration (factor in flash), lockout per MFR_DEVICE_TYPE
MFR_VIN_READ_CAL_GAIN [0xD3]
Factory default: 0X2000
Range limits (max/min): 0x2666/0x1999
Command support: support for VIN gain calibration (factor in flash), lockout per MFR_DEVICE_TYPE
MFR_VIN_READ_CAL_OFFSET [0xD4]
Data format: VIN linear format
Range limits (max/min): exp must = -3
Units: N/A
Command support : support for VIN offset calibration (factor in flash), lockout per MFR_DEVICE_TYPE
MFR_IOUT_CAL_GAIN [0xD6]
Range limits (max/min): 0x2666/0x1999
Units: N/A
Command support : support fo r IOUT gain calibration, lockout per MFR_DEVICE_TYPE
MFR_IOUT_CAL_OFFSET [0xD7]
Range limits (max/min): exp must = -4
Units: N/A
Command support : support fo r IOUT offset calibration, lockout per MFR_DEVICE_TYPE
MFR_FW_REV [0xDB]
Range limits (max/min): 0 - 0xff (0.00 – 15.15)
Units: N/A
Command support : full read support
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
27
MFR_C1_C2_ARA_CONFIG [0xE0]
Command Code
Command support : Full supp ort.
Command
MFR_C1_C2_ARA_CONFIG
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r/w
r/w
r/w
r/w
r/w
Function
Reserved
ARA
Assignment Table
Default Value
0
0
0
0
0
0
0
0
Bit
Description
Value
Meaning
7:5 Reserved 000 Reserved
4 ARA 0
ARA not functional, module remains at resistor programmed address when
SMBLAERT is asserted
1
ARA functional, module responds to ARA only, when SMBLAERT is asserted
3:0 PIN
Configuration*
0000
T/C1 pin: ON/OFF (Secondary)
C2 pin: POWER_GOOD
0001
T/C1 pin: TRIM
C2 pin: POWER_GOOD
0010
T/C1 pin: TRIM
C2 pin: ON/OFF (Secondary)
* All QBDW without –P option
Bit
Description
Value
Meaning
7:5 Reserved 000 Reserved
4 ARA 0
ARA not functional, module remains at resistor programmed address when
SMBLAERT is asserted
1
ARA functional, module responds to ARA only, when SMBLAERT is asserted
3:0
PIN
Configuration**
0000
T/C1 pin: ON/OFF (Secondary)
C2 pin: POWER_GOOD
** All QBDW with –P option
MFR_ C2_LOGIC [0xE1]
Command Code
Command support: full support (bits 0 and 1) as follows:
Command
MFR_C2_LOGIC
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r/ w
r/ w
Function
Reserved
On/Off(primary & secondary) combination
logic
Default
Value
0 0 0 0 0 0 0 0
Bit
Description
Value
Meaning
7:2
Reserved
000000
Reserved
1 ON/OFF
Configuration
0
Secondary side on/off pin state when mapped to either T/C1 or C2 is ignored
1
AND – Primary and Secondary side on/off
0 Secondary Side
ON/OFF Logic
0
Negative Logic (Low Enable: Input < 0.8V wrt Vout(-)
1
Positive Logic (High Enable: Input > 2.0V wrt Vout(-)
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
28
MFR_PGOOD_POLARITY [0xE2]
Command support: full support (bit 0) as follows:
Bit 0: 0 = Negative PGOOD logic (module PGOOD asserted when pin is LO, PGOOD de-asserted when pin is HI)
1 = Positive PGOOD logic (module PGOOD de-asserted when pin is LO, PGOOD asserted when pin is HI)
Command
MFR_PGOOD_POLARITY
Format
8 bit unsigned (bit field)
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r/w
Function
Reserved
logic
Default Value
0
0
0
0
0
0
0
1
MFR_MODULE_DATE_LOC_SN [0xF0]
Command support: read/write support for 12 byte block, lockout per MFR_DEVICE_TYPE
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
29
Barracuda PMBus Command Quick Reference Table
PMB US CMD
CMD
CODE
DATA
BYTES
DATA
FORMAT
DATA
UNITS
TRANSFER
TYPE DEF AULT VALUE
OPERATION
0x01
1
Bit field
N/A
R/W byte
0x80
ON_OFF_CONFIG 0x02 1 Bit field N/A R/W byte
0x1D (Neg Logic)
0x1F (Pos Logic)
CLEAR_FAULTS
0x03
0
N/A
N/A
Send byte
none
STORE_DEFAULT_ALL
0x11
0
N/A
N/A
Send byte
none
RESTORE_DEFAULT_ALL
0x12
0
N/A
N/A
Send byte
none
VOUT_MODE
0x20
1
mode + exp
N/A
Read byte
0x14
VOUT_COMMAND
0x21
2
VOUT linear
Volts
R/W word
12.000V
VOUT_CAL_OFFSET
0x23
2
VOUT linear
Volts
R/W word
MS
VOUT_MARGIN_HIGH
0x25
2
VOUT linear
Volts
R/W word
12.600V
VOUT_MARGIN_LOW
0x26
2
VOUT linear
Volts
R/W word
11.400V
VOUT_DROOP
0x28
2
VOUT linear
mV/A
R/W word
0
VIN_ON
0x35
2
VIN linear
v
R/W word
35.000V
VIN_OFF
0x36
2
VIN linear
v
R/W word
33.000V
VOUT_OV_FAULT_LIMIT
0x40
2
VOUT linear
v
R/W word
15.000V
VOUT_OV_FAULT_RESPONSE
0x41
1
Bit field
N/A
R/W byte
0xB8
IOUT_OC_FAULT_LIMIT
0x46
2
IOUT linear
Amps
R/W word
40.000A
IOUT_OC_FAULT_RESPONSE
0x47
1
Bit field
N/A
R/W byte
0xF8
IOUT_OC_WARN_LIMIT
0x4A
2
IOUT linear
Amps
R/W word
36.000A
OT_FAULT_LIMIT
0x4F
2
TEMP linear
Deg. C
R/W word
140C
OT_FAULT_RESPONSE
0x50
1
Bit field
N/A
R/W byte
0xB8
OT_WARN_LIMIT
0x51
2
TEMP linear
Deg. C
R/W word
125C
VIN_OV_FAULT_LIMIT
0x55
2
VIN linear
v
R/W word
85V
VIN_OV_FAULT_RESPONSE
0x56
1
Bit field
N/A
R/W byte
0xC0
POWER_GOOD_ON
0x5E
2
VOUT linear
v
R/W word
10.100V
POWER_GOOD_OFF
0x5F
2
VOUT linear
V
R/W word
8.500V
TON_DELAY
0x60
2
Time linear
msec
R/W word
10ms
TON_RISE
0x61
2
Time linear
msec
R/W word
15ms
STATUS_WORD
0x79
2
Bit field
N/A
Read word
N/A
STATUS_VOUT
0x7A
1
Bit field
N/A
Read byte
N/A
STATUS_IOUT
0x7B
1
Bit field
N/A
Read byte
N/A
STATUS_INPUT
0x7C
1
Bit field
N/A
Read byte
N/A
STATUS_TEMPERATURE
0x7D
1
Bit field
N/A
Read byte
N/A
STATUS_CML
0x7E
1
Bit field
N/A
Read byte
N/A
READ_VIN
0x88
2
VIN linear
v
Read word
N/A
READ_VOUT
0x8B
2
VOUT linear
v
Read word
N/A
READ_IOUT
0x8C
2
IOUT linear
Amps
Read word
N/A
READ_TEMP1
0x8D
2
TEMP linear
Deg. C
Read word
N/A
PMBUS_REVISION
0x98
1
Bit Field
n/a
Read byte
1.2
MFR_DEVICE_TYPE
0xD0
2
Custom
N/A
R/W word
0x0082
MFR_VOUT_READ_CAL_GAIN
0xD1
2
16 bit unsigned
N/A
R/W word
0x2000
MFR_VOUT_READ_CAL_OFF
0xD2
2
VOUT linear
N/A
R/W word
MS
MFR_VIN_READ_CAL_GAIN
0xD3
2
16 bit unsigned
N/A
R/W word
MS
MFR_VIN_READ_CAL_OFF
0xD4
2
VIN linear
N/A
R/W word
MS
MFR_IOUT_CAL_GAIN
0xD6
2
16 bit unsigned
N/A
R/W word
MS
MFR_IOUT_CAL_OFFSET
0xD7
2
IOUT linear
N/A
R/W word
MS
MFR_FW_REV
0xDB
2
8 bit unsigned
N/A
Read byte
0xMj.Mn.Bh.Bl
MFR_C1_C2_ARA_CONFIG
0xE0
1
Bit field
N/A
R/W byte
0x00
MFR_ C2_LOGIC
0xE1
1
Bit field
N/A
R/W byte
0x00
MFR_PGOOD _POLARITY
0xE2
1
Bit field
N/A
R/W byte
0x01
MFR_MOD_DATE_LOC_SN
0xF0
12
8 bit char
N/A
R/W block
YYLLWW123456
MS=Module specific
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
30
Mechanical Outline for QBDW033A0B Thr ough-hole Module
Dimensions are in millimeters and [inches].
Tolerances: x.x mm ± 0.5 mm [x.xx in. ± 0.02 in.] (Unless otherwise indicated)
x.xx mm ± 0.25 mm [x.xxx in ± 0.010 in.]
TOP VIEW*
SIDE VIEW
BOTTOM VIEW
Pin
Number
Pin Name
1
VIN(+)
2
ON/OFF
3
VIN(-)
4
VOUT(-)
5
SENSE(-)
6
TRIM/C1
7
SENSE(+)
8
VOUT(+)
9
C2
10
SIG_GND
11
DATA
12
SMBALERT
13
CLK
14
ADDR1
15
ADDR0
*Top side label includes Lineage Power name, product designation, and data code.
** Standard pin tail length. Optional pin tail lengths shown in Table 2, Device Options.
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
LINEAGE POWER
31
Mechanical Outline for QBDW033A0B–H (Baseplate version) Module
Dimensions are in millimeters and [inches].
Tolerances: x.x mm ± 0.5 mm [x.xx in. ± 0.02 in.] (Unless otherwise indicated)
x.xx mm ± 0.25 mm [x.xxx in ± 0.010 in.]
TOP VIEW
SIDE VIEW*
BOTTOM VIEW***
Pin
Number
Pin Name
1
VIN(+)
2
ON/OFF
3
VIN(-)
4
VOUT(-)
5
SENSE(-)
6
TRIM/C1
7
SENSE(+)
8
VOUT(+)
9
C2
10
SIG_GND
11
DATA
12
SMBALERT
13
CLK
14
ADDR1
15
ADDR0
*Side label includes product d esig nati on, and data code.
** Standard pin tail length. Optional pin tail lengths shown in Table 2, Device Options.
***Bottom label includes Lineage Power name, product designation, and data code
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-
DC Converters
36-75Vdc Input; 8.1-13.2Vdc Output; 33A Output Current
LINEAGE POWER
32
Recommended Pad Layouts
Dimensions are in millimeters and [inches].
Tolerances: x.x mm ± 0. 5 mm [x.xx in. ± 0.02 in.[ (unless otherwise indicated)
x.xx mm ± 0.25 mm [x.xxx in ± 0.010 in.]
Through-Hole Module s
Pin
Number
Pin Name
1
VIN(+)
2
ON/OFF
3
VIN(-)
4
VOUT(-)
5
SENSE(-)
6
TRIM/C1
7
SENSE(+)
8
VOUT(+)
9
C2
10
SIG_GND
11
DATA
12
SMBALERT
13
CLK
14
ADDR1
15
ADDR0
Data Sheet
Au gust 29, 2012
QBDW033A0B Series Power Modules; DC-DC C onv erters
36-75Vdc Input; 8.1-13.2Vdc Output; 33 A Output Current
Document No: DS10-006 ver 1.31
PDF Name: QBDW033A0B.pdf
Ordering Information
Please contact your Lineage Power Sales Representative for pricing, availability and optional features.
Table 1. Device Codes
Product codes Input Voltage
Output
Voltage
Output
Current
Efficiency
Connector
Type
Comcodes
QBDW033A0B41Z
48V (36−75Vdc)
12V
33A
95.3%
Through hole
CC109159307
QBDW033A0B641Z
48V (36−75Vdc)
12V
33A
95.3%
Through hole
CC109168885
QBDW033A0B41-HZ
48V (36
−
75Vdc)
12V
33A
95.3%
Through hole
CC109163300
QBDW033A0B41-PHZ
48V (36
−
75Vdc)
12V
33A
95.3%
Through hole
CC109158903
QBDW033A0B641-HZ
48V (36
−
75Vdc)
12V
33A
95.3%
Through hole
CC109170172
QBDW033A0B641-PHZ
48V (36
−
75Vdc)
12V
33A
95.3%
Through hole
CC109170503
Table 2. Device Options
World Wide Headquart e rs
Lineage Power Corporation
601 Shiloh Road, Plano, TX 75074, USA
+1-888-LINEAGE(546-3243)
(Outside U.S.A.: +1-972-244-WATT(9288))
www.lineagepower.com
e-mail: techsupport1@li n eagepower.com
Asia-Pacific Headquar ters
Tel: +86.021.54279977*808
Europe, Middle-East and Africa Headqu arter s
Tel: +49.89.878067-280
India Headquarters
Tel: +91.80.28411633
Lineage Power reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or
application. No rights under any patent accompany the sale of any such product(s) or information.
Lineage Power DC-DC products are protected under various patents. Information on these patents is available at www.lineagepower.com/patents.
© 2010 Lineage Power Corporation, (Plano, Texas) All International Rights Reserved.
