1 MHz to 8 GHz, 70 dB
Logarithmic Detector/Controller
Enhanced Product
AD8318-EP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
FEATURES
Wide bandwidth: 1 MHz to 8 GHz
High accuracy: ±1.0 dB over 55 dB range (f < 5.8 GHz)
Stability over temperature: ±0.5 dB
Low noise measurement/controller output (VOUT)
Pulse response time: 10 ns/12 ns (fall/rise)
Integrated temperature sensor
Small footprint LFCSP
Power-down feature: <1.5 mW at 5 V
Single-supply operation: 5 V @ 68 mA
Fabricated using high speed SiGe process
APPLICATIONS
RF transmitter PA setpoint control and level monitoring
RSSI measurement in base stations, WLAN, WiMAX, and
radars
GENERAL DESCRIPTION
The AD8318-EP is a demodulating logarithmic amplifier,
capable of accurately converting an RF input signal to a
corresponding decibel-scaled output voltage. It employs the
progressive compression technique over a cascaded amplifier
chain, each stage of which is equipped with a detector cell.
The device is used in measurement or controller mode. The
AD8318-EP maintains accurate log conformance for signals of
1 MHz to 6 GHz and provides useful operation to 8 GHz. The
input range is typically 60 dB (re: 50 Ω) with error less than
±1 dB. The AD8318-EP has a 10 ns response time that enables
RF burst detection to beyond 45 MHz. The device provides
unprecedented logarithmic intercept stability vs. ambient
temperature conditions. A 2 mV/°C slope temperature sensor
output is also provided for additional system monitoring.
A single supply of 5 V is required. Current consumption is
typically 68 mA. Power consumption decreases to <1.5 mW
when the device is disabled.
The AD8318-EP can be configured to provide a control voltage
to a VGA, such as a power amplifier or a measurement output,
from Pin VOUT. Because the output can be used for controller
applications, wideband noise is minimal.
In this mode, the setpoint control voltage is applied to VSET.
The feedback loop through an RF amplifier is closed via VOUT,
the output of which regulates the amplifier output to a magnitude
corresponding to VSET. The AD8318-EP provides 0 V to 4.9 V
output capability at the VOUT pin, suitable for controller
FUNCTIONAL BLOCK DIAGRAM
TEMP
SENSOR GAIN
BIAS SLOPE
DET DET DET DET
INHI
INLO
I V VOUT
I V VSET
CLPF
TEMP
VPSI ENBL TADJ VPSO
CMOPCMIP
10783-001
Figure 1.
2.4
0
–65 10
P
IN
(d Bm)
V
OUT
(V)
ERRO R ( dB)
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
6
–6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 –5 0 5
10783-052
Figure 2. Typical Logarithmic Response and Error vs. Input Amplitude at 5.8 GHz
applications. As a measurement device, Pin VOUT is externally
connected to VSET to produce an output voltage, VOUT, which
is a decreasing linear-in-dB function of the RF input signal
amplitude.
The logarithmic slope is nominally −25 mV/dB but can be
adjusted by scaling the feedback voltage from VOUT to the
VSET interface. The intercept is 20 dBm (re: 50 Ω, CW input)
using the INHI input. These parameters are very stable against
supply and temperature variations.
The AD8318-EP is fabricated on a SiGe bipolar IC process and
is available in a 4 mm × 4 mm, 16-lead LFCSP. Performance is
specified over a temperature range of –55oC to +105oC.
Additional application and technical information can be found
in the AD8318 data sheet.
AD8318-EP Enhanced Product
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
7/12—Revision 0: Initial Version
Enhanced Product AD8318-EP
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VPOS = 5 V, C LPF = 220 pF, TA = 25°C, 52.3 Ω termination resistor at INHI, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
SIGNAL INPUT INTERFACE INHI (Pin 14) and INLO (Pin 15)
Specified Frequency Range
0.001 8 GHz
DC Common-Mode Voltage V
POS
– 1.8 V
MEASUREMENT MODE VOUT (Pin 6) shorted to VSET (Pin 7), sinusoidal
input signal
f = 900 MHz R
= 500 Ω
Input Impedance 957||0.71 Ω||pF
±3 dB Dynamic Range T
= 25°C 65 dB
63
dB
±1 dB Dynamic Range
57
dB
Maximum Input Level ±1 dB error −1 dBm
Minimum Input Level ±1 dB error −58 dBm
Slope −26 −24.5 −23 mV/dB
Intercept 19.5 22 24 dBm
Output Voltage—High Power In P
= −10 dBm 0.7 0.78 0.86 V
Output Voltage—Low Power In P
= −40 dBm 1.42 1.52 1.62 V
Temperature Sensitivity P
= −10 dBm
25°C ≤ T
≤ 105°C 0.0071 dB/°C
−55°C ≤ T
≤ +25°C 0.0031 dB/°C
f = 1.9 GHz R
= 500 Ω
Input Impedance 523||0.68 Ω||pF
±3 dB Dynamic Range T
= 25°C 65 dB
63
dB
±1 dB Dynamic Range
57
dB
Maximum Input Level ±1 dB error −2 dBm
Minimum Input Level ±1 dB error −59 dBm
Slope −27 −24.4 −22 mV/dB
Intercept 17 20.4 24 dBm
Output Voltage—High Power In P
= −10 dBm 0.63 0.73 0.83 V
Output Voltage—Low Power In P
= −35 dBm 1.2 1.35 1.5 V
Temperature Sensitivity P
= –10 dBm
25°C ≤ T
≤ 105°C 0.0056 dB/°C
−55°C ≤ T
≤ +25°C 0.0004 dB/°C
f = 2.2 GHz R
= 500 Ω
Input Impedance 391||0.66 Ω||pF
±3 dB Dynamic Range T
= 25°C 65 dB
62
dB
±1 dB Dynamic Range
58
dB
Maximum Input Level ±1 dB error −2 dBm
Minimum Input Level ±1 dB error −60 dBm
Slope −28 −24.4 −21.5 mV/dB
Intercept 15 19.6 25 dBm
Output Voltage—High Power In P
= −10 dBm 0.63 0.73 0.84 V
Output Voltage—Low Power In P
= −35 dBm 1.2 1.34 1.5 V
Temperature Sensitivity P
= −10 dBm
25°C ≤ T
≤ 105°C 0.0052 dB/°C
−55°C ≤ T
≤ +25°C 0.0034 dB/°C
AD8318-EP Enhanced Product
Rev. 0 | Page 4 of 12
Parameter Test Conditions/Comments Min Typ Max Unit
f = 3.6 GHz R
= 51 Ω
Input Impedance 119||0.7 Ω||pF
±3 dB Dynamic Range T
= 25°C 70 dB
−55°C < T
< +105°C 61 dB
±1 dB Dynamic Range
58
dB
Maximum Input Level ±1 dB error −2 dBm
Minimum Input Level ±1 dB error –60 dBm
Slope −24.3 mV/dB
Intercept 19.8 dBm
Output Voltage—High Power In P
= −10 dBm 0.717 V
Output Voltage—Low Power In P
= −40 dBm 1.46 V
Temperature Sensitivity P
= −10 dBm
25°C ≤ T
≤ 105°C 0.0012 dB/°C
−55°C ≤ T
≤ +25°C 0.009 dB/°C
f = 5.8 GHz R
= 1000 Ω
Input Impedance 33||0.59 Ω||pF
±3 dB Dynamic Range T
= 25°C 70 dB
−55°C < T
< +105°C 62 dB
±1 dB Dynamic Range
57
dB
Maximum Input Level ±1 dB error −1 dBm
Minimum Input Level ±1 dB error −58 dBm
Slope −24.3 mV/dB
Intercept 25 dBm
Output Voltage—High Power In P
= −10 dBm 0.86 V
Output Voltage—Low Power In P
= −40 dBm 1.59 V
Temperature Sensitivity P
= −10 dBm
25°C ≤ T
≤ 105°C 0.019 dB/°C
−55°C ≤ T
≤ +25°C 0.0096 dB/°C
f = 8.0 GHz R
= 500 Ω
±3 dB Dynamic Range T
= 25°C 60 dB
−55°C < T
< +105°C 58 dB
Maximum Input Level
3
dBm
Minimum Input Level ±3 dB error −55 dBm
Slope −23 mV/dB
Intercept 37 dBm
Output Voltage—High Power In P
= −10 dBm 1.06 V
Output Voltage—Low Power In P
= −40 dBm 1.78 V
Temperature Sensitivity P
= −10 dBm
25°C ≤ T
≤ 105°C 0.032 dB/°C
−55°C ≤ T
≤ +25°C 0.0078 dB/°C
OUTPUT INTERFACE VOUT (Pin 6)
Voltage Swing V
= 0 V; P
= −10 dBm, no load
4.9 V
V
= 2.1 V; P
= −10 dBm, no load1 25 mV
Output Current Drive V
= 1.5 V; P
= −50 dBm 60 mA
Small Signal Bandwidth P
= −10 dBm; from CLPF to VOUT 60 MHz
Video Bandwidth (or Envelope Bandwidth)
45
MHz
Output Noise P
= 2.2 GHz; −10 dBm, f
= 100 kHz, C
= 220 pF 90 nV/√Hz
Fall Time P
= Off to −10 dBm, 90% to 10% 10 ns
Rise Time P
= −10 dBm to off, 10% to 90% 12 ns
Enhanced Product AD8318-EP
Rev. 0 | Page 5 of 12
Parameter Test Conditions/Comments Min Typ Max Unit
VSET INTERFACE VSET (Pin 7)
Nominal Input Range P
= 0 dBm; measurement mode
0.5
P
= −65 dBm; measurement mode2 2.1 V
Logarithmic Scale Factor −0.04 dB/mV
Bias Current Source
2.5
μA
TEMPERATURE REFERENCE TEMP (Pin 13)
Output Voltage T
= 25°C, R
= 10 kΩ 0.57 0.6 0.63 V
Temperature Slope −55°C ≤ T
≤ +105°C, R
= 10 kΩ 2 mV/°C
Current Source/Sink T
= 25°C 10/0.1 mA
POWER-DOWN INTERFACE ENBL (Pin 16)
Logic Level to Enable Device
1.7
V
ENBL Current When Enabled ENBL = 5 V <1 μA
ENBL Current When Disabled ENBL = 0 V; sourcing 15 μA
POWER INTERFACE VPSI (Pin 3 and Pin 4), VPSO (Pin 9)
Supply Voltage 4.5 5 5.5 V
Quiescent Current ENBL = 5 V 50 68 82 mA
vs. Temperature −55°C ≤ T
≤ +105°C 150 μA/°C
Supply Current when Disabled ENBL = 0 V, total currents for VPSI and VPSO 260 μA
vs. Temperature −55°C ≤ T
≤ +105°C 350 μA
1 Controller mode.
2 Gain = 1. For other gains, see the AD8318 data sheet.
AD8318-EP Enhanced Product
Rev. 0 | Page 6 of 12
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage: Pin VPSO, Pin VPSI
5.7 V
ENBL, V
SET
Voltage 0 to V
POS
Input Power (Single-Ended, re: 50 Ω) 12 dBm
Internal Power Dissipation 0.73 W
θ
JA
1 55°C/W
Maximum Junction Temperature 130°C
Operating Temperature Range −55°C to +105°C
Storage Temperature Range
−65°C to +150°C
1 With package die paddle soldered to thermal pads with vias connecting
to inner and bottom layers.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Enhanced Product AD8318-EP
Rev. 0 | Page 7 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12
CMIP
11
CMIP
10
TADJ
9
VPSO
1
CMIP
2
CMIP
3
VPSI
4
VPSI
13
TEMP
8
CMOP
14
INHI
7
VSET
15
INLO
6
VOUT
16
ENBL
5
CLPF
AD8318-EP
10783-002
NOTES
1. THE EX P OSE D P ADDLE IS INTE RNALL Y
CONNE CTED T O CMIP ( S OL DE R TO GRO UND) .
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 11, 12 CMIP Device Common (Input System Ground).
3, 4
VPSI
Positive Supply Voltage (Input System): 4.5 V to 5.5 V. Voltage on Pin 3, Pin 4, and Pin 9 should be equal.
5 CLPF Loop Filter Capacitor.
6 VOUT Measurement and Controller Output.
7 VSET Setpoint Input for Controller Mode or Feedback Input for Measurement Mode.
8 CMOP Device Common (Output System Ground).
9 VPSO Positive Supply Voltage (Output System): 4.5 V to 5.5 V. Voltage on Pin 3, Pin 4, and Pin 9 should be equal.
10 TADJ Temperature Compensation Adjustment.
13 TEMP Temperature Sensor Output.
14 INHI RF Input. Nominal input range: −60 dBm to 0 dBm (re: 50 Ω), ac-coupled.
15 INLO RF Common for INHI. AC-coupled RF common.
16 ENBL Device Enable. Connect to VPSI for normal operation. Connect pin to ground for disable mode.
Paddle
The Exposed Paddle is Internally Connected to CMIP (Solder to Ground).
AD8318-EP Enhanced Product
Rev. 0 | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C Black; −55°C Blue;
+105°C Red.
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
VOUT (V)
PIN (dBm)
10783-004
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
ERRO R ( dB)
Figure 4. VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
Typical Device
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
VOUT (V)
PIN (dBm)
10783-005
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
ERRO R ( dB)
Figure 5. VOUT and Log Conformance vs. Input Amplitude at 1.9 GHz,
Typical Device
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
V
OUT
(V)
P
IN
(d Bm)
10783-006
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
ERRO R ( dB)
Figure 6. VOUT and Log Conformance vs. Input Amplitude at 2.2 GHz,
Typical Device
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
VOUT (V)
PIN (dBm)
10783-007
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
ERRO R ( dB)
Figure 7. VOUT and Log Conformance vs. Input Amplitude at 3.6 GHz,
Typical Device, RTADJ = 51 Ω
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
VOUT (V)
PIN (dBm)
10783-008
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
ERRO R ( dB)
Figure 8. VOUT and Log Conformance vs. Input Amplitude at 5.8 GHz,
Typical Device, RTADJ = 1000 Ω
2.4
2.0
2.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
–65 –55 –45 –35 –25 –15 –5 515
6
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
V
OUT
(V)
ERRO R ( dB)
P
IN
(d Bm)
10783-009
Figure 9. VOUT and Log Conformance vs. Input Amplitude at 8 GHz,
Typical Device
Enhanced Product AD8318-EP
Rev. 0 | Page 9 of 12
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C Black; −55°C Blue;
+105°C Red.
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-010
Figure 10. Distribution of Error over Temperature After Ambient
Normalization vs. Input Amplitude at 900 MHz for at Least 70 Devices
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-011
Figure 11. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 1900 MHz for at Least 70 Devices
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-012
Figure 12. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 2.2 GHz for at Least 70 Devices
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-013
Figure 13. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 3.6 GHz for at Least 70 Devices,
RTADJ = 51 Ω
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-014
Figure 14. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 5.8 GHz for at Least 70 Devices,
RTADJ = 1000 Ω
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
–6
–65 –55 –45 –35 –25 –15 –5 515
P
IN
(d Bm)
ERRO R ( dB)
10783-115
Figure 15. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 8 GHz for at Least 70 Devices
AD8318-EP Enhanced Product
Rev. 0 | Page 10 of 12
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C Black; −55°C Blue;
+105°C Red.
j2
–j2
j0.5
–j0.5
j0.2
–j0.2
00.20.51
S
TART F REQUE NCY = 0.1GHz
S
TOP FRE Q UE NC Y = 8G Hz
j1
–j1
5.8GHz
8GHz
3.6GHz 2.2GHz
1.9GHz
0.9GHz
0.1GHz
2
10783-015
Figure 16. Input Impedance vs. Frequency; No Termination Resistor on
INHI, ZO = 50 Ω
0.07
0
0.01
0.02
0.03
0.04
0.05
0.06
1.41.51.61.71.8
VENBL (V)
SUPP LY CURRENT (A)
DECREAS ING VENBL INCREASING V ENBL
10783-016
Figure 17. Supply Current vs. Enable Voltage
20ns P ER HORIZ ONTAL DIVISIO N
VOUT
GND
200mV/VERTICAL
DIVISION
PULSED RF INPUT 0.1GHz,
–10dBm
10783-017
Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm;
CLPF = Open
10k
1k
100
10 1 3 10 30 100 300 1k 3k 10k
FRE QUENCY ( kHz)
NOISE SPE CTRAL DEN SIT Y (n V / Hz )
–40dBm
–20dBm
–10dBm
0dBm
RF O F F
–60dBm
10783-018
Figure 19. Noise Spectral Density of Output; CLPF = Open
1k
100
10 1 3 10 30 100 300 1k 3k 10k
FREQUE NCY ( kHz)
NOISE SPECTRAL DENSITY (nV/ Hz)
10783-019
Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT);
CLPF = 0.1 μF
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
–65 –55 –45 –35 –25 –15 –5 5 15
P
IN
(dBm)
V
OUT
(V)
2.0
–2.0
–1.6
–1.2
–0.8
–0.4
0
0.4
0.8
1.2
1.6
ERROR (dB)
10783-020
+25°C
–40°C
+85°C
Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz
When VP Varies by 10%, Multiple Devices
Enhanced Product AD8318-EP
Rev. 0 | Page 11 of 12
OUTLINE DIMENSIONS
COMPLIANT
TO
JEDEC S TANDARDS MO-220- WG GC.
111908-A
1
0.65
BSC
BOTTOM VIEWTOP VI EW
16
5
8
9
1213
4
EXPOSED
PAD
PI N 1
INDICATOR
4.10
4.00 S Q
3.90
0.70
0.60
0.50
SEATING
PLANE
0.80
0.75
0.70 0.05 MAX
0.02 NOM
0.20 RE F
0.25 M IN
COPLANARITY
0.08
PI N 1
INDICATOR
0.35
0.30
0.25
2.25
2.10 S Q
1.95
FOR PRO P E R CONNECTI ON O F
THE EXPOSED PAD, REFER TO
THE P IN CONFI GURAT IO N AND
FUNCTION DES CRIPTI ONS
SECTION OF THIS DATA SHEET.
Figure 22. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-23)
Dimensions shown in millimeters
ORDERING GUIDE
Model1, 2
Temperature
Range Package Description Package Option
Ordering
Quantity
AD8318SCPZ-EP-RL7
−55°C to +105°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-23 1,500
AD8318SCPZ-EP-R2 −55°C to +105°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-23 250
AD8318SCPZ-EP-WP −55°C to +105°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-23 64
AD8318-EP-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
2 WP = waffle pack.
AD8318-EP Enhanced Product
Rev. 0 | Page 12 of 12
NOTES
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10783-0-7/12(0)