Supervisory Circuits with Watchdog and
Manual Reset in 5-Lead SC70 and SOT-23
ADM823/ADM824/ADM825
Rev. B
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FEATURES
Precision 2.5 V to 5 V power supply monitor
7 reset threshold options: 2.19 V to 4.63 V
140 ms (minimum) reset timeout
Watchdog timer with 1.6 sec timeout (ADM823, ADM824)
Manual reset input (ADM823, ADM825)
Push-pull output stages
RESET (ADM823)
RESET, RESET (ADM824/ADM825)
Low power consumption: 5 μA
Guaranteed reset output valid to VCC = 1 V
Power supply glitch immunity
Specified over automotive temperature range
5-lead SC70 and SOT-23 packages
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
FUNCTIONAL BLOCK DIAGRAM
ADM823
V
CC
V
CC
MR
GND WDI
RESET
RESET
GENERATOR
WATCHDOG
DETECTOR
DEBOUNCE
V
REF
04534-001
Figure 1.
GENERAL DESCRIPTION
The ADM823/ADM824/ADM825 are supervisory circuits that
monitor power supply voltage levels and code execution integrity
in microprocessor-based systems. In addition to providing
power-on reset signals, an on-chip watchdog timer can reset the
microprocessor if it fails to strobe within a preset timeout
period. A reset signal can also be asserted by an external push-
button, through a manual reset input. The three parts feature
different combinations of watchdog input, manual reset input,
and output stage configuration, as shown in Table 1.
These parts are available in a choice of seven reset threshold
options ranging from 2.19 V to 4.63 V. The reset and watchdog
timeout periods are fixed at 140 ms (minimum) and 1.6 sec
(typical), respectively.
The ADM823/ADM824/ADM825 are available in 5-lead SC70
and SOT-23 packages and typically consume only 5 µA, making
them suitable for use in low power, portable applications.
Table 1. Selection Table
Part No. Watchdog Timer Manual Reset
Output Stage
RESET RESET
ADM823 Yes Yes Push-Pull –
ADM824 Yes – Push-Pull Push-Pull
ADM825 – Yes Push-Pull Push-Pull
ADM823/ADM824/ADM825
Rev. B | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Circuit Description ........................................................................... 9
Reset Output ..................................................................................9
Manual Reset Input .......................................................................9
Watchdog Input .............................................................................9
Applications Information .............................................................. 10
Watchdog Input Current ........................................................... 10
Negative-Going VCC Transients ................................................ 10
Ensuring Reset Valid to VCC = 0 V ........................................... 10
Watchdog Software Considerations ......................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
5/08—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Table 4 ............................................................................ 6
Changes to Ordering Guide .......................................................... 11
2/07—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Ordering Guide .......................................................... 11
10/04—Revision 0: Initial Version
ADM823/ADM824/ADM825
Rev. B | Page 3 of 12
SPECIFICATIONS
VCC = 4.75 V to 5.5 V for ADM82xL, VCC = 4.5 V to 5.5 V for ADM82xM, VCC = 3.15 V to 3.6 V for ADM82xT, VCC = 3 V to 3.6 V
for ADM82xS, VCC = 2.7 V to 3.6 V for ADM82xR, VCC = 2.38 V to 2.75 V for ADM82xZ, VCC = 2.25 V to 2.75 V for ADM82xY,
TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 1 5.5 V TA = 0°C to 70°C
1.2 V TA = TMIN to TMAX
Supply Current 10 24 μA WDI and MR unconnected
ADM82xL/M
5 12 μA
WDI and MR unconnected
ADM82xT/S/R/Z/Y
RESET THRESHOLD VOLTAGE
ADM82xL 4.56 4.63 4.70 V TA = 25°C
4.50 4.75 V TA = TMIN to TMAX
ADM82xM 4.31 4.38 4.45 V TA = 25°C
4.25 4.50 V TA = TMIN to TMAX
ADM82xT 3.04 3.08 3.11 V TA = 25°C
3.00 3.15 V TA = TMIN to TMAX
ADM82xS 2.89 2.93 2.96 V TA = 25°C
2.85 3.00 V TA = TMIN to TMAX
ADM82xR 2.59 2.63 2.66 V TA = 25°C
2.55 2.70 V TA = TMIN to TMAX
ADM82xZ (SC70 Only) 2.28 2.32 2.35 V TA = 25°C
2.25 2.38 V TA = TMIN to TMAX
ADM82xY (SC70 Only) 2.16 2.19 2.22 V TA = 25°C
2.13 2.25 V TA = TMIN to TMAX
RESET THRESHOLD TEMPERATURE COEFFICIENT 40 ppm/°C
RESET THRESHOLD HYSTERESIS 10 mV ADM82xL/M
5 mV ADM82xT/S/R/Z/Y
RESET TIMEOUT PERIOD 140 200 280 ms
VCC TO RESET DELAY 40 μs VTH − VCC = 100 mV
RESET/RESET
RESET Output Voltage 0.4 V
VCC = VTH min, ISINK = 3.2 mA,
ADM82xL/M
0.3 V
VCC = VTH min, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
0.3 V
TA = 0°C to 70°C, VCC = 1 V,
VCC falling, ISINK = 50 μA
V
CC − 1.5 V VCC = VTH max, ISOURCE = 120 μA,
ADM82xL/M
0.8 × VCC V VCC = VTH max, ISOURCE = 30 μA,
ADM82xT/S/R/Z/Y
RESET Output Voltage (ADM824, ADM825) 0.4 V VCC = VTH max, ISINK = 3.2 mA,
ADM82xL/M
0.3 V
VCC = VTH max, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
0.8 × VCC V VCC ≥ 1.8 V, ISOURCE = 150 μA
ADM823/ADM824/ADM825
Rev. B | Page 4 of 12
Parameter Min Typ Max Unit Test Conditions/Comments
WATCHDOG INPUT (ADM823, ADM824)
Watchdog Timeout Period 1.12 1.6 2.40 sec
WDI Pulse Width 50 ns VIL = 0.4 V, VIH = 0.8 × VCC
WDI Input Threshold, VIL 0.7 × VCC 0.3 × VCC V
WDI Input Current 120 160 μA VWDI = VCC, time average
−20 −15 μA VWDI = 0 V, time average
MANUAL RESET INPUT (ADM823, ADM825)
MR Input Threshold 0.7 × VCC 0.3 × VCC V
MR Input Pulse Width 1 μs
MR Glitch Rejection 100 ns
MR Pull-Up Resistance 35 52 75 kΩ
MR to Reset Delay 500 ns
ADM823/ADM824/ADM825
Rev. B | Page 5 of 12
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC −0.3 V to +6 V
Output Current (RESET, RESET) 20 mA
All Other Pins −0.3 V to (VCC + 0.3 V)
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance
SC70 146°C/W
SOT-23 270°C/W
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADM823/ADM824/ADM825
Rev. B | Page 6 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM823
TOP VIEW
(Not to Scale)
RESET
1
GND
2
MR
3
V
CC
WDI
5
4
04534-002
RESET
1
GND
2
RESET
3
V
CC
WDI
5
4
04534-003
ADM824
TOP VIEW
(Not to Scale)
ADM825
TOP VIEW
(Not to Scale)
RESET
1
GND
2
RESET
3
V
CC
MR
5
4
04534-004
Figure 2. ADM823 Pin Configuration Figure 3. ADM824 Pin Configuration Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 RESET Active Low, Push-Pull Reset Output. Asserted whenever VCC is below the reset threshold, VTH.
2 GND Ground.
3 MR (ADM823) Manual Reset Input. This is an active low input which, when forced low for at least 1 μs, generates
a reset. It features a 52 kΩ internal pull-up.
RESET (ADM824/ADM825) Active High, Push-Pull Reset Output.
4 WDI (ADM823/ADM824)
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
MR (ADM825) Manual Reset Input. This is an active low input which, when forced low for at least 1 μs, generates
a reset. It features a 52 kΩ internal pull-up.
5 VCC Power Supply Voltage Being Monitored.
ADM823/ADM824/ADM825
Rev. B | Page 7 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
04534-005
TEMPERATURE (°C)
120–40 –20 0 20 40 60 80 100
I
CC
(µA)
10.0
9.0
9.5
8.0
7.5
8.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
ADM823L
ADM824Y
ADM825R
04534-008
TEMPERATURE (°C)
120–40 40200–20 60 80 100
V
CC
TO RESET DELAY (µs)
100
80
90
60
50
70
40
30
20
10
0
Figure 8. Reset Comparator Propagation Delay vs. Temperature (VCC Falling) Figure 5. Supply Current vs. Temperature
04534-006
VCC (V)
5.502.01.51.00.5 2.5 3.0 3.5 4.0 4.5 5.0
ICC (µA)
80
70
75
60
55
65
50
45
40
35
30
20
10
25
15
5
0
04534-009
TEMPERATURE (°C)
120–40 40200–20 60 80 100
MANUAL RESETTO RESET DELAY (ns)
340
300
320
260
240
280
220
200
180
160
140
120
100
Figure 6. Supply Current vs. Supply Voltage Figure 9. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM823/ADM825)
04534-010
TEMPERATURE (°C)
120–40 40200–20 60 80 100
RESET TIMEOUT PERIOD (ms)
250
230
240
210
200
220
190
180
170
04534-007
TEMPERATURE (°C)
120–40 40200–20 60 80 100
NORMALIZED RESET THRESHOLD (V)
1.05
1.03
1.04
1.01
1.00
1.02
0.99
0.98
0.97
0.96
0.95
Figure 10. Reset Timeout Period vs. Temperature Figure 7. Normalized Reset Threshold vs. Temperature
ADM823/ADM824/ADM825
Rev. B | Page 8 of 12
04534-011
TEMPERATURE (°C)
120–40 –20 0 20 40 60 80 100
WATCHDOG TIMEOUT PERIOD (s)
2.0
1.6
1.8
1.4
1.2
0.8
1.0
0.6
0.4
0.2
0
Figure 11. Watchdog Timeout Period vs. Temperature
(ADM823/ADM824)
04534-012
OVERDRIVE VOD (mV)
100010 100
MAXIMUM V
CC
TRANSIENT DURATION (µs)
160
120
140
100
60
80
40
20
0
V
TH
= 4.63V
V
TH
= 2.93V
RESET OCCURS ABOVE GRAPH
Figure 12. Maximum VCC Transient Duration vs. Reset Threshold Overdrive
04534-013
TEMPERATURE (°C)
100–50 0 50
MR MINIMUM PULSE WIDTH (ns)
190
160
180
170
150
130
140
120
110
100
Figure 13. Manual Reset Minimum Pulse Width vs. Temperature
(ADM823/ADM825)
04534-014
TEMPERATURE (°C)
160–40 10 11060
MINIMUM PULSE WIDTH (ns)
3.8
3.2
3.6
3.4
3.0
2.6
2.8
2.4
2.2
2.0
NEGATIVE PULSE
POSITIVE PULSE
Figure 14. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM823/ADM824)
ADM823/ADM824/ADM825
Rev. B | Page 9 of 12
CIRCUIT DESCRIPTION
The ADM823/ADM824/ADM825 provide microprocessor
supply voltage supervision by controlling the reset input of the
microprocessor. Code execution errors are avoided during
power-up, power-down, and brownout conditions by asserting a
reset signal when the supply voltage is below a preset threshold.
Errors are also avoided by allowing supply voltage stabilization
with a fixed timeout reset pulse after the supply voltage rises
above the threshold. In addition, problems with microprocessor
code execution can be monitored and corrected with a watchdog
timer (ADM823/ADM824). By including watchdog strobe
instructions in microprocessor code, a watchdog timer can
detect whether the microprocessor code breaks down or becomes
stuck in an infinite loop. If this happens, the watchdog timer
asserts a reset pulse that restarts the microprocessor in a known
state. If the user detects a problem with the system’s operation, a
manual reset input is available (ADM823/ADM825) to reset the
microprocessor with an external push-button, for example.
RESET OUTPUT
The ADM823 features an active low, push-pull reset output, and
the ADM824/ADM825 feature dual active low and active high
push-pull reset outputs. For active low and active high outputs,
the reset signal is guaranteed to be logic low and logic high,
respectively, for VCC ≥ 1 V.
The reset output is asserted when VCC is below the reset
threshold (VTH), when MR is driven low, or when WDI is not
serviced within the watchdog timeout period (tWD). Reset
remains asserted for the duration of the reset active timeout
period (tRP) after VCC rises above the reset threshold, after MR
transitions from low to high, or after the watchdog timer times
out. illustrates the behavior of the reset outputs. Figure 15
V
CC
1V
V
CC
0V
V
CC
0V
V
TH
V
TH
0V
V
CC
RESET
RESET
t
RD
t
RD
1V
t
RP
t
RP
04534-018
Figure 15. Reset Timing Diagram
MANUAL RESET INPUT
The ADM823/ADM825 feature a manual reset input (MR)
which, when driven low, asserts the reset output. When MR
transitions from low to high, reset remains asserted for the
duration of the reset active timeout period before deasserting.
The MR input has a 52 k internal pull-up so that the input is
always high when unconnected. An external push-button
switch can be connected between MR and ground so that the
user can generate a reset. Debounce circuitry for this purpose is
integrated on chip. Noise immunity is provided on the MR
input and fast, negative-going transients of up to 100 ns (typical)
are ignored. A 0.1 µF capacitor between MR and ground
provides additional noise immunity.
WATCHDOG INPUT
The ADM823/ADM824 feature a watchdog timer that monitors
microprocessor activity. A timer circuit is cleared with every
low-to-high or high-to-low logic transition on the watchdog
input pin (WDI), which detects pulses as short as 50 ns. If the
timer counts through the preset watchdog timeout period (tWD),
reset is asserted. The microprocessor is required to toggle the
WDI pin to avoid being reset. Failure of the microprocessor to
toggle WDI within the timeout period, therefore, indicates a
code execution error, and the reset pulse generated restarts the
microprocessor in a known state.
In addition to logic transitions on WDI, the watchdog timer is
also cleared by a reset assertion due to an undervoltage condi-
tion on VCC or by MR being pulled low. When reset is asserted,
the watchdog timer is cleared and does not begin counting again
until reset is deasserted. The watchdog timer can be disabled by
leaving WDI floating or by three-stating the WDI driver.
V
CC
1V
V
CC
0V
V
CC
0V
V
TH
0V
V
CC
WDI
RESET
t
RP
t
RD
t
WD
04534-021
Figure 16. Watchdog Timing Diagram
ADM823/ADM824/ADM825
Rev. B | Page 10 of 12
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
To minimize the watchdog input current (and minimize overall
power consumption), leave WDI low for the majority of the
watchdog timeout period. When driven high, WDI can draw as
much as 160 µA. Pulsing WDI low-high-low at a low duty cycle
reduces the effect of the large input current. When WDI is
unconnected, a window comparator disconnects the watchdog
timer from the reset output circuitry so that reset is not asserted
when the watchdog timer times out.
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply
transients, the ADM823/ADM824/ADM825 are equipped with
glitch rejection circuitry. The typical performance characteristic
in Figure 12 plots VCC transient duration vs. the transient mag-
nitude. The curves show combinations of transient magnitude
and duration for which a reset is not generated for 4.63 V and
2.93 V reset threshold parts. For example, with the 2.93 V
threshold, a transient that goes 100 mV below the threshold and
lasts 8 µs typically does not cause a reset, but if the transient is
any larger in magnitude or duration, a reset is generated. An
optional 0.1 µF bypass capacitor mounted close to VCC provides
additional glitch rejection.
ENSURING RESET VALID TO VCC = 0 V
Both active low and active high reset outputs are guaranteed to
be valid for VCC as low as 1 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active low reset output,
a resistor connected between RESET and ground pulls the output
low when it is unable to sink current. For an active high reset
output, a resistor connected between RESET and VCC pulls the
output high when it is unable to source current. A large resist-
ance such as 100 kΩ should be used so that the reset output is
not overloaded when VCC is above 1 V.
ADM823/
ADM824/
ADM825
V
CC
RESET
100kΩ
ADM824/
ADM825
V
CC
RESET
100kΩ
04534-017
Figure 17. Ensuring Reset Valid to VCC = 0 V
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessor watchdog strobe code,
quickly switching WDI low-to-high and then high-to-low
(minimizing WDI high time) is desirable for current consumption
reasons. However, a more effective way of using the watchdog
function can be considered.
A low-high-low WDI pulse within a given subroutine prevents
the watchdog timing out. However, if the subroutine becomes
stuck in an infinite loop, the watchdog cannot detect this cond-
ition because the subroutine continues to toggle WDI. A more
effective coding scheme for detecting this error involves using a
slightly longer watchdog timeout. In the program that calls the
subroutine, WDI is set high (see Figure 18). The subroutine sets
WDI low when it is called. If the program executes without error,
WDI is toggled high and low with every loop of the program.
If the subroutine enters an infinite loop, WDI is kept low, the
watchdog times out, and the microprocessor is reset.
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
INFINITE LOOP:
WATCHDOG
TIMES OUT
RESET
04534-020
Figure 18. Watchdog Flow Diagram
RESET RESET
WDI I/OMR
ADM823
VCC
MICROPROCESSOR
04534-019
Figure 19. Typical Application Circuit
ADM823/ADM824/ADM825
Rev. B | Page 11 of 12
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-203-AA
0.30
0.15
0.10 MAX
1.00
0.90
0.70
0.46
0.36
0.26
SEATING
PLANE
0.22
0.08
1.10
0.80
45
123
PIN 1
0.65 BSC
2.20
2.00
1.80
2.40
2.10
1.80
1.35
1.25
1.15
0.10 COPLANARITY
0.40
0.10
Figure 20. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
PIN 1
1.60 BSC 2.80 BSC
1.90
BSC
0.95 BSC
5
123
4
0.22
0.08
10°
5°
0°
0.50
0.30
0.15 MAX SEATING
PLANE
1.45 MAX
1.30
1.15
0.90
2.90 BSC
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-A A
Figure 21. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model Reset Threshold (V) Temperature Range Quantity Package Description Package Option Branding
ADM823LYKS-R7 4.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823LYKSZ-R714.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823LYRJ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823LYRJZ-R71
4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823MYKSZ-R71
4.38 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823MYRJZ-R71
4.38 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823TYKS-R7 3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823TYKSZ-R71
3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823TYRJ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823TYRJZ-R71
3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823SYKS-R7 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823SYKSZ-R71
2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823SYRJ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823SYRJZ-R71
2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823/ADM824/ADM825
Rev. B | Page 12 of 12
Model Reset Threshold (V) Temperature Range Quantity Package Description Package Option Branding
ADM823RYKS-R7 2.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823RYRJZ-R71
2.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823ZYKS-R7 2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823ZYKSZ-R71
2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823YYKS-R7 2.19 −40°C to +125°C 3k 5-Lead SC70 KS-5 N07
ADM823YYKSZ-R71
2.19 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM824LYKS-REEL7 4.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 N08
ADM824SYKS-REEL 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 N08
ADM824SYKSZ-REEL71
2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8G
ADM824SYRJ-REEL7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N08
ADM825LYKS-R7 4.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825LYRJ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825LYRJZ-R71
4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825MYKS-R7 4.38 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825MYRJ-R7 4.38 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825TYKS-R7 3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825TYKSZ-R71
3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
ADM825TYRJ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825TYRJZ-R71
3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825SYKS-R7 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825SYKSZ-R71
2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
ADM825SYRJ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825SYRJZ-R71
2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825RYKS-R7 2.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825RYRJ-R7 2.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825ZYKS-R7 2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
ADM825ZYKSZ-R71
2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
ADM825YYKS-R7 2.19 −40°C to +125°C 3k 5-Lead SC70 KS-5 N09
1 Z = RoHS Compliant Part.
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D04534-0-5/08(B)
