SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Operating Range 2-V to 5.5-V VCC
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC373 ...J OR W PACKAGE
SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC373 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D 8Q
4Q
GND
LE VCC
8D
7D
7Q
6Q
6D
description/ordering information
The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V VCC operation.
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP – N Tube SN74AHC373N SN74AHC373N
SOIC DW
Tube SN74AHC373DW
AHC373
SOIC
–
DW
Tape and reel SN74AHC373DWR
AHC373
40
°
Cto85
°
C
SOP – NS Tape and reel SN74AHC373NSR AHC373
–
40°C
to
85°C
SSOP – DB Tape and reel SN74AHC373DBR HA373
TSSOP PW
Tube SN74AHC373PW
HA373
TSSOP
–
PW
Tape and reel SN74AHC373PWR
HA373
TVSOP – DGV Tape and reel SN74AHC373DGVR HA373
CDIP – J Tube SNJ54AHC373J SNJ54AHC373J
–55°C to 125°CCFP – W Tube SNJ54AHC373W SNJ54AHC373W
LCCC – FK Tube SNJ54AHC373FK SNJ54AHC373FK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each latch)
INPUTS OUTPUT
OE LE D Q
L H H H
LHL L
LLX Q
0
H X X Z
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
32
LE
1D
C1
1D 1Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54AHC373 SN74AHC373
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 2 5.5 2 5.5 V
VCC = 2 V 1.5 1.5
VIH High-level input voltage VCC = 3 V 2.1 2.1 V
VCC = 5.5 V 3.85 3.85
VCC = 2 V 0.5 0.5
VIL Low-level input voltage VCC = 3 V 0.9 0.9 V
VCC = 5.5 V 1.65 1.65
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC V
VCC = 2 V –50 –50
m
A
IOH High-level output current VCC = 3.3 V ± 0.3 V –4–4
mA
VCC = 5 V ±0.5 V –8–8
mA
VCC = 2 V 50 50
m
A
IOL Low-level output current VCC = 3.3 V ± 0.3 V 4 4
mA
VCC = 5 V ±0.5 V 8 8
mA
∆t/∆v
In
p
ut transition rise or fall rate
VCC = 3.3 V ± 0.3 V 100 100
ns/V
∆t/∆v
Input
transition
rise
or
fall
rate
VCC = 5 V ±0.5 V 20 20
ns/V
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54AHC373 SN74AHC373
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 1.9 1.9
IOH = –50
m
A3 V 2.9 2.9 2.9
VOH 4.5 V 4.4 4.4 4.4 V
OH
IOH = –4 mA 3 V 2.58 2.48 2.48
IOH = –8 mA 4.5 V 3.94 3.8 3.8
2 V 0.1 0.1 0.1
IOL = 50
m
A3 V 0.1 0.1 0.1
VOL 4.5 V 0.1 0.1 0.1 V
OL
IOL = 4 mA 3 V 0.36 0.5 0.44
IOL = 8 mA 4.5 V 0.36 0.5 0.44
IIVI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1
m
A
IOZ VI = VIH or VIL, VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5
m
A
ICC VI = VCC or GND, IO = 0 5.5 V 4 40 40
m
A
CiVI = VCC or GND 5 V 4 10 10 pF
CoVO = VCC or GND 5 V 6 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C SN54AHC373 SN74AHC373
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
twPulse duration, LE high 5 5 5 ns
tsu Setup time, data before LE↓4 4 4 ns
thHold time, data after LE↓1 1 1 ns
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
TA = 25°C SN54AHC373 SN74AHC373
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
twPulse duration, LE high 5 5 5 ns
tsu Setup time, data before LE↓4 4 4 ns
thHold time, data after LE↓1 1 1 ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54AHC373 SN74AHC373
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
CL=15
p
F
7.3* 11.4* 1* 13.5* 1 13.5
ns
tPHL
C
L =
15
pF
7.3* 11.4* 1* 13.5* 1 13.5
ns
tPLH
CL=15
p
F
7* 11* 1* 13* 1 13
ns
tPHL
C
L =
15
pF
7* 11* 1* 13* 1 13
ns
tPZH
CL=15
p
F
7.3* 11.4* 1* 13.5* 1 13.5
ns
tPZL
C
L =
15
pF
7.3* 11.4* 1* 13.5* 1 13.5
ns
tPHZ
CL=15
p
F
7* 10* 1* 12* 1 12
ns
tPLZ
C
L =
15
pF
7* 10* 1* 12* 1 12
ns
tPLH
CL=50
p
F
9.8 14.9 1 17 1 17
ns
tPHL
C
L =
50
pF
9.8 14.9 1 17 1 17
ns
tPLH
CL=50
p
F
9.5 14.5 1 16.5 1 16.5
ns
tPHL
C
L =
50
pF
9.5 14.5 1 16.5 1 16.5
ns
tPZH
CL=50
p
F
9.8 14.9 1 17 1 17
ns
tPZL
C
L =
50
pF
9.8 14.9 1 17 1 17
ns
tPHZ
CL=50
p
F
9.5 13.2 1 15 1 15
ns
tPLZ
C
L =
50
pF
9.5 13.2 1 15 1 15
ns
tsk(o) CL = 50 pF 1.5** 1.5 ns
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54AHC373 SN74AHC373
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
CL=15
p
F
5* 7.2* 1* 8.5* 1 8.5
ns
tPHL
C
L =
15
pF
5* 7.2* 1* 8.5* 1 8.5
ns
tPLH
CL=15
p
F
4.9* 7.2* 1* 8.5* 1 8.5
ns
tPHL
C
L =
15
pF
4.9* 7.2* 1* 8.5* 1 8.5
ns
tPZH
CL=15
p
F
5.5* 8.1* 1* 9.5* 1 9.5
ns
tPZL
C
L =
15
pF
5.5* 8.1* 1* 9.5* 1 9.5
ns
tPHZ
CL=15
p
F
5* 7.2* 1* 8.5* 1 8.5
ns
tPLZ
C
L =
15
pF
5* 7.2* 1* 8.5* 1 8.5
ns
tPLH
CL=50
p
F
6.5 9.2 1 10.5 1 10.5
ns
tPHL
C
L =
50
pF
6.5 9.2 1 10.5 1 10.5
ns
tPLH
CL=50
p
F
6.4 9.2 1 10.5 1 10.5
ns
tPHL
C
L =
50
pF
6.4 9.2 1 10.5 1 10.5
ns
tPZH
CL=50
p
F
7 10.1 1 11.5 1 11.5
ns
tPZL
C
L =
50
pF
7 10.1 1 11.5 1 11.5
ns
tPHZ
CL=50
p
F
6.5 9.2 1 10.5 1 10.5
ns
tPLZ
C
L =
50
pF
6.5 9.2 1 10.5 1 10.5
ns
tsk(o) CL = 50 pF 1** 1 ns
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER
SN74AHC373
UNIT
PARAMETER
MIN MAX
UNIT
VOL(P) Quiet output, maximum dynamic VOL 0.8 V
VOL(V) Quiet output, minimum dynamic VOL –0.8 V
VOH(V) Quiet output, minimum dynamic VOH 4.1 V
VIH(D) High-level dynamic input voltage 3.5 V
VIL(D) Low-level dynamic input voltage 1.5 V
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 18 pF
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
VCC
VCC
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
50% VCC
50% VCC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
W aveform 1
S1 at VCC
(see Note B)
Output
W aveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈VCC
0 V
50% VCC VOL + 0.3 V
50% VCC ≈0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
TEST S1
VCC
0 V
50% VCC
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
From Output
Under Test CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1 VCC
RL = 1 kΩGND
From Output
Under Test CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
50% VCC
50% VCC 50% VCC
50% VCC
50% VCC 50% VCC
50% VCC 50% VCC
VOH – 0.3 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9686601Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9686601Q2A
SNJ54AHC
373FK
5962-9686601QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686601QR
A
SNJ54AHC373J
5962-9686601QSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9686601QS
A
SNJ54AHC373W
SN74AHC373DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI -40 to 85
SN74AHC373DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74AHC373N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74AHC373N
SN74AHC373NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74AHC373N
SN74AHC373NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373
SN74AHC373PW ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI -40 to 85
SN74AHC373PWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SN74AHC373PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA373
SNJ54AHC373FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9686601Q2A
SNJ54AHC
373FK
SNJ54AHC373J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686601QR
A
SNJ54AHC373J
SNJ54AHC373W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9686601QS
A
SNJ54AHC373W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 3
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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OTHER QUALIFIED VERSIONS OF SN54AHC373, SN74AHC373 :
•Catalog: SN74AHC373
•Military: SN54AHC373
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74AHC373DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74AHC373DGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74AHC373DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74AHC373NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74AHC373PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74AHC373DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74AHC373DGVR TVSOP DGV 20 2000 367.0 367.0 35.0
SN74AHC373DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74AHC373NSR SO NS 20 2000 367.0 367.0 45.0
SN74AHC373PWR TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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