S-8244 Series
www.sii-ic.com
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK
(SECONDARY PROTECTION)
© Seiko Instruments Inc., 2003-2012 Rev.6.1_00
Seiko Instruments Inc. 1
The S-8244 Series is used for secondary protection of lithium-ion batteries with from one to four cells, and incorporates a
high-precision voltage detector circuit and a delay circuit. Short-circuits between cells accommodate series connection of
one to four cells.
Features
(1) Internal high-precision voltage detector circuit
• Overcharge detection voltage range : 3.700 V to 4.500 V : Accuracy of ± 25 mV (at +25°C)
(at a 5 mV/step) Accuracy of ± 50 mV (at −40°C to +85°C)
• Hysteresis : 5 types
0.38 ± 0.1 V, 0.25 ± 0.07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V, None
(2) High withstand voltage device : Absolute maximum rating : 26 V
(3) Wide operating voltage range : 3.6 V to 24 V (refers to the range in which the delay circuit can operate
normally after overvoltage is detected)
(4) Delay time during detection : Can be set by an external capacitor.
(5) Low current consumption : At 3.5 V for each cell : 3.0 μA max. (+25°C)
At 2.3 V for each cell : 2.4 μA max. (+25°C)
(6) Output logic and form : 5 types
CMOS output active “H”
CMOS output active “L”
Pch open drain output active “L”
Nch open drain output active “H”
Nch open drain output active “L”
(CMOS / Nch open drain output for 0.045 V hysteresis models)
(7) Lead-free, Sn 100%, halogen-free*1
*1. Refer to “ Product Name Structure” for details.
Applications
• Lithium ion rechargeable battery packs (secondary protection)
Packages
• SNT-8A
• 8-Pin MSOP
• TMSOP-8
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
2
Block Diagram
VCC
ICT
VC2
VC1
-
+
CO
SENSE
VC3
Control
logic
Overcharge detection
comparator 4
Overcharge detection
comparator 3
Overcharge detection
comparator 2
Overcharge detection
comparator 1
Reference voltage 4
Reference voltage 3
Reference voltage 2
Reference voltage 1
VSS
-
+
-
+
-
+
Overcharge
detection
delay circuit
Remark In the case of Nch open-drain output, only the Nch transistor will be connected to the CO pin.
In the case of Pch open-drain output, only the Pch transistor will be connected to the CO pin.
Figure 1
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 3
Product Name Structure
1. Product Name
(1) SNT-8A
S-8244A xx PH - xxx TF x
Environmental code
U: Lead-free (Sn 100%), halogen-free
G: Lead-free (for details, please contact our sales office)
IC direction of tape specifications*1
Product name (abbreviation)*2
Package abbreviation
PH: SNT-8A
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape specifications at the end of this book.
*2. Refer to the “3. Product Name List”.
(2) 8-Pin MSOP
S-8244A xx FN - xxx T2 x
Environmental code
S: Lead-free, halogen-free
G: Lead-free (for details, please contact our sales office)
IC direction of tape specifications*1
Product name (abbreviation)*2
Package abbreviation
FN: 8-Pin MSOP
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape specifications at the end of this book.
*2. Refer to the “3. Product Name List”.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
4
(3) TMSOP-8
S-8244A xx FM - xxx T2 U
Environmental code
U: Lead-free (Sn 100%), halogen-free
IC direction of tape specifications*1
Product name (abbreviation)*2
Package abbreviation
FM: TMSOP-8
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape specifications at the end of this book.
*2. Refer to the “3. Product Name List”.
2. Packages
Drawing code
Package name Package Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
8-Pin MSOP FN008-A-P-SD FN008-A-C-SD FN008-A-R-SD ⎯
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD ⎯
3. Product Name List
(1) SNT-8A
Table 1
Product name/Item Overcharge detection voltage
[VCU] Overcharge hysteresis voltage
[VCD] Output form
S-8244AAAPH-CEATFx 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABPH-CEBTFx 4.200 ± 0.025 V 0 V Nch open drain active “H”
S-8244AADPH-CEDTFx 4.200 ± 0.025 V 0 V Pch open drain active “L”
S-8244AAFPH-CEFTFx 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGPH-CEGTFx 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJPH-CEJTFx 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AASPH-CESTFx 4.350 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAVPH-CEVTFx 4.275 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAYPH-CEYTFx 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAZPH-CEZTFx 4.280 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABBPH-CFBTFx 4.380 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABDPH-CFDTFx 4.150 ± 0.025 V 0.045 ± 0.02 V CMOS output active “L”
S-8244ABEPH-CFETFx 4.215 ± 0.025 V 0 V Nch open drain active “L”
S-8244ABHPH-CFHTFx 4.280 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
Remark 1. Please contact our sales office for the products with the detection voltage value other than those specified above.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 5
(2) 8-Pin MSOP
Table 2
Product name/Item Overcharge detection voltage
[VCU] Overcharge hysteresis voltage
[VCD] Output form
S-8244AAAFN-CEAT2z 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABFN-CEBT2z 4.200 ± 0.025 V 0 V Nch open drain active “H”
S-8244AACFN-CECT2z 4.115 ± 0.025 V 0.13 ± 0.04 V CMOS output active “H”
S-8244AADFN-CEDT2z 4.200 ± 0.025 V 0 V Pch open drain active “L”
S-8244AAEFN-CEET2z 4.225 ± 0.025 V 0 V Nch open drain active “H”
S-8244AAFFN-CEFT2z 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGFN-CEGT2z 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAHFN-CEHT2z 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAIFN-CEIT2z 4.400 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJFN-CEJT2z 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAKFN-CEKT2z 4.475 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AALFN-CELT2z 4.350 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAMFN-CEMT2z 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “L”
S-8244AANFN-CENT2z 4.150 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAOFN-CEOT2z 4.250 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAPFN-CEPT2z 4.050 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAQFN-CEQT2z 4.150 ± 0.025 V 0 V Nch open drain active “H”
S-8244AARFN-CERT2z 4.300 ± 0.025 V 0.25 ± 0.07 V Nch open drain active “H”
S-8244AATFN-CETT2z 4.200 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAUFN-CEUT2z 3.825 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAWFN-CEWT2z 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “L”
S-8244AAXFN-CEXT2z 4.025 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABAFN-CFAT2z 4.220 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244ABGFN-CFGT2S 4.225 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABIFN-CFIT2S 4.100 ± 0.025 V 0 V Nch open drain active “L”
S-8244ABJFN-CFJT2S 4.325 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABKFN-CFKT2S 4.175 ± 0.025 V 0 V Nch open drain active “L”
Remark 1. Please contact our sales office for the products with the detection voltage value other than those specified above.
2. z: G or S
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
(3) TMSOP-8
Table 3
Product name/Item Overcharge detection voltage
[VCU] Overcharge hysteresis voltage
[VCD] Output form
S-8244AAAFM-CEAT2U 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAFFM-CEFT2U 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAPFM-CEPT2U 4.050 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAUFM-CEUT2U 3.825 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAXFM-CEXT2U 4.025 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABGFM-CFGT2U 4.225 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABIFM-CFIT2U 4.100 ± 0.025 V 0 V Nch open drain active “L”
S-8244ABJFM-CFJT2U 4.325 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABKFM-CFKT2U 4.175 ± 0.025 V 0 V Nch open drain active “L”
Remark Please contact our sales office for the products with the detection voltage value other than those specified above.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
6
Pin Configurations
Table 4
Pin No. Symbol Description
1 CO FET gate connection pin for charge control
2 ICT
Capacitor connection pin for overcharge detection
delay
3 VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
4 VC3
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
5 VC2
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
6 VC1
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
SNT-8A
Top view
1
2
3
4
CO
ICT
VSS
VC3 6
8
7
5
VCC
SENSE
VC1
VC2
7 SENSE Connection pin for battery 1’s positive voltage
Figure 2 8 VCC Input pin for posit ive power supply
Table 5
Pin No. Symbol Description
1 VCC Input pin for positive power supply
2 SENSE Connection pin for battery 1’s positive voltage
3 VC1
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
4 VC2
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
5 VC3
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
6 VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
8-Pin MSOP
Top view
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
3
2
4
1 8
6
7
5
7 ICT
Capacitor connection pin for overcharge detection
delay
Figure 3 8 CO FET gate connection pin for charge control
Table 6
Pin No. Symbol Description
1 VCC Input pin for positive power supply
2 SENSE Connection pin for battery 1’s positive voltage
3 VC1
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
4 VC2
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
5 VC3
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
6 VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
3
2
4
1 8
6
7
5
CO
ICT
VSS
VC3
VCC
SENSE
VC2
VC1
TMSOP-8
Top view
7 ICT
Capacitor connection pin for overcharge detection
delay
Figure 4 8 CO FET gate connection pin for charge control
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 7
Absolute Maximum Ratings
Table 7 (Ta = 25°C unless otherwise specified)
Item Symbol Applied pin Rating Unit
Input voltage between VCC and VSS VDS VCC VSS−0.3 to VSS +26 V
Delay capacitor connection pin voltage VICT ICT VSS −0.3 to VCC +0.3 V
Input pin voltage VIN SENSE, VC1,
VC2, VC3 VSS −0.3 to VCC +0.3 V
(CMOS output) VSS −0.3 to VCC +0.3 V
(Nch open drain output) VSS −0.3 to 26 V
CO output pin
voltage (Pch open drain output) VCO CO VCC −26 to VCC +0.3 V
SNT-8A 450*1 mW
8-Pin MSOP 500*1 mW
Power
dissipation TMSOP-8 PD
⎯
650*1 mW
Operating ambient temperature Topr
⎯
−40 to +85 °C
Storage temperature Tstg
⎯
−40 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Name : JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
0 50 100 150
Ambient Temperature (Ta) [°C]
700
600
500
400
300
200
100
0
Power Dissipation (P
D
) [mW]
TMSOP-8
8-Pin MSOP
SNT-8A
Figure 5 Power Dissipation of Package (When Mounted on Board)
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
8
Electrical Characteristics
Table 8 (Ta = 25 °C unless otherwise specified)
Item
Symbol
Conditions Min. Typ. Max. Unit
Test
conditions Test circuit
DETECTION VOLTAGE
Overcharge detection voltage 1 *1
V
CU1
3.7 V to 4.5 V Adjustment V
CU1
−
0.025 V
CU1
V
CU1
+
0.025 V 1 1
Overcharge detection voltage 2 *1
V
CU2
3.7 V to 4.5 V Adjustment V
CU2
−
0.025 V
CU2
V
CU2
+
0.025 V 2 1
Overcharge detection voltage 3 *1
V
CU3
3.7 V to 4.5 V Adjustment V
CU3
−
0.025 V
CU3
V
CU3
+
0.025 V 3 1
Overcharge detection voltage 4 *1
V
CU4
3.7 V to 4.5 V Adjustment V
CU4
−
0.025 V
CU4
V
CU4
+
0.025 V 4 1
Overcharge hysteresis voltage 1 *2
V
CD1
⎯
0.28 0.38 0.48 V 1 1
Overcharge hysteresis voltage 2 *2
V
CD2
⎯
0.28 0.38 0.48 V 2 1
Overcharge hysteresis voltage 3 *2
V
CD3
⎯
0.28 0.38 0.48 V 3 1
Overcharge hysteresis voltage 4 *2
V
CD4
⎯
0.28 0.38 0.48 V 4 1
Detection voltage
temperature coefficient *3
T
COE
Ta =
−
40
°
C to
+
85
°
C
*4
−
0.4 0.0
+
0.4 mV/
°
C
⎯
⎯
DELAY TIME
Overcharge detection delay time
t
CU
C = 0.1
μ
F 1.0 1.5 2.0 s 5 2
OPERATING VOLTAGE
Operating voltage
between VCC and VSS *5
V
DSOP
⎯
3.6
⎯
24 V
⎯
⎯
CURRENT CONSUMPTION
Current consumption
during normal operation
I
OPE
V1 = V2 = V3 = V4 = 3.5 V
⎯
1.5 3.0
μ
A 6 3
Current consumption at
power down
I
PDN
V1 = V2 = V3 = V4 = 2.3 V
⎯
1.2 2.4
μ
A 6 3
VC1 sink current
I
VC1
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
VC2 sink current
I
VC2
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
VC3 sink current
I
VC3
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
OUTPUT VOLTAGE*6
CO “H” voltage
V
CO(H)
at I
OUT
= 10
μ
A V
CC
−
0.05
⎯
⎯
V 7 4
CO “L” voltage
V
CO(L)
at I
OUT
= 10
μ
A
⎯
⎯
V
SS
+
0.05 V 7 4
*1. ± 50 mV when Ta = −40°C to +85°C.
*2. 0.25 ± 0. 07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V except for 0. 38 V hysteresis models.
*3. Overcharge detection voltage or overcharge hysteresis voltage.
*4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*5. After detecting the overcharge, the delay circuit operates normally in the range of operat i ng voltage.
*6. Output logic and CMOS or open drain output can be selected.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 9
Test Circuits
(1) Test Condition 1, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS out put active “H”, Nch open drain output active “H”
The overcharge detection voltage 1 (V CU1) is a voltage at V1; when the CO pin’s volt age is set to “H” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO = “L”,
and the difference of this V1’s volt age and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 1 (VCU1) is a volt age at V1; when the CO pin’s voltage is set to “L” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO =
“H”, and the difference of t his V1’s voltage and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
(2) Test Condition 2, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS out put active “H”, Nch open drain output active “H”
The overcharge detection voltage 2 (V CU2) is a voltage at V2; when the CO pin’s voltage is set to “H” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After t hat, gradually decreasing V2’s voltage to set CO = “L”,
and the difference of this V2’s volt age and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 2 (V CU2) is a voltage at V2; when t he CO pin’s voltage is set to “L” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V2’s voltage to set CO =
“H”, and the difference of t his V2’s voltage and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
(3) Test Condition 3, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS out put active “H”, Nch open drain output active “H”
The overcharge detection voltage 3 (V CU3) is a voltage at V3; when the CO pin’s voltage is set to “H” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After t hat, gradually decreasing V3’s voltage to set CO = “L”,
and the difference of this V3’s volt age and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 3 (V CU3) is a voltage at V3; when t he CO pin’s voltage is set to “L” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V3’s voltage to set CO =
“H”, and the difference of t his V3’s voltage and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
10
(4) Test Condition 4, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS out put active “H”, Nch open drain output active “H”
The overcharge detection voltage 4 (V CU4) is a voltage at V4; when the CO pin’s voltage is set to “H” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO = “L”,
and the difference of this V4’s volt age and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 4 (VCU4) is a volt age at V4; when the CO pin’s voltage is set to “L” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO =
“H”, and the difference of t his V4’s voltage and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
(5) Test Condition 5, Test Circuit 2
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS out put active “H”, Nch open drain output active “H”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “H” is the overcharge detection delay time (tCU).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “L” is the overcharge detection delay time (tCU).
(6) Test Condition 6, Test Circuit 3
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 2.3 V. This I1 is current consumpt ion at power-down
(IPDN).
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 3.5 V. This I1 is current consumption during normal
operation (IOPE), I2 is the VC1 sink current (IVC1), I3 is the VC2 sink current (IVC2), I4 is the VC3 sink current (IVC3).
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 11
(7) Test Condition 7, Test Circuit 4
Measure setting switch 1 to OFF and switch 2 to ON.
• Product with CMOS output active “H”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually aft er setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s volt age when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with CMOS output active “L”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually aft er setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s volt age when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with Pch open drain output active “L”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
• Product with Nch open drain output active “H”
Increase V6 from 0 V gradually aft er setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s volt age when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with Nch open drain output active “L”
Increase V6 from 0 V gradually aft er setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s volt age when flowing I2 = 10 μA
is the VCO(L) voltage.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
12
10 MΩ
10 MΩ
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
V
10 MΩ
10 MΩ
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
0.1
μ
F V
Test Circuit 1
Test Circuit 2
V1
V2
V3
V4
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
I1 I2
I3 I4
V5
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3 V6
I2
I1
V
Test Circuit 3
Test Circuit 4
Figure 6
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 13
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
1. Overcharge Detection
• Product with CMOS out put active “H”, Nch open drain output active “H”
During charging in the normal status, any of battery voltages exceeds overcharge detection voltage (V CU), and this
status is maintained for overcharge detection delay time (tCU) or longer, CO gets “H”. This is overcharge status.
Connecting an FET t o the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until all battery voltages decreases, to the overcharge
hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
• Product with CMOS out put active “L”, Nch open drain output active “L”, Pch open drain output active “L”
During charging in the normal status, any of battery voltages exceeds overcharge detection volt age (VCU), and this
status is maintained for overcharge detection delay time (tCU) or longer, CO gets “L”. This is overcharge status.
Connecting an FET t o the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until all battery voltages decreases, to the overcharge
hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
2. Delay Circuit
The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a specified
voltage when the voltage of one of the batteries exceeds t he overcharge detection voltage (V CU). Then, the delay
circuit gradually discharges the capacitor at 100 nA and inverts the CO output when the voltage at the delay
capacitor connection pin goes below a specified level. Overcharge detection delay time (tCU) varies depending
upon the external capacitor.
Each delay time is calculated using the following equation.
Min. Typ. Max.
tCU[s] = Delay Coefficient (10, 15, 20) × CICT [μF]
Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference bet ween t he
maximum voltage and the specified value of delay capacitor pin (ICT pin). This will cause a deviation between the
calculated delay time and the resultant delay time. Also, delay time is internally set in this IC to prevent the CO
output from inverting until the charge to delay capacitor pin is reached to the specified voltage. If large
capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay
time.
Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1 μF.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
14
Timing Chart
VCU
Battery voltage
VSS
CO pin voltage
VCC
CO pin voltage
VSS
Delay
VSS
ICT pin voltage
VCC
CMOS output active “H” and
Nch open drain output active “H” products
CMOS output active “L” ,
Pch open drain output active “L” and
Nch open drain output active “L” products
VCD V1 battery V2 battery V3 battery V4 battery
VSS
Figure 7
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 15
Battery Protection IC Connection Example
(1) Connection Example 1
SC PROTECTOR
EB−
CVCC
CICT
C1
C2
C3
C4
EB+
R1
R2
R3
R4
BAT1
BAT2
BAT3
BAT4
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 8
Table 9 Constants for External Components 1
Symbol Min. Typ. Max. Unit
R1 to R4 0 1 k 10 k Ω
C1 to C4 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform through evaluation using the actual application to set
the constant.
[For SC PROTECTOR, contact]
Sony Chemical & Information Device Corporation, Electronic Device Marketing & Sales Dept.
Gate City Osaki East Tower 8F, 1-11-2
Osaki, Shinagawa-ku, Tokyo, 141-0032 Japan
TEL +81-3-5435-3943
Contact Us: http://www.sonycid.jp/en/
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
16
(2) Connection Example 2 (for 3-cells)
SC PROTECTOR
EB−
CVCC
CICT
C1
C2
C3
EB+
R1
R2
R3
BAT1
BAT2
BAT3
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 9
Table 10 Constants for External Components 2
Symbol Min. Typ. Max. Unit
R1 to R3 0 1 k 10 k Ω
C1 to C3 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform through evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 17
(3) Connection Example 3 (for 2-cells)
SC PROTECTOR
EB−
CVCC
CICT
C1
C2
EB+
R1
R2
BAT1
BAT2
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 10
Table 11 Constants for External Components 3
Symbol Min. Typ. Max. Unit
R1, R2 0 1 k 10 k Ω
C1, C2 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform through evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
18
(4) Connection Example 4 (for 1-cell)
EB−
CVCC
CICT
C1
EB+
R1
BAT1
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
SC PROTECTOR
Figure 11
Table 12 Constants for External Components 4
Symbol Min. Typ. Max. Unit
R1 0 1 k 10 k Ω
C1 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform through evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.6.1_00 S-8244 Series
Seiko Instruments Inc. 19
Precautions
• This IC charges the delay capacitor through the delay capacitor pin (ICT pin) immediately when the voltage of one of
batteries V1 to V4 reaches the overcharge voltage. Therefore, setting the resistor connected to the VCC pin to any
value greater than the recommended level causes a reduction in the IC power supply voltage because of charge
current of the delay capacitor. This may lead to a malfunction. Set up the resistor NOT t o exceed the typical value.
If you change the resistance, please consult us.
• DO NOT connect any of overcharged batteries. Even if only one overcharged battery is connected to this I C, the IC
detects overcharge, then charge current flows to the delay capacitor through the parasitic diode between pins where
the battery is not connected yet. This may lead to a malfunction. Please perform sufficient evaluation in the case of
use. Depending on an applicat ion circuit, even when the fault charge battery is not contained, the connection t urn of
a battery may be restricted in order to prevent the output of CO detection pulse at the time of battery connection.
VCU
Battery voltage
Setting voltage
VCC
CO pin voltage
VSS
VSS
ICT pin voltage
CMOS output active “H” and Nch open drain output active “H” products
VCD V1 battery V2 battery V3 battery V4 battery
Internal delay
Delay
CICT low
CICT high
CICT low
CICT high
VSS
• In this IC, the output logic of the CO pin is inverted after several milliseconds of internal delay if this IC is under the
overcharge condition even ICT pin is either “VSS−short circuit,” “VDD−short circuit” or “Open” status.
• Any position from V1 to V4 can be used when applying this IC for a one to three-cell battery. However, be sure to
short circuit between pins not in use (SENSE−VC1, VC1−VC2, VC2−VC3, or VC3−VSS).
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the
products including this IC upon patents owned by a third party.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.6.1_00
Seiko Instruments Inc.
20
Characteristics (Typical Data)
1. Detection Voltage vs. Temperature
Overcharge Detection Voltage vs. Temperat ure Overcharge Release Voltage vs. Temperature
4.35
4.45
4.55
−40 −20 0 20 40 60 80 100
Ta [°C]
VCU [V]
S-8244AAAFN VCU = 4.45 V
3.97
4.07
4.17
−40 −20 0 20 40 60 80 100
Ta [°C]
VCU−VCD [V]
S-8244AAAFN VCD = 0.38 V
2. Current Consumption vs. Temperature
Current Consumption during Normal Operation vs. Temperature Current Consumption at Power Down vs. Temperature
IOPE [μA]
0
1
2
3
−40 −20 0 20 40 60 80 100
S-8244AAAFN VCC = 14.0 V
Ta [°C]
0
1
2
3
−40 −20 0 20 40 60 80 100
IPDN [μA]
S-8244AAAFN VCC = 9.2 V
Ta [°C]
3. Delay Time vs. Temperature
Overcharge Detection Delay Time vs. Temperature
0
1
2
3
−40 −20 0 20 40 60 80 100
tCU [s]
S-8244AAAFN VCC = 15.2 V
Ta [°C]
Caution Please design all applications of the S-8244 Series with safety in mind.
1.97±0.03
0.2±0.05
0.48±0.02
0.08
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PH008-A-C-SD-1.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-1.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
5°
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
SCALE
UNIT mm
SNT-8A-A-Land Recommendation
Seiko Instruments Inc.
PH008-A-L-SD-3.0
0.3
0.20.3
0.20.3
0.52
2.01
0.52
No. PH008-A-L-SD-3.0
0.3 0.2
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
2.95±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
MSOP8-A-PKG Dimensions
No. FN008-A-P-SD-1.1
FN008-A-P-SD-1.1
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
0.3±0.05
1.35±0.15
1.05±0.05
1.55±0.05
2.0±0.05
4.0±0.1
3.1±0.15
4.0±0.1
1
4
58
MSOP8-A-Carrier Tape
Feed direction
No. FN008-A-C-SD-1.1
FN008-A-C-SD-1.1
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
16.5max.
13.0±0.3
QTY. 3,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
MSOP8-A-Reel
No. FN008-A-R-SD-1.1
FN008-A-R-SD-1.1
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
2.90±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
TMSOP8-A-PKG Dimensions
No. FM008-A-P-SD-1.0
FM008-A-P-SD-1.0
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
0.30±0.05
1.00±0.1
1.05±0.05
1.55
2.00±0.05
4.00±0.1
3.25±0.05
4.00±0.1
1
4
58
TMSOP8-A-Carrier Tape
Feed direction
No. FM008-A-C-SD-1.0
FM008-A-C-SD-1.0
+0.1
-0
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
16.5max.
13.0±0.3
QTY. 4,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
FM008-A-R-SD-1.0
mm
www.sii-ic.com
• The information described herein is subject to change without notice.
• Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
• When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the approp riate governmental authority.
• Use of the information described herein for other purposes and/or reproduction or copying without the
express permissi on of Seiko Instruments Inc. is strictly prohibited.
• The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicle s, without prior written permission of Seiko Instruments Inc.
• The products described herein are not design ed to be radiation-proof.
• Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or comm unity damage that may ensue.
