Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
Features
Low Voltage and Standard Voltage Operation Available
1.7V (VCC = 1.7V to 5.5V)
2.5V (VCC = 2.5V to 5.5V)
Internally Organized 131,072 x 8
2-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400kHz (1.7V) and 1MHz (5V, 2.5V) Compatibility
Write Protect Pin for Hardware Data Protection
256-byte Page Write Mode
Partial Page Writes Allowed
Random and Sequential Read Modes
Self-timed Write Cycle (5ms Max)
High Reliability
Endurance: 1,000,000 Write Cycles
Data Retention: 40 Years
Green Package Options (Pb/Halide-free/RoHS Compliant)
8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP
Die Sale Options: Wafer Form and Tape and Reel Available
Description
The Atmel® AT24CM01 provides 1,048,576 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 131,072 words of
8 bits each. The device’s cascadable feature allows up to four devices to share a
common 2-wire bus. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are
essential. The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead
EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP. In addition, the entire family is
available in 1.7V (1.7V to 5.5V) and 2.5V (2.5V to 5.5V) versions.
AT24CM01
I2C-Compatible (2-wire) Serial EEPROM
1-Mbit (131,072 x 8)
DATASHEET
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
2
1. Pin Configurations and Pinouts
2. Absolute Maximum Ratings*
Pin Name Function
NC No Connect
A1Address Input
A2Address Input
GND Ground
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
VCC Power Supply
Note: Drawings are not to scale.
8-lead TSSOP
Top View
1
2
3
4
8
7
6
5
NC
A1
A2
GND
VCC
WP
SCL
SD
A
1
2
3
4
NC
A1
A2
GND
8
7
6
5
VCC
WP
SCL
SDA
8-lead SOIC
Top View
8-ball WLSCP
Top View
VCC
SDA
SCL A1
WP
NC
A2GND
Operating Temperature . . . . . . . . . . .-55C to +125C
Storage Temperature . . . . . . . . . . . . .-65C to +150C
Voltage on any pin
with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
3
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
3. Block Diagram
4. Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be
wire-ORed with any number of other open drain or open collector devices.
Device Addresses (A2 and A1): The A2 and A1 pins are device address inputs that can be hardwired or left not
connected for hardware compatibility with other Atmel AT24Cxx devices. When the A2 and A1 pins are
hardwired, as many as four 1-Mbit devices may be addressed on a single bus system (See “Device Addressing”
on page 9. for more details). If the A2 and A1 pins are left floating, the A2 and A1 pin will be internally pulled down
to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends
connecting the A2 and A1 pin to GND.
Write Protect (WP): The Write Protect input, when connected to GND, allows normal write operations. When
WP is connected high to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP
pin will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If
coupling is >3pF, Atmel recommends connecting the pin to GND. Switching WP to VCC prior to a write operation
creates a software write protect function.
Table 4-1. Write Protect
Start
Stop
Logic
V
CC
GND
WP
SCL
SDA
A
2
A
1
Serial
Control
Logic
EN H.V. Pump/Timing
EEPROM
Data Recovery
Serial MUX
X DEC
D
OUT
/ACK
Logic
COMP
LOAD INC
Data Word
Addr/counter
Y DEC
R/W
D
OUT
D
IN
LOAD
Device
Address
Comparator
WP Pin Status Part of the Array Protected
At VCC Full Array
At GND Normal Read/Write Operations
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
4
5. Memory Organization
AT24CM01, 1-Mbit Serial EEPROM: The 1-Mbit is internally organized as 512 pages of 256 bytes each.
Random word addressing requires a 17-bit data word address.
5.1 Pin Capacitance
Table 5-1. Pin Capacitance(1)
Note: 1. This parameter is characterized and is not 100% tested.
5.2 DC Characteristics
Table 5-2. DC Characteristics
Note: 1. VIL min and VIH max are reference only and are not tested.
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 5.5V.
Symbol Test Condition Max Units Conditions
CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V
CIN Input Capacitance (A2, A1, SCL) 6 pF VIN = 0V
Applicable over recommended operating range from: TAI = -40C to +85C, VCC = 1.7V to 5.5V (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
VCC1
Supply Voltage,
1.7V Option 1.7 5.5 V
VCC2
Supply Voltage,
2.5V Option 2.5 5.5 V
ICC Supply Current VCC = 5.0V Read at 400kHz 2.0 mA
ICC Supply Current VCC = 5.0V Write at 400kHz 3.0 mA
ISB Standby Current
VCC = 1.7V
VIN = VCC or VSS
1.0 μA
VCC = 2.5V 2.0 μA
VCC = 3.6V
VIN = VCC or VSS
3.0 μA
VCC = 5.5V 6.0 μA
ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 μA
ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 μA
VIL Input Low Level(1) -0.6 VCC x 0.3 V
VIH Input High Level(1) VCC x 0.7 VCC + 0.5 V
VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V
VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V
5
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
5.3 AC Characteristics
Table 5-3. AC Characteristics
Notes: 1. This parameter is ensured by characterization only.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.7V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50ns
Input and output timing reference voltages: 0.5 VCC
Applicable over recommended operating range from TAI = -40C to +85C, VCC = 1.7V to 5.5V (where applicable),
CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2.
Symbol Parameter
1.7V 2.5V, 5.0V
UnitsMin Max Min Max
fSCL Clock Frequency, SCL 400 1000 kHz
tLOW Clock Pulse Width Low 1300 400 ns
tHIGH Clock Pulse Width High 600 400 ns
tINoise Suppression Time(1) 100 50 ns
tAA Clock Low to Data Out Valid 50 900 50 550 ns
tBUF
Time the bus must be free before a
new transmission can start(1) 1300 500 ns
tHD.STA Start Condition Hold Time 600 250 ns
tSU.STA Start Condition Set-up Time 600 250 ns
tHD.DAT Data In Hold Time 0 0 ns
tSU.DAT Data In Set-up Time 100 100 ns
tRInputs Rise Time(1) 300 300 ns
tFInputs Fall Time(1) 300 100 ns
tSU.STO Stop Condition Set-up Time 600 250 ns
tDH Data Out Hold Time 50 50 ns
tWR Write Cycle Time 5 5 ms
Endurance(1) 25°C, Page Mode, 3.3V 1,000,000 Write Cycles
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
6
6. Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1. Data Validity
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop condition will place the EEPROM in a standby power mode.
Figure 6-2. Start and Stop Definition
SDA
SCL
Data Stable Data Stable
Data
Change
SDA
SCL
Start
Condition
Stop
Condition
7
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in eight bit
words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Figure 6-3. Output Acknowledge
Standby Mode: The AT24CM01 features a low-power standby mode which is enabled:
Upon power-up.
After the receipt of the Stop condition and the completion of any internal operation.
Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol
reset by following these steps:
1. Create a Start condition (if possible).
2. Clock nine cycles.
3. Create another Start condition followed by Stop condition as in Figure 6-4.
The device should be ready for the next communication after the above steps have been completed. In the
event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to
reset the device.
Figure 6-4. Software Reset
SCL
Data In
Data Out
Start
Condition
Acknowledge
9
8
1
SCL 9
Start
Condition Start
Condition
Stop
Condition
8321
SDA
Dummy Clock Cycles
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
8
Figure 6-5. Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Figure 6-6. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
Note: 1. The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
SCL
SDA IN
SDA OUT
tF
tHIGH
tLOW tLOW
tR
tAA tDH tBUF
tSU.STO
tSU.DAT
tHD.DAT
tHD.STA
tSU.STA
tWR
(1)
Stop
Condition
Start
Condition
WORDN
AC
8th Bit
SCL
SDA
9
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
7. Device Addressing
The 1-Mbit EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a
read or write operation (see Figure 7-1 below). The device address word consists of a mandatory ‘1010’
sequence for the first four most significant bits. This is common to all 2-wire EEPROM devices.
The 1-Mbit uses the two device address bits, A2 and A1, to allow up to four devices on the same bus. These A2
and A1 bits must compare to the corresponding hardwired input pins, A2 and A1. The A2 and A1 pins uses an
internal proprietary circuit that biases it to a logic low condition if the pin is allowed to float.
The seventh bit (P0) of the device address is a memory page address bit. This memory page address bit is the
most significant bit of the data word address that follows. The eighth bit of the device address is the read/write
operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the
device will return to a standby state.
Figure 7-1. Device Address
8. Write Operations
Byte Write: To select a data word in the 1-Mbit memory requires a 17-bit word address. The word address field
consists of the P0 bit in the device address byte, then the most significant word address followed by the least
significant word address (Figure 8-1).
A write operation requires the P0 bit and two 8-bit data word addresses following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then the part is
to receive the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The
addressing device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At
this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are
disabled during this write cycle and the EEPROM will not respond until the write is complete (Figure 8-1).
Figure 8-1. Byte Write
1Mb 1 0 1 0 A2 A1 P0 R/W
MSB LSB
SDA LINE
S
T
A
R
T
W
R
I
T
E
S
T
O
P
Device
Address
First Word
Address
Second Word
Address Data
M
S
B
A
C
K
P
0
A
C
K
L
S
B
L
S
B
A
C
K
A
C
K
R
/
W
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
10
Page Write: The 1-Mbit EEPROM is capable of a 256-byte Page Write.
A Page Write is initiated the same way as a Byte Write, but the microcontroller does not send a Stop condition
after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word,
the microcontroller can transmit up to 255 more data words. The EEPROM will respond with an acknowledge
after each data word is received. The microcontroller must terminate the page write sequence with a Stop
condition (Figure 8-2) and the internally timed write cycle will begin.
The data word address lower 8 bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the internally
generated word address, reaches the page boundary, the following byte is placed at the beginning of the same
page. If more than 256 data words are transmitted to the EEPROM, the data word address will “roll over” and
previous data will be overwritten. The address “rollover” during write is from the last byte of the current page to
the first byte of the same page.
Figure 8-2. Page Write
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address
word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed
will the EEPROM respond with a zero, allowing a new read or write sequence to be initiated.
Data Security: The AT24CM01 has a hardware data protection scheme that allows the user to write protect the
entire memory when the WP pin is at VCC.
SDA LINE
S
T
O
P
S
T
A
R
T
W
R
I
T
E
Device
Address
First Word
Address
Second Word
Address Data (n) Data (n + x)
M
S
B
A
C
K
P
0
A
C
K
L
S
B
L
S
B
A
C
K
A
C
K
A
C
K
R
/
W
11
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
9. Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit
in the device address word is set to one. There are three read operations: Current Address Read, Random
Address Read, and Sequential Read.
Current Address Read: The internal data word address counter maintains the last address accessed during
the last read or write operation, incremented by one. This address stays valid between operations as long as the
VCC to the part is maintained. The address “rollover” during read is from the last byte of the last page, to the first
byte of the first page of the memory.
Once the device address with the read/write select bit set to one is input and acknowledged by the EEPROM,
the current address data word is serially clocked out on the SDA line. The microcontroller does not respond with
a zero but does generate a following Stop condition.
Figure 9-1. Current Address Read
Random Read: A Random Read requires an initial byte write sequence to load in the data word address. This
is known as a “dummy write” operation. Once the device address word and data word address are clocked in
and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The
microcontroller now initiates a current address read by sending a device address with the read/write select bit
high. The EEPROM acknowledges the device address and serially clocks out the data word on the SDA line.
The microcontroller does not respond with a zero but does generate a following Stop condition.
Figure 9-2. Random Read
SDA LINE
S
T
A
R
T
R
E
A
D
S
T
O
P
Device
Address Data
M
S
B
A
C
K
P
0
N
O
A
C
K
R
/
W
SDA LINE
S
T
A
R
T
S
T
A
R
T
R
E
A
D
W
R
I
T
E
S
T
O
P
Device
Address
Second Word
Address
Device
Address
First Word
Address Data (n)
M
S
B
A
C
P
0
A
C
A
C
L
S
B
A
C
N
O
A
C
R
/
W
Dummy Write
P
0
R
/
W
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
12
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Read. After
the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives
an acknowledge, it will continue to increment the data word address and serially clock out sequential data
words. When the memory address limit is reached, the data word address will “roll over” and the sequential read
will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a
zero, but does generate a following Stop condition.
Figure 9-3. Sequential Read
SDA LINE
S
T
A
R
T
S
T
A
R
T
R
E
A
D
W
R
I
T
E
S
T
O
P
Device
Address
Second Word
Address
Device
Address
First Word
Address
Data (n + 1) Data (n + 2) Data (n + x)
Data (n)
M
S
B
A
C
K
P
0
A
C
K
A
C
K
L
S
B
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
R
/
W
Dummy Write
. . .
. . .
P
0
R
/
W
13
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
10. Ordering Code Detail
Atmel Designator
Product Family
24C = Standard I
2
C
Serial EEPROM
Device Density
Shipping Carrier Option
Package Device Grade or
Wafer/Die Thickness
Package Option
M = Megabit Family
01 = 1 Megabit
B or blank = Bulk (Tubes)
T = Tape and Reel
Operating Voltage
M = 1.7V to 5.5V
D = 2.5V to 5.5V
H = Green, NiPdAu Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
U = Green, Matte Sn Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
11 = 11mil Wafer Thickness
SS = JEDEC SOIC
S = EIAJ SOIC
X = TSSOP
U = 3x5 Grid Array, WLCSP
WWU = Wafer Unsawn
AT24CM01-SSHM-B
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
14
11. Part Markings
DRAWING NO. REV. TITLE
24CM01SM F
12/12/14
24CM01SM, AT24CM01 Package Marking Information
Package Mark Contact:
DL-CSO-Assy_eng@atmel.com
AAAAAAAA
###% @
ATMLHYWW
8-lead SOIC
8-lead TSSOP
AAAAAAA
###% @
ATHYWW
8-ball WLCSP
Note 2: Package drawings are not to scale
Note 1: designates pin 1
AT24CM01: Package Marking Information
Catalog Number Truncation
AT24CM01 Truncation Code ###: 2G
Date Codes Voltages
Y = Year M = Month WW = Work Week of Assembly % = Minimum Voltage
4: 2014 8: 2018 A: January 02: Week 2 D: 2.5V min
5: 2015 9: 2019 B: February 04: Week 4 M: 1.7V min
6: 2016 0: 2020 ... ...
7: 2017 1: 2021 L: December 52: Week 52
Country of Assembly Lot Number Grade/Lead Finish Material
@ = Country of Assembly AAA...A = Atmel Wafer Lot Number H: Industrial/NiPdAu
U: Industrial/Matte Tin/SnAgCu
Trace Code Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code) AT: Atmel
Example: AA, AB.... YZ, ZZ ATM: Atmel
ATML: Atmel
%U
###
YXX
8-lead EIAJ
AAAAAAAA
###% @
ATMLHYWW
15
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
12. Ordering Information
Notes: 1. WLCSP Package — CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells.
Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light does not occur.
2. For wafer sales, please contact Atmel Sales.
Atmel Ordering Code Lead Finish Package Voltage
Delivery Information Operation
Range
Form Quantity
AT24CM01-SSHM-B
NiPdAu
(Lead-free/Halogen-free)
8S1
1.7V to 5.5V
Bulk (Tubes) 100 per Tube
Industrial
Temperature
(-40C to 85C)
AT24CM01-SSHM-T Tape and Reel 4,000 per Reel
AT24CM01-SSHD-B
2.5V to 5.5V
Bulk (Tubes) 100 per Tube
AT24CM01-SSHD-T Tape and Reel 4,000 per Reel
AT24CM01-SHM-B
8S2
1.7V to 5.5V
Bulk (Tubes) 95 per Tube
AT24CM01-SHM-T Tape and Reel 2,000 per Reel
AT24CM01-SHD-B
2.5V to 5.5V
Bulk (Tubes) 95 per Tube
AT24CM01-SHD-T Tape and Reel 2,000 per Reel
AT24CM01-XHM-B
8X
1.7V to 5.5V
Bulk (Tubes) 100 per Tube
AT24CM01-XHM-T Tape and Reel 5,000 per Reel
AT24CM01-XHD-B
2.5V to 5.5V
Bulk (Tubes) 100 per Tube
AT24CM01-XHD-T Tape and Reel 5,000 per Reel
AT24CM01-UUM-T(1) SnAgCu
(Lead-free/Halogen-free) 8U-6
1.7V to 5.5V
Tape and Reel 5,000 per Reel
AT24CM01-WWU11M(2) N/A Wafer Sale Note 2
Package Type
8S1 8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8S2 8-lead, 0.208” wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8X 8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP)
8U-6 8-ball, 3x5 Grid Array, Wafer Level Chip Scale (WLCSP)
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
16
13. Packaging Information
13.1 8S1 — 8-lead JEDEC SOIC
DRAWING NO. REV. TITLE GPC
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
A1 0.10 – 0.25
A 1.35 – 1.75
b 0.31 – 0.51
C 0.17 – 0.25
D 4.80 – 5.05
E1 3.81 – 3.99
E 5.79 – 6.20
e 1.27 BSC
L 0.40 – 1.27
Ø
Ø
0° – 8°
Ø
E
1
N
TOP VIEW
C
E1
END VIEW
A
b
L
A1
e
D
SIDE VIEW
Package Drawing Contact:
packagedrawings@atmel.com
8S1 G
6/22/11
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC) SWB
17
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
13.2 8S2 — 8-lead EIAJ SOIC
DRAWING NO. REV. TITLE GPC
8S2, 8-lead, 0.208” Body, Plastic
Small Outline Package (EIAJ) 8S2 G
11/10/14
STN
Package Drawing Contact:
packagedrawings@atmel.com
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
Notes: 1. This drawing is for general information only; refer to EIAJ
Drawing EDR-7320 for additional information.
2. Mismatch of the upper and lower dies and resin burrs aren't
included.
3. Determines the true geometric position.
4. Values b,C apply to plated terminal. The standard thickness
of the plating layer shall measure between 0.007 to .021 mm.
A 1.70 2.16
A1 0.05 0.25
b 0.35 0.48 4
C 0.15 0.35 4
D 5.13 5.35
E1 5.18 5.40 2
E 7.70 8.26
L 0.51 0.85
q 0° 8°
e 1.27 BSC 3
q
1
8
E
TOP VIEW
C
E1
END VIEW
A
b
L
A1
e
D
SIDE VIEW
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
18
13.3 8X — 8-lead TSSOP
DRAWING NO. REV. TITLE GPC
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
A - - 1.20
A1 0.05 - 0.15
A2 0.80 1.00 1.05
D 2.90 3.00 3.10 2, 5
E 6.40 BSC
E1 4.30 4.40 4.50 3, 5
b 0.19 0.25 0.30 4
e 0.65 BSC
L 0.45 0.60 0.75
L1 1.00 REF
C 0.09 - 0.20
Side View
End View
Top View
A2
A
L
L1
D
1
E1
N
b
Pin 1 indicator
this corner
E
e
Notes: 1. This drawing is for general information only.
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
Package Drawing Contact:
packagedrawings@atmel.com
8X E
2/27/14
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP) TNR
C
A1
19
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
13.4 8U-6 — 8-ball WLCSP
—
DRAWING NO. REV. TITLE GPC
8U-6 B
4/25/13
8U-6, 8-ball (3x5 Array) Wafer Level Chip Scale
Package (WLCSP) GHZ
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN TYP MAX NOTE
A 0.460 0.499 0.538
A1 0.164 - 0.224
A2 0.280 0.305 0.330
E Contact Atmel for details
e 0.866
e2 0.500
d 1.000
d2 0.500
D
Contact Atmel for details
b 0.239 0.269 0.299
Package Drawing Contact:
packagedrawings@atmel.com
TOP VIEW SIDE VIEW BALL SIDE
Pin Assignment Matrix
A B C D E
1
2
3
WP
A2
VCC
SDA
D
Ee
d
Øb
Pin 1
Pin 1
A2
A
A1
AEC
3
2
1
3
2
1
d2
e2
SCL A1
NC
GND
BD
AECBD
d
0.015 C
A
4X
d
0.075 C
C
jn
0.015
m
C
jn
0.05
m
CAB
* Dimensions are NOT to scale.
AT24CM01 [DATASHEET]
Atmel-8812F-SEEPROM-AT24CM01-Datasheet_012015
20
14. Revision History
Doc. No. Date Comments
8821F 01/2015 Update the ordering information section, part markings, and the 8X and 8S2 package outline
drawings.
8821E 03/2013
Update document status from preliminary to complete.
Correct WLCSP pinout.
Update footers and disclaimer page.
8812D 01/2013 Correct TSSOP pin label 7 to WP.
8812C 12/2012
Add WLCSP package.
Update part markings.
Update pinout diagram.
Update part markings.
Correct Byte Write figure from second typo error to first word address.
Update Sequential Read figure.
8812B 07/2012
Correct ordering code:
- AT24CM01-WWU-11, Die Sale to AT24CM01-WWU11M, Wafer Sale.
Update Atmel logos and disclaimer page.
8812A 05/2012 Initial document release.
X
XXX
XX
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