Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
To all our customers
Cautions
Keep safety first in your circuit designs!
1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better
and more reliable, but th ere is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regar ding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corporation product best suited to the customer's application; they do not convey any
license under any intellectual property rights, or any other rights, belonging to Renesas Technology
Corporation or a third party.
2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any
third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corporation without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corporation
or an authorized Renesas Technology Corporation product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss
rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corporation by various
means, including the Renesas Technology Corporation Semiconductor home page
(http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams,
charts, programs, and algorithms, please be sure to evaluate all information as a total system before
making a final decision on the applicability of the information and products. Renesas Technology
Corpo r ation assumes no respon sibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device
or system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor
when considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be
exported under a license from the Japanese government and cannot be imported into a country other
than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
country of destination is prohibited.
8. Please contact Renesas Technology Corporation for further details on these materials or the products
contained therein.
HM62W16255HC Series
4M High Speed SRAM (256-kword × 16-bit)
ADE-203-1200D (Z)
Rev. 3.0
Dec. 5, 2002
Description
The HM62W16255HC is a 4-Mbit high speed static RAM organized 256-kword × 16-bit. It has realized high
speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing
technology. It is most appropriate for the application which requires high speed, high density memory and
wide bit width configuration, such as cache and buffer memory in system. The HM62W16255HC is
packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.
Features
• Single 3.3 V supply: 3.3 V ± 0.3 V
• Access time: 10/12 ns (max)
• Completely static memory
No clock or timing strobe required
• Equal access and cycle times
• Directly TTL compatible
All inputs and outputs
• Operating current: 145/130 mA (max)
• TTL standby current: 40 mA (max)
• CMOS standby current : 5 mA (max)
: 1 mA (max) (L-version)
• Data retention current: 0.6 mA (max) (L-version)
• Data retention voltage: 2.0 V (min) (L-version)
• Center VCC and VSS type pin out
HM62W16255HC Series
Rev.3, Dec. 2002, page 2 of 18
Ordering Information
Type No. Access time Device marking Package
HM62W16255HCJP-10
HM62W16255HCJP-12
10 ns
12 ns
HM62W16255CJP10
HM62W16255CJP12
400-mil 44-pin plastic SOJ (CP-44D)
HM62W16255HCLJP-10
HM62W16255HCLJP-12
10 ns
12 ns
HM62W16255CLJP10
HM62W16255CLJP12
HM62W16255HCTT-10
HM62W16255HCTT-12
10 ns
12 ns
HM62W16255CTT10
HM62W16255CTT12
400-mil 44-pin plastic TSOPII (TTP-44DE)
HM62W16255HCLTT-10
HM62W16255HCLTT-12
10 ns
12 ns
HM62W16255CLTT10
HM62W16255CLTT12
HM62W16255HC Series
Rev.3, Dec. 2002, page 3 of 18
Pin Arrangement
A0
A1
A2
A3
A4
I/O1
I/O2
I/O3
I/O4
V
CC
V
SS
I/O5
I/O6
I/O7
I/O8
A5
A6
A7
A8
A9
(Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
I/O16
I/O15
I/O14
I/O13
V
SS
V
CC
I/O12
I/O11
I/O10
I/O9
NC
A14
A13
A12
A11
A10
44-pin SOJ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A0
A1
A2
A3
A4
I/O1
I/O2
I/O3
I/O4
VCC
VSS
I/O5
I/O6
I/O7
I/O8
A5
A6
A7
A8
A9
A17
A16
A15
I/O16
I/O15
I/O14
I/O13
VSS
VCC
I/O12
I/O11
I/O10
I/O9
NC
A14
A13
A12
A11
A10
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
44-pin TSOP
(Top View)
Pin Description
Pin name Function
A0 to A17 Address input
I/O1 to I/O16 Data input/output
CS Chip select
OE Output enable
WE Write enable
UB Upper byte select
LB Lower byte select
VCC Power supply
VSS Ground
NC No connection
HM62W16255HC Series
Rev.3, Dec. 2002, page 4 of 18
Block Diagram
Memory matrix
1024 rows × 32 columns ×
8 blocks × 16 bit
(4,194,304 bits)
CS
V
CC
V
SS
A8 A9 A17 A15 A16 A0 A2 A4
Column I/O
Column decoder
I/O1
Input
data
control
Row
decoder
CS
CS
I/O16
I/O9
I/O8
.
.
.
.
.
.
A14
A13
A12
A5
A6
A7
A11
A10
A3
A1
(LSB)
(LSB)
(MSB)
(MSB)
HM62W16255HC Series
Rev.3, Dec. 2002, page 5 of 18
Operation Table
CS
CSCS
CS
OE
OEOE
OE
WE
WEWE
WE
LB
LBLB
LB
UB
UBUB
UB
Mode VCC current I/O1−
−−
−I/O8 I/O9−
−−
−I/O16 Ref. cycle
H × × × × Standby ISB, ISB1 High-Z High-Z
L H H × × Output disable ICC High-Z High-Z
L L H L L Read ICC Output Output Read cycle
L L H L H Lower byte read ICC Output High-Z Read cycle
L L H H L Upper byte read ICC High-Z Output Read cycle
L L H H H I
CC High-Z High-Z
L × L L L Write ICC Input Input Write cycle
L × L L H Lower byte write ICC Input High-Z Write cycle
L × L H L Upper byte write ICC High-Z Input Write cycle
L × L H H I
CC High-Z High-Z
Note: H: VIH, L: VIL, ×: VIH or VIL
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply voltage relative to VSS V
CC −0.5 to +4.6 V
Voltage on any pin relative to VSS V
T −0.5*1 to VCC + 0.5*2 V
Power dissipation PT 1.0 W
Operating temperature Topr 0 to +70 °C
Storage temperature Tstg −55 to +125 °C
Storage temperature under bias Tbias −10 to +85 °C
Notes: 1. VT (min) = −2.0 V for pulse width (under shoot) ≤ 6 ns.
2. VT (max) = VCC + 2.0 V for pulse width (over shoot) ≤ 6 ns.
HM62W16255HC Series
Rev.3, Dec. 2002, page 6 of 18
Recommended DC Operating Conditions
(Ta = 0 to +70°C)
Parameter Symbol Min Typ Max Unit
Supply voltage VCC*3 3.0 3.3 3.6 V
V
SS*4 0 0 0 V
Input voltage VIH 2.0 V
CC + 0.5*2 V
V
IL −0.5*1 0.8 V
Notes: 1. VIL (min) = −2.0 V for pulse width (under shoot) ≤ 6 ns.
2. VIH (max) = VCC + 2.0 V for pulse width (over shoot) ≤ 6 ns.
3. The supply voltage with all VCC pins must be on the same level.
4. The supply voltage with all VSS pins must be on the same level.
DC Characteristics
(Ta = 0 to +70°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V)
Parameter Symbol Min Typ*1 Max Unit Test conditions
Input leakage current |ILI| 2 µA VIN = VSS to VCC
Output leakage current |ILO| 2 µA VIN = VSS to VCC
Operation power
supply current
10 ns cycle ICC 145 mA Min cycle
CS = VIL, IOUT = 0 mA
Other inputs = VIH/VIL
12 ns cycle ICC 130 mA
Standby power supply current ISB 40 mA Min cycle, CS = VIH,
Other inputs = VIH/VIL
I
SB1 2.5 5 mA f = 0 MHz
VCC ≥ CS ≥ VCC − 0.2 V,
(1) 0 V ≤ VIN ≤ 0.2 V or
(2) VCC ≥ VIN ≥ VCC − 0.2 V
*2 0.5*2 1.0*2 mA
Output voltage VOL 0.4 V IOL = 8 mA
V
OH 2.4 V IOH = −4 mA
Notes: 1. Typical values are at VCC = 3.3 V, Ta = +25°C and not guaranteed.
2. This characteristics is guaranteed only for L-version.
HM62W16255HC Series
Rev.3, Dec. 2002, page 7 of 18
Capacitance
(Ta = +25°C, f = 1.0 MHz)
Parameter Symbol Min Typ Max Unit Test conditions
Input capacitance*1 C
IN 6 pF VIN = 0 V
Input/output capacitance*1 C
I/O 8 pF VI/O = 0 V
Note: 1. This parameter is sampled and not 100% tested.
HM62W16255HC Series
Rev.3, Dec. 2002, page 8 of 18
AC Characteristics
(Ta = 0 to +70°C, VCC = 3.3 V ± 0.3 V, unless otherwise noted.)
Test Conditions
• Input pulse levels: 3.0 V/0.0 V
• Input rise and fall time: 3 ns
• Input and output timing reference levels: 1.5 V
• Output load: See figures (Including scope and jig)
Output load (B)
(for tCLZ, tOLZ, tBLZ, tCHZ, tOHZ,
tBHZ, tWHZ, and tOW)
DOUT
353 Ω
319 Ω
3.3 V
5 pF
1.5 V
30 pF
DOUT
RL = 50 Ω
Output load (A)
Zo = 50 Ω
Read Cycle
HM62W16255HC
-10 -12
Parameter Symbol Min Max Min Max Unit Notes
Read cycle time tRC 10 12 ns
Address access time tAA 10 12 ns
Chip select access time tACS 10 12 ns
Output enable to output valid tOE 5 6 ns
Byte select to output valid tBA 5 6 ns
Output hold from address change tOH 3 3 ns
Chip select to output in low-Z tCLZ 3 3 ns 1
Output enable to output in low-Z tOLZ 0 0 ns 1
Byte select to output in low-Z tBLZ 0 0 ns 1
Chip deselect to output in high-Z tCHZ 5 6 ns 1
Output disable to output in high-Z tOHZ 5 6 ns 1
Byte deselect to output in high-Z tBHZ 5 6 ns 1
HM62W16255HC Series
Rev.3, Dec. 2002, page 9 of 18
Write Cycle
HM62W16255HC
-10 -12
Parameter Symbol Min Max Min Max Unit Notes
Write cycle time tWC 10 12 ns
Address valid to end of write tAW 7 8 ns
Chip select to end of write tCW 7 8 ns 8
Write pulse width tWP 7 8 ns 7
Byte select to end of write tBW 7 8 ns
Address setup time tAS 0 0 ns 5
Write recovery time tWR 0 0 ns 6
Data to write time overlap tDW 5 6 ns
Data hold from write time tDH 0 0 ns
Write disable to output in low-Z tOW 3 3 ns 1
Output disable to output in high-Z tOHZ 5 6 ns 1
Write enable to output in high-Z tWHZ 5 6 ns 1
Notes: 1. Transition is measured ±200 mV from steady voltage with output load (B). This parameter is
sampled and not 100% tested.
2. If the CS or LB or UB low transition occurs simultaneously with the WE low transition or after the
WE transition, output remains a high impedance state.
3. WE and/or CS must be high during address transition time.
4. If CS, OE, LB and UB are low during this period, I/O pins are in the output state. Then the data
input signals of opposite phase to the outputs must not be applied to them.
5. tAS is measured from the latest address transition to the latest of CS, WE, LB or UB going low.
6. tWR is measured from the earliest of CS, WE, LB or UB going high to the first address transition.
7. A write occurs during the overlap of a low CS, a low WE and a low LB or a low UB (tWP). A write
begins at the latest transition among CS going low, WE going low and LB going low or UB going
low. A write ends at the earliest transition among CS going high, WE going high and LB going
high or UB going high.
8. tCW is measured from the later of CS going low to the end of write.
HM62W16255HC Series
Rev.3, Dec. 2002, page 10 of 18
Timing Waveforms
Read Timing Waveform (1) (WE = VIH)
t
AA
t
ACS
t
OE
t
BA
t
BLZ
t
OLZ
t
CLZ
t
OH
t
CHZ
t
OHZ
t
BHZ
t
RC
Address Valid address
Valid data
D
OUT
CS
OE
LB
,
UB
High impedance
*
1
*
1
*
1
*
1
*
1
*
1
*
4
*
4
HM62W16255HC Series
Rev.3, Dec. 2002, page 11 of 18
Read Timing Waveform (2) (WE = VIH, LB = VIL, UB = VIL)
tAA
tACS
tRC
tOE
tCLZ
Valid data
Address
CS
DOUT
Valid address
High impedance
tOHZ
OE
tOH
tCHZ
tOLZ
*1
*1
*1
*1
*4*4
HM62W16255HC Series
Rev.3, Dec. 2002, page 12 of 18
Write Timing Waveform (1) (WE Controlled)
Address
WE
*
3
t
WC
t
AW
t
AS
t
WR
t
WP
t
WHZ
t
OLZ
t
OW
t
OHZ
t
CW
t
BW
t
DH
t
DW
Valid address
Valid data
CS
*
3
OE
LB
,
UB
D
OUT
D
IN
High impedance
*
2
HM62W16255HC Series
Rev.3, Dec. 2002, page 13 of 18
Write Timing Waveform (2) (CS Controlled)
Address
CS
*
3
t
WC
t
AW
t
AS
t
WR
t
WP
t
WHZ
t
OLZ
t
OW
t
OHZ
t
CW
t
BW
t
DH
t
DW
Valid address
Valid data
WE
*
3
OE
LB
,
UB
D
OUT
D
IN
High impedance
*
2
*
4
HM62W16255HC Series
Rev.3, Dec. 2002, page 14 of 18
Write Timing Waveform (3) (LB, UB Controlled, OE = VIH)
Address
D
IN
-UB
(D
IN
-LB)
D
IN
-LB
(D
IN
-UB)
D
OUT
High impedance
Valid address
t
DW
t
DH
t
CW
t
AS
t
BW
t
WP
t
WC
t
WR
t
AW
WE
*
3
CS
*
3
UB
(
LB
)
LB
(
UB
)
t
BW
Valid data
t
DW
t
DH
Valid data
HM62W16255HC Series
Rev.3, Dec. 2002, page 15 of 18
Low VCC Data Retention Characteristics
(Ta = 0 to +70°C)
This characteristics is guaranteed only for L-version.
Parameter Symbol Min Typ Max Unit Test conditions
VCC for data retention VDR 2.0 V VCC ≥ CS ≥ VCC − 0.2 V,
(1) 0 V ≤ VIN ≤ 0.2 V or
(2) VCC ≥ VIN ≥ VCC − 0.2 V
Data retention current ICCDR 600 µA VCC = 3 V
VCC ≥ CS ≥ VCC − 0.2 V,
(1) 0 V ≤ VIN ≤ 0.2 V or
(2) VCC ≥ VIN ≥ VCC − 0.2 V
Chip deselect to data retention time tCDR 0 ns See retention waveform
Operation recovery time tR 5 ms
Low VCC Data Retention Timing Waveform
CC
V
3.0 V
0 V
t
CDR
t
R
V
CC
≥ ≥ V
CC
– 0.2 V
2.0 V
DR
V
Data retention mode
HM62W16255HC Series
Rev.3, Dec. 2002, page 16 of 18
Package Dimensions
HM62W16255HCJP/HCLJP Series (CP-44D)
28.33
28.90 Max
44 23
122
10.16 ± 0.13
11.18 ± 0.13
3.50 ± 0.26
0.10
*0.43 ± 0.10 9.40 ± 0.25
2.65 ± 0.12
0.74
1.30 Max
1.27
0.80 +0.25
–0.17
0.41 ± 0.08
Hitachi Code
JEDEC
JEITA
Mass
(reference value)
CP-44D
Conforms
—
1.8 g
*Dimension including the plating thickness
Base material dimension
As of July, 2002
Unit: mm
HM62W16255HC Series
Rev.3, Dec. 2002, page 17 of 18
HM62W16255HCTT/HCLTT Series (TTP-44DE)
Hitachi Code
JEDEC
JEITA
Mass
(reference value)
TTP-44DE
—
—
0.43 g
*Dimension including the plating thickness
Base material dimension
0.13
M
0.10
0.80
44 23
122
18.41
18.81 Max
*0.27 ± 0.07
1.20 Max
10.16
0.13 ± 0.05
11.76 ± 0.20
0˚ – 5˚
*0.145 ± 0.05
1.005 Max
0.50 ± 0.10
0.68
0.80
0.25 ± 0.05
0.125 ± 0.04
As of July, 2002
Unit: mm
HM62W16255HC Series
Rev.3, Dec. 2002, page 18 of 18
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual
property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of
bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic,
safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions
and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the
guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or
failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the
equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage
due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Sales Offices
Hitachi, Ltd.
Semiconductor & Integrated Circuits
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: (03) 3270-2111 Fax: (03) 3270-5109
Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
Hitachi Asia Ltd.
Hitachi Tower
16 Collyer Quay #20-00
Singapore 049318
Tel : <65>-6538-6533/6538-8577
Fax : <65>-6538-6933/6538-3877
URL : http://semiconductor.hitachi.com.sg
URL http://www.hitachisemiconductor.com/
Hitachi Asia Ltd.
(Taipei Branch Office)
4/F, No. 167, Tun Hwa North Road
Hung-Kuo Building
Taipei (105), Taiwan
Tel : <886>-(2)-2718-3666
Fax : <886>-(2)-2718-8180
Telex : 23222 HAS-TP
URL : http://semiconductor.hitachi.com.tw
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower
World Finance Centre,
Harbour City, Canton Road
Tsim Sha Tsui, Kowloon Hong Kong
Tel : <852>-2735-9218
Fax : <852>-2730-0281
URL : http://semiconductor.hitachi.com.hk
Hitachi Europe GmbH
Electronic Components Group
Dornacher Str 3
D-85622 Feldkirchen
Postfach 201, D-85619 Feldkirchen
Germany
Tel: <49> (89) 9 9180-0
Fax: <49> (89) 9 29 30 00
Hitachi Europe Ltd.
Electronic Components Group
Whitebrook Park
Lower Cookham Road
Maidenhead
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 778322
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive
San Jose,CA 95134
Tel: <1> (408) 433-1990
Fax: <1>(408) 433-0223
For further information write to:
Colophon 7.0
