Description
The A1150, A1152, A1153, A1155, A1156, A1157, and A1158
comprise a family of two-wire, unipolar, Hall-effect switches,
which are factory-trimmed to optimize magnetic switchpoint
accuracy. These devices are produced on the Allegro® advanced
BiCMOS wafer fabrication process, which implements
a patented high frequency, 4-phase, chopper-stabilization
technique. This technique achieves magnetic stability over
the full operating temperature range, and eliminates offsets
inherent in devices with a single Hall element that are exposed
to harsh application environments.
The A115x family has a number of automotive applications.
These include sensing seat track position, seat belt buckle
presence, hood/trunk latching, and shift selector position.
Two-wire unipolar switches are particularly advantageous in
cost-sensitive applications because they require one less wire
for operation versus the more traditional open-collector output
switches. Additionally, the system designer inherently gains
diagnostics because there is always output current flowing,
which should be in either of two narrow ranges. Any current
level not within these ranges indicates a fault condition.
A1152-DS, Rev. 5
Features and Benefits
▪ High speed, 4-phase chopper stabilization
▪ Low switchpoint drift throughout temperature range
▪ Low sensitivity to thermal and mechanical stresses
▪ On-chip protection
▫ Supply transient protection
▫ Reverse battery protection
▫ On-board voltage regulator
▫ 3.0 to 24 V operation
▪ Solid-state reliability
▪ Robust EMC and ESD performance
▪ Industry leading ISO 7637-2 performance through use of
proprietary, 40-V clamping structures
Chopper-Stabilized, T wo Wire Hall-Ef fect Switches
Continued on the next page…
Functional Block Diagram
A1 150, A1 152, A1153, A1 155, A1 156, A1157, and A1 158
Packages
Approximate footprint
3-pin SOT23-W
2 mm × 3 mm × 1 mm
(suffix LH)
3-pin ultramini SIP
1.5 mm × 4 mm × 3 mm
(suffix UA)
Amp
Regula
To all subcircuits
tor
Schmitt
Trigger
Polarity
Low-Pass
Filter
GND
VCC
GND
UA package only
0.01 μF
V+
Clock/Logic
Dynamic Offset
Cancellation
Sample and Hold
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
NC
1
2
3
1
3
2
All family members are offered in two package styles. The LH is a
SOT-23W style, miniature, low profile package for surface-mount
applications. The UA is a 3-pin, ultra-mini, single inline package
(SIP) for through-hole mounting. Both packages are lead (Pb) free,
with 100% matte tin leadframe plating.
Description (continued)
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Unit
Forward Supply Voltage VCC 28 V
Reverse Supply Voltage VRCC –18 V
Magnetic Flux Density B Unlimited G
Operating Ambient Temperature TARange L –40 to 150 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Selection Guide
Part
Number Packing1Package Output (ICC) in
South Polarity
Field
Supply Current
at I
CC(L)
(mA)
Magnetic Operate
Point, BOP
(G)
A1150LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount Low 2 to 5
50 to 110
A1150LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1152LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount Low
5 to 6.9
A1152LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1153LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount High
A1153LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1155LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount Low
5 to 6.9 20 to 60
A1155LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1156LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount High
A1156LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1157LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
Low
2 to 5 20 to 80
A1157LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount
A1157LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
A1158LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
HighA1158LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount
A1158LUA-T2Bulk, 500 pieces/bag 3-pin SIP through hole
1Contact Allegro® for additional packing options.
2Contact factory for availability.
Pin-out Diagrams
LH Package UA Package
Terminal List Table
Number Name Function
LH package UA package
1 VCC VCC Input power supply
2 NC GND LH package: no connection
UA package: ground terminal
3 GND GND Ground terminal
ELECTRICAL CHARACTERISTICS Valid at TA = –40°C to 150°C, TJ < TJ(max), CBYP = 0.01 μF, through operating supply voltage
range; unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Supply Voltage1,2 VCC Operating, TJ ≤ 165 °C 3.0 – 24 V
Supply Current
ICC(L)
A1150, A1157 B > BOP 2.0 – 5.0 mA
A1158 B < BRP
A1152, A1155 B > BOP 5 – 6.9 mA
A1153, A1156 B < BRP
ICC(H)
A1150, A1152,
A1155, A1157 B < BRP
12 – 17 mA
A1153, A1156,
A1158 B > BOP
Supply Zener Clamp Voltage VZ(sup) ICC(L)(max) + 3 mA, TA = 25°C 28 – – V
Supply Zener Clamp Current IZ(sup) VZ(sup) = 28 V – – ICC(L)(max)
+ 3 mA mA
Reverse Supply Current IRCC VRCC = –18 V – – –1.6 mA
Output Slew Rate3di/dt No bypass capacitor, capacitance of probe
CS = 20 pF –90–mA / μs
Chopping Frequency fc– 700 – kHz
Power-Up Time4,5 ton
A1150, A1152,
A1155, A1157
B > BOP + 10 G
––25μs
A1153, A1156,
A1158 B < BRP – 10 G
Power-Up State2,4,6,7 POS ton < ton(max) , VCC slew rate > 25 mV / μs–I
CC(H) ––
1VCC represents the generated voltage between the VCC pin and the GND pin.
2The VCC slew rate must exceed 600 mV/ms from 0 to 3 V. A slower slew rate through this range can affect device performance.
3Measured without bypass capacitor between VCC and GND. Use of a bypass capacitor results in slower current change.
4Power-Up Time is measured without and with bypass capacitor of 0.01 μF. Adding a larger bypass capacitor would cause longer Power-Up Time.
5Guaranteed by characterization and design.
6Power-Up State as defined is true only with a VCC slew rate of 25 mV / μs or greater.
7For t > ton and BRP < B < BOP , Power-Up State is not defined.
MAGNETIC CHARACTERISTICS1 Valid at TA = –40°C to 150°C, TJ < TJ (max); unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit2
Magnetic Operating Point BOP
A1150, A1152, A1153 50 – 110 G
A1155, A1156 20 – 60 G
A1157, A1158 20 – 80 G
Magnetic Release Point BRP
A1150, A1152, A1153 45 – 105 G
A1155, A1156 10 – 55 G
A1157, A1158 10 – 60 G
Hysteresis BHYS 5 – 30 G
1Relative values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north
magnetic polarity; therefore greater B values indicate a stronger south polarity field (or a weaker north polarity field, if present).
2 1 G (gauss) = 0.1 mT (millitesla).
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
7
8
9
2
3
4
5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
20 40 60 80 100 120 140 160 180
Temperature (ºC)
Maximum Allowable V
CC
(V)
Power Derating Curve
(R
θJA
= 228 ºC/W)
1-layer PCB, Package LH
(R
θJA
= 110 ºC/W)
2-layer PCB, Package LH
(R
θJA
= 165 ºC/W)
1-layer PCB, Package UA
VCC(min)
VCC(max)
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
20 40 60 80 100 120 140 160 180
Temperature (°C)
Power Dissipation, P
D
(mW)
Power Dissipation versus Ambient Temperature
(R
θJA
= 165 ºC/W)
1-layer PCB, Package UA
(RθJA = 228 ºC/W)
1-layer PCB, Package LH
(RθJA = 110 ºC/W)
2-layer PCB, Package LH
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance RθJA
Package LH, on 1-layer PCB with copper limited to solder pads 228 ºC/W
Package LH, on 2-layer PCB with 0.463 in.2 of copper area each side 110 ºC/W
Package UA, on 1-layer PCB with copper limited to solder pads 165 ºC/W
*Additional thermal information available on the Allegro website
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristic Performance
Supply Voltage, VCC (V)
Supply Current, ICC(H) (mA)
17
16
15
14
13
12
2 6 10 14 18 22 26
TA = 150°C
TA = –40°C
TA = 25°C
Average Supply Current (High) versus Supply Voltage
A1150/A1152/A1153/A1155/A1156/A1157/A1158
VCC = 3.0 V
VCC = 24 V
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Supply Current, ICC(H) (mA)
17
16
15
14
13
12
Average Supply Current (High) versus Temperature
A1150/A1152/A1153/A1155/A1156/A1157/A1158
5.0
4.5
4.0
3.5
3.0
2.5
2.0
Supply Current, ICC(L) (mA)
Supply Voltage, VCC (V)
2 6 10 14 18 22 26
TA = 150°C
TA = –40°C
TA = 25°C
5.0
4.5
4.0
3.5
3.0
2.5
2.0
Average Supply Current (Low) versus Supply Voltage
A1150/A1157/A1158
5.0
4.5
4.0
3.5
3.0
2.5
2.0
Ambient Temperature, TA (°C)
Supply Current, ICC(L) (mA)
-60 -40 -20 0 20 40 60 80 100 140120 160
VCC = 3.0 V
VCC = 24 V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
Ambient Temperature, TA (°C)
-60 -40 -20 0 20 40 60 80 100 140120 160
VCC = 3.0 V
VCC = 24 V
Average Supply Current (Low) versus Temperature
A1150/A1157/A1158
TA = 150°C
TA = –40°C
TA = 25°C
7.0
6.5
6.0
5.5
5.0
2 6 10 14 18 22 26
Supply Voltage, VCC (V)
Supply Current, ICC(L) (mA)
Average Supply Current (Low) versus Supply Voltage
A1152/A1153/A1155/A1156
VCC = 3.0 V
VCC = 24 V
7.0
6.5
6.0
5.5
5.0
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Supply Current, ICC(L) (mA)
Average Supply Current (Low) versus Temperature
A1152/A1153/A1155/A1156
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ambient Temperature, TA (°C)
30
25
20
15
10
5
Ambient Temperature, TA (°C)
Applied Flux Density at
Switchpoint Hysteresis, BHYS (G)
-60 -40 -20 0 20 40 60 80 100 140120 160
VCC = 3.0 V
VCC = 24 V
Average Switchpoint Hysteresis versus Temperature
A1150/A1152/A1153/A1155/A1156/A1157/A1158
VCC = 3.0 V
VCC = 24 V
Ambient Temperature, TA (°C)
-60 -40 -20 0 20 40 60 80 100 140120 160
30
25
20
15
10
5
Applied Flux Density at
Switchpoint Hysteresis, BHYS (G)
Ambient Temperature, TA (°C)
-60 -40 -20 0 20 40 60 80 100 140120 160
Average Switchpoint Hysteresis versus Temperature
A1150/A1152/A1153/A1155/A1156/A1157/A1158
VCC = 3.0 V
VCC = 24 V
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Applied Flux Density at
Release Point, BRP (G)
55
50
45
40
35
30
25
20
15
10
Average Release Point versus Temperature
A1155/A1156
VCC = 3.0 V
VCC = 24 V
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Applied Flux Density at
Release Point, BRP (G)
105
95
85
75
65
55
45
Average Release Point versus Temperature
A1150/A1152/A1153
VCC = 3.0 V
VCC = 24 V
60
55
50
45
40
35
30
25
20
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Applied Flux Density at
Operate Point, BOP (G)
Average Operate Point versus Temperature
A1155/A1156
VCC = 3.0 V
VCC = 24 V
110
100
90
80
70
60
50
-60 -40 -20 0 20 40 60 80 100 140120 160
Ambient Temperature, TA (°C)
Applied Flux Density at
Operate Point, BOP (G)
Average Operate Point versus Temperature
A1150/A1152/A1153
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Functional Description
B
OP
B
RP
B
HYS
I
CC(H)
I
CC
I
CC(L)
Switch to Low
Switch to High
B+
B–
I+
0
(A) Hysteresis curve for A1150, A1152, A1155, and A1157
B
OP
B
RP
B
HYS
I
CC(H)
I
CC
I
CC(L)
Switch to High
Switch to Low
B+
I+
B–
0
(B) Hysteresis curve for A1153, A1156, and A1158
The A1150, A1152, A1155, and A1157 output, ICC, switches low
after the magnetic field at the Hall sensor IC exceeds the oper-
ate point threshold, BOP
. When the magnetic field is reduced to
below the release point threshold, BRP
, the device output goes
high. This is shown in figure 1, panel A.
In the case of the reverse output polarity, as in the A1153, A1156,
and A1158, the device output switches high after the magnetic
field at the Hall sensor IC exceeds the operate point threshold,
BOP
. When the magnetic field is reduced to below the release
point threshold, BRP, the device output goes low (panel B).
The difference between the magnetic operate and release points
is called the hysteresis of the device, BHYS
. This built-in hyster-
esis allows clean switching of the output even in the presence of
external mechanical vibration and electrical noise.
Figure 1. Alternative switching behaviors are available in the A115x device family. On the horizontal axis, the B+ direction indicates
increasing south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the
case of increasing north polarity).
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
GND
A115x
VCC
V+
0.01 μF
A
GND
ECU Package UA Only
A
RSENSE
CBYP
GND
A115x
VCC
V+
0.01 μF
A
GND
RSENSE
CBYP
Figure 2. Typical application circuits
(A) Low side sensing (B) High side sensing
Amp
Regulator
Clock/Logic
Hall Element
Sample and
Hold
Low-Pass
Filter
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
patented Allegro technique, namely Dynamic Quadrature Offset
Cancellation, removes key sources of the output drift induced by
thermal and mechanical stresses. This offset reduction technique
is based on a signal modulation-demodulation process. The
undesired offset signal is separated from the magnetic field-
induced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
its original spectrum at base band, while the DC offset becomes
a high-frequency signal. The magnetic-sourced signal then can
pass through a low-pass filter, while the modulated DC offset is
suppressed. The chopper stabilization technique uses a 350 kHz
high frequency clock. For demodulation process, a sample and
hold technique is used, where the sampling is performed at twice
the chopper frequency. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall out-
put voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
and-hold circuits.
Figure 3. Chopper stabilization circuit (Dynamic Quadrature Offset Cancellation)
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The device must be operated below the maximum junction tem-
perature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems Web site.)
The Package Thermal Resistance, RJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RJC, is relatively
small component of RJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN × IIN (1)
T = PD × RJA (2)
TJ = TA + ΔT (3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RJA = 140 °C/W, then:
P
D = VCC × ICC = 12 V × 4 mA = 48 mW
T = PD × RJA = 48 mW × 140 °C/W = 7°C
T
J = TA + T = 25°C + 7°C = 32°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RJA and TA.
Example: Reliability for VCC at TA =
150°C, package UA, using a
low-K PCB.
Observe the worst-case ratings for the device, specifically:
RJA
=
165 °C/W, TJ(max) =
165°C, VCC(max)
= 24 V, and
ICC(max) = 17 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165
°C
–
150
°C = 15
°C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 165 °C/W = 91 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 17 mA = 5 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est)
and VCC(max) is reliable under these conditions.
Power Derating
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LH, 3-Pin SOT23W
0.55 REF
Gauge Plane
Seating Plane
0.25 BSC
0.95 BSC
0.95
1.00
0.70 2.40
2
1
AActive Area Depth, 0.28 mm REF
B
C
C
B
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Branding scale and appearance at supplier discretion
A
PCB Layout Reference View
Standard Branding Reference View
1
Branded Face
N = Last two digits of device part number
T = Temperature code
NNT
2.90 +0.10
–0.20
4°±4°
8X 10° REF
0.180+0.020
–0.053
0.05 +0.10
–0.05
0.25 MIN
1.91 +0.19
–0.06
2.98 +0.12
–0.08
1.00 ±0.13
0.40 ±0.10
For Reference Only; not for tooling use (reference DWG-2840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
DHall element, not to scale
D
D
D
1.49
0.96
3
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package UA, 3-Pin SIP
231
1.27 NOM
1.02
MAX
45°
45°
C
1.52 ±0.05
B
Gate and tie bar burr area
A
B
C
Dambar removal protrusion (6X)
A
D
E
D
E
E
1.44 NOM
2.05 NOM
E
Active Area Depth, 0.50 mm REF
Branding scale and appearance at supplier discretion
Hall element (not to scale)
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Standard Branding Reference View
NNN
1
Mold Ejector
Pin Indent
= Supplier emblem
N = Last three digits of device part number
0.41 +0.03
–0.06
0.43 +0.05
–0.07
14.99 ±0.25
4.09 +0.08
–0.05
3.02 +0.08
–0.05
0.79 REF
10°
Branded
Face
Revision History
Revision Revision Date Description of Revision
Rev. 5 March 22, 2012 Update product selection
Chopper-Stabilized, T wo Wire
Hall-Ef fect Switches
A1150, A1152, A1153, A1155,
A1 156, A1 157, and A1 158
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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www.allegromicro.com
Copyright ©2009-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
