Precision Low Drift 2.048 V/2.500 V
SOT-23 Voltage Reference
ADR380/ADR381
Rev. B
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FEATURES
Initial accuracy: ±5 mV/±6 mV maximum
Initial accuracy error: ±0.24%/±0.24%
Low TCVOUT: 25 ppm/°C maximum
Load regulation: 70 ppm/mA
Line regulation: 25 ppm/V
Wide operating ranges
2.4 V to 18 V for ADR380
2.8 V to 18 V for ADR381
Low power: 120 μA maximum
High output current: 5 mA
Wide temperature range: −40°C to +85°C
Tiny 3-lead SOT-23 package with standard pinout
APPLICATIONS
Battery-powered instrumentation
Portable medical instruments
Data acquisition systems
Industrial process control systems
Hard disk drives
Automotive
PIN CONFIGURATION
V
IN 1
V
OUT 2
GND
3
ADR380/
ADR381
TOP VIEW
(Not to Scale)
02175-001
Figure 1. 3-Lead SOT-23
(RT Suffix)
GENERAL DESCRIPTION
The ADR380 and ADR381 are precision 2.048 V and 2.500 V
band gap voltage references featuring high accuracy, high
stability, and low power consumption in a tiny footprint.
Patented temperature drift curvature correction techniques
minimize nonlinearity of the voltage change with temperature.
The wide operating range and low power consumption make
them ideal for 3 V to 5 V battery-powered applications.
The ADR380 and ADR381 are micropower, low dropout
voltage (LDV) devices that provide a stable output voltage from
supplies as low as 300 mV above the output voltage. They are
specified over the industrial (−40°C to +85°C) temperature
range. The ADR380/ADR381 are available in the tiny 3-lead
SOT-23 package.
Table 1. ADR38x Products
Part Number Nominal Output Voltage (V)
ADR380 2.048
ADR381 2.500
ADR380/ADR381
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
ADR380 Electrical Characteristics ............................................. 3
ADR381 Electrical Characteristics ............................................. 4
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Terminology .................................................................................... 10
Theory of Operation ...................................................................... 11
Device Power Dissipation Considerations .............................. 11
Input Capacitor ........................................................................... 11
Output Capacitor ........................................................................ 11
Applications Information .............................................................. 12
Stacking Reference ICs for Arbitrary Outputs ....................... 12
A Negative Precision Reference Without Precision Resistors
....................................................................................................... 12
Precision Current Source .......................................................... 12
Precision High Current Voltage Source .................................. 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
1/09—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Table 7 ............................................................................ 5
Changes to Stacking Reference ICs for Arbitrary Outputs
Section, Figure 28, and Figure 29 ................................................. 12
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
7/04—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Ordering Guide .......................................................... 16
Updated Outline Dimensions ....................................................... 16
ADR380/ADR381
Rev. B | Page 3 of 16
SPECIFICATIONS
ADR380 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT 2.043 2.048 2.053 V
Initial Accuracy Error VOERR −5 +5 mV
−0.24 +0.24 %
Temperature Coefficient TCVOUT −40°C < TA < +85°C 5 25 ppm/°C
0°C < TA< 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN – VOUT ILOAD ≤ 3 mA 300 mV
Line Regulation ΔVOUT/DVIN VIN = 2.5 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V
Load Regulation ΔVOUT/DILOAD VIN = 3 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
70 ppm/mA
Quiescent Current IIN No load 100 120 μA
−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔVOUT 1000 Hrs 50 ppm
Output Voltage Hysteresis VOUT_HYS 40 ppm
Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA
VIN = 15.0 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT 2.043 2.048 2.053 V
Initial Accuracy Error VOERR −5 +5 mV
−0.24 +0.24 %
Temperature Coefficient TCVOUT −40°C < TA < +85°C 5 25 ppm/°C
0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − VOUT ILOAD ≤ 3 mA 300 mV
Line Regulation ΔVOUT/DVIN V
IN = 2.5 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V
Load Regulation ΔVOUT/DILOAD VIN = 3 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
70 ppm/mA
Quiescent Current IIN No load 100 120 μA
−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔVOUT 1000 Hrs 50 ppm
Output Voltage Hysteresis VOUT_HYS 40 ppm
Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA
ADR380/ADR381
Rev. B | Page 4 of 16
ADR381 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT 2.494 2.500 2.506 V
Initial Accuracy Error VOERR −6 +6 mV
−0.24 +0.24 %
Temperature Coefficient TCVOUT −40°C < TA < +85°C 5 25 ppm/°C
0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − VOUT ILOAD ≤ 2 mA 300 mV
Line Regulation ΔVOUT/DVIN VIN = 2.8 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V
Load Regulation ΔVOUT/DILOAD VIN = 3.5 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
70 ppm/mA
Quiescent Current IIN No load 100 120 μA
−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔVOUT 1000 Hrs 50 ppm
Output Voltage Hysteresis VOUT_HYS 75 ppm
Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT 2.494 2.500 2.506 V
Initial Accuracy Error VOERR −6 +6 mV
−0.24 +0.24 %
Temperature Coefficient TCVOUT −40°C < TA < +85°C 5 25 ppm/°C
0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − VOUT ILOAD ≤ 2 mA 300 mV
Line Regulation ΔVOUT/DVIN VIN = 2.8 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V
Load Regulation ΔVOUT/DILOAD VIN = 3.5 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
70 ppm/mA
Quiescent Current IIN No load 100 120 μA
−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔVOUT 1000 Hrs 50 ppm
Output Voltage Hysteresis VOUT_HYS 75 ppm
Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA
ADR380/ADR381
Rev. B | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter1 Rating
Supply Voltage 18 V
Output Short-Circuit Duration to GND
VIN > 15 V 10 sec
VIN ≤ 15 V Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 Sec) 300°C
1 Absolute maximum ratings apply at 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7.
Package Type θJA Unit
3-Lead SOT-23 (RT) 333 °C/W
ESD CAUTION
ADR380/ADR381
Rev. B | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
TEMPERATURE (°C)
2.042
V
OUT
(V)
2.044
2.046
2.048
2.050
2.052
2.054
SAMPLE 1
SAMPLE 2
SAMPLE 3
3510–15–40 8560
02175-002
Figure 2. ADR380 Output Voltage vs. Temperature
TEMPERATURE (°C)
2.494
V
OUT
(V)
2.496
2.498
2.500
2.502
2.504
2.506
SAMPLE 1
SAMPLE 2 SAMPLE 3
–40 –15 10 35 60 85
02175-003
Figure 3. ADR381 Output Voltage vs. Temperature
PPM (°C)
0
5
10
15
20
25
30
TOTAL NUMBER
OF DEVICES = 130
TEMPERATURE +25°C –40°C +85°C +25°C
FREQUENCY
–11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15 17 19
02175-004
Figure 4. ADR380 Output Voltage Temperature Coefficient
PPM (°C)
0
FREQUENCY
10
20
30
40
50
60
TOTAL NUMBER
OF DEVICES IN
SAMPLE = 450
TEMPERATURE +25°C
–40°C +85°C +25°C
–11–13–15 –9–7–5–3–113579111315
02175-005
Figure 5. ADR381 Output Voltage Temperature Coefficient
INPUT VOLTAGE (V)
2.5 5.0 7.5 10.0 12.5 15.0
+85°C
–40°C
+25°C
0
SUPPLY CURRENT (µA)
20
40
80
100
120
140
60
02175-006
Figure 6. ADR380 Supply Current vs. Input Voltage
INPUT VOLTAGE (V)
2.5 5.0 7.5 10.0 12.5 15.0
+85°C +25°C
0
SUPPLY CURRENT (µA)
20
40
80
100
120
140
60 –40°C
02175-007
Figure 7. ADR381 Supply Current vs. Input Voltage
ADR380/ADR381
Rev. B | Page 7 of 16
VIN = 5V
VIN = 3V
TEMPERATURE (°C)
0
LOAD REGULATION (ppm/mA)
10
20
40
50
60
70
30
ILOAD = 0mA TO 5mA
–40 –15 10 35 60 85
02175-008
Figure 8. ADR380 Load Regulation vs. Temperature
TEMPERATURE (°C)
0
LOAD REGULATION (ppm/mA)
10
20
40
50
60
70
30
–40 –15 10 35 60 85
VIN = 5V
VIN = 3.5V
ILOAD = 5mA
02175-009
Figure 9. ADR381 Load Regulation vs. Temperature
V
IN
= 2.5V TO 15V
TEMPERATURE (°C)
0
LINE REGULATION (ppm/V)
1
2
4
5
3
–40 –15 10 35 60 85
02175-010
Figure 10. ADR380 Line Regulation vs. Temperature
V
IN
= 2.8V TO 15V
TEMPERATURE (°C)
0
LINE REGULATION (ppm/V)
1
2
4
5
3
–40 –15 10 35 60 85
02175-011
Figure 11. ADR381 Line Regulation vs. Temperature
–40°C
LOAD CURRENT (mA)
0
DIFFERENTIAL VOLTAGE (V)
0.2
0.4
0.6
0.8
+85°C
+25°C
012345
0
2175-012
Figure 12. ADR380 Minimum Input/Output Differential Voltage vs.
Load Current
LOAD CURRENT (mA)
0
DIFFERENTIAL VOLTAGE (V)
0.2
0.4
0.6
0.8
012345
–40°C
+85°C
+25°C
0
2175-013
Figure 13. ADR381 Minimum Input/Output Differential Voltage vs.
Load Current
ADR380/ADR381
Rev. B | Page 8 of 16
HYSTERESIS (ppm)
0
FREQUENCY
10
20
30
40
50
60
TEMPERATURE +25°C –40°C +85°C +25°C
–260 –200 –140 –80 –20 40 100 160 220 280 340 400
02175-014
Figure 14. ADR381 VOUT Hysteresis
TIME (1s/DIV)
2µV/DI
V
1
02175-015
Figure 15. ADR381 Typical Noise Voltage, 0.1 Hz to 10 Hz
TIME (10ms/DIV)
100µV/DIV
1
02175-016
Figure 16. ADR381 Typical Noise Voltage, 10 Hz to 10 kHz
TIME (10µs/DIV)
1V/DIV
0.5V/DIV
C
BYPASS
= 0µF
V
OUT
LINE INTERRUPTION
0.5V/DIV
1
2
V
IN
02175-017
Figure 17. ADR381 Line Transient Response
TIME (10µs/DIV)
1V/DIV
0.5V/DIV
C
BYPASS
= 0.1µF
V
OUT
LINE INTERRUPTION
0.5V/DIV
1
2
02175-018
Figure 18. ADR381 Line Transient Response
C
L
= 0µF
TIME (200µs/DIV)
1V/DIV
V
OUT
V
LOAD
ON
LOAD OFF
I
LOAD
= 1mA
2V/DIV
1
2
02175-019
Figure 19. ADR381 Load Transient Response with CL = 0 μF
ADR380/ADR381
Rev. B | Page 9 of 16
C
L
= 1nF
TIME (200µs/DIV)
1V/DIV
V
OUT
V
LOAD
ON
LOAD OFF
I
LOAD
= 1mA
2V/DIV
1
2
02175-020
Figure 20. ADR381 Load Transient Response with CL = 1 nF
C
L
= 100nF
TIME (200µs/DIV)
1V/DIV
V
OUT
V
LOAD
ON
LOAD OFF
I
LOAD
= 1mA
2V/DIV
1
2
02175-021
Figure 21. ADR381 Load Transient Response with CL = 100 nF
R
L
= 500Ω
TIME (200µs/DIV)
2V/DIV
V
OUT
V
IN
5V/DIV
1
2
02175-022
Figure 22. ADR381 Turn-On/Turn-Off Response at 5 V
10 100 1k 10k 100k 1M
Z
OUT
(10Ω/DIV)
C
L
= 40pF
C
L
= 0.1µF
C
L
= 1µF
C
BYPASS
= 0.1µF
FREQUENCY (Hz)
02175-023
Figure 23. ADR381 Output Impedance vs. Frequency
HOURS
0
–150
DRIFT (ppm)
–100
–50
50
100
150
CONDITIONS: V
IN
= 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C
0 100 200 300 400 500 600 700 800 900 1000
02175-024
Figure 24. ADR380 Long-Term Drift
HOURS
0
–150
DRIFT (ppm)
–100
–50
50
100
150
CONDITIONS: V
IN
= 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C
0 100 200 300 400 500 600 700 800 900 1000
02175-025
Figure 25. ADR381 Long-Term Drift
ADR380/ADR381
Rev. B | Page 10 of 16
TERMINOLOGY
Temperature Coefficient
The change of output voltage over the operating temperature
change and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:
6
10
)(
)()(
]Cppm/[
12
OUT
1
OUT
2
OUT
OUT TTC)(25V
TVTV
TCV
where:
VOUT (25°C) = VOUT at 25°C.
VOUT (T1) = VOUT at Temperature 1.
VOUT (T2) = VOUT at Temperature 2.
Line Regulation
The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage.
Load Regulation
The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load regulation is
expressed in either microvolts per milliampere, parts-per-million
per milliampere, or ohms of dc output resistance.
Long-Term Stability
A typical shift in output voltage over 1000 hours at a controlled
temperature. Figure 24 and Figure 25 show a sample of parts
measured at different intervals in a controlled environment of
50°C for 1000 hours.
6
10
)(
)()(
]ppm[
)()(
0
UT
O
1
OUT
0
OUT
UT
O
1
UT
O
0
OUTOUT
tV
tVtV
V
tVtVV
where:
VOUT (t0) = VOUT at Time 0.
VOUT (t1) = VOUT after 1000 hours of operation at a controlled
temperature.
Note that 50°C was chosen because most applications run at a
higher temperature than 25°C.
Thermal Hysteresis
The change of output voltage after the device is cycled through
temperature from +25°C to −40°C to +85°C and back to +25°C.
This is a typical value from a sample of parts put through such
a cycle.
6_
_
__
10
)C25(
]ppm[
C)(25V
VV
V
VC)(25VV
OUT
TCOUTOUT
HYSOUT
TCOUT
UT
O
HYSOUT
where:
VOUT (25°C) = VOUT at 25°C.
VOUT_TC = VOUT at 25°C after a temperature cycle from +25°C to
−40°C to +85°C and back to +25°C.
ADR380/ADR381
Rev. B | Page 11 of 16
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications,
and the ADR380/ADR381 are no exception. However, the
uniqueness of this product lies in its architecture. As shown in
Figure 26, the ideal zero TC band gap voltage is referenced to
the output, not to ground. The band gap cell consists of the PNP
pair Q51 and Q52, running at unequal current densities. The
difference in VBE results in a voltage with a positive TC that is
amplified by the ratio of 2 × R58/R54. This PTAT voltage,
combined with the VBE of Q51 and Q52, produce the stable
band gap voltage. Reduction in the band gap curvature is
performed by the ratio of the two resistors, R44 and R59.
Precision laser trimming and other patented circuit techniques
are used to further enhance the drift performance.
GND
V
OUT
V
IN
Q1
R59
R54
Q51
R60 R61
R48
R49
R44
R58
R53 Q52
–
+
02175-026
Figure 26. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR380/ADR381 are capable of delivering load currents to
5 mA with an input voltage that ranges from 2.8 V (ADR381
only) to 15 V. When this device is used in applications with
large input voltages, take care to avoid exceeding the specified
maximum power dissipation or junction temperature that may
result in premature device failure. Use the following formula to
calculate a device’s maximum junction temperature or
dissipation:
JA
A
J
D
TT
P
where:
PD is the device power dissipation,
TJ and TA are junction and ambient temperatures, respectively.
θJA is the device package thermal resistance.
INPUT CAPACITOR
An input capacitor is not required on the ADR380/ADR381.
There is no limit for the value of the capacitor used on the
input, but a capacitor on the input improves transient response
in applications where the load current suddenly increases.
OUTPUT CAPACITOR
The ADR380/ADR381 do not need an output capacitor for
stability under any load condition. Using an output capacitor,
typically 0.1 μF, removes any very low level noise voltage and
does not affect the operation of the part. The only parameter
that degrades by applying an output capacitor is turn-on time.
(This varies depending on the size of the capacitor.) Load tran-
sient response is also improved with an output capacitor, which
acts as a source of stored energy for a sudden increase in load
current.
ADR380/ADR381
Rev. B | Page 12 of 16
APPLICATIONS INFORMATION
STACKING REFERENCE ICs FOR ARBITRARY
OUTPUTS
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. The following
circuit shows how this stacked output reference can be
implemented:
GND
V
OUT
V
IN
3
GND
V
OUT
V
IN
C2
1µF
C1
0.1µF
C3
0.1µF
C4
1µF
3
R1
3.9kΩ
V
OUT2
V
OUT1
2
2
1
1
V
IN
U2
ADR380/
ADR381
U1
ADR380/
ADR381
0
2175-027
Figure 27. Stacking Voltage References with the ADR380/ADR381
Two ADR380s or ADR381s are used; the outputs of the individ-
ual references are simply cascaded to reduce the supply current.
Such configuration provides two output voltages: VOUT1 and
VOUT2. VOUT1 is the terminal voltage of U1, while VOUT2 is the
sum of this voltage and the terminal voltage of U2. U1 and U2
can be chosen for the two different voltages that supply the
required outputs.
While this concept is simple, a precaution is in order. Because
the lower reference circuit must sink a small bias current from
U2, plus the base current from the series PNP output transistor
in U2, the external load of either U1 or R1 must provide a path
for this current. If the U1 minimum load is not well-defined,
Resistor R1 should be used, set to a value that conservatively
passes 600 μA of current with the applicable VOUT1 across it. Note
that the two U1 and U2 reference circuits are locally treated as
macrocells, each having its own bypasses at input and output for
optimum stability. Both U1 and U2 in this circuit can source dc
currents up to their full rating. The minimum input voltage, VIN, is
determined by the sum of the outputs, VOUT2, plus the 300 mV
dropout voltage of U2.
A NEGATIVE PRECISION REFERENCE WITHOUT
PRECISION RESISTORS
In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the
reference voltage, it is often required to reconfigure a current-
switching DAC into a voltage-switching DAC through the use
of a 1.25 V reference, an op amp, and a pair of resistors. Using
a current switching DAC directly requires an additional opera-
tional amplifier at the output to reinvert the signal. A negative
voltage reference is then desirable from the point that an additional
operational amplifier is not required for either reinversion
(current-switching mode) or amplification (voltage-switching
mode) of the DAC output voltage. In general, any positive voltage
reference can be converted into a negative voltage reference
through the use of an operational amplifier and a pair of matched
resistors in an inverting configuration. The disadvantage to this
approach is that the largest single source of error in the circuit is
the relative matching of the resistors used.
The circuit in Figure 28 avoids the need for tightly matched
resistors with the use of an active integrator circuit. In this
circuit, the output of the voltage reference provides the input
drive for the integrator. The integrator, to maintain circuit
equilibrium, adjusts its output to establish the proper relation-
ship between the reference VOUT and GND. Thus, any negative
output voltage desired can be chosen by substituting for the
appropriate reference IC. A precaution should be noted with
this approach: although rail-to-rail output amplifiers work best
in the application, these operational amplifiers require a finite
amount (mV) of headroom when required to provide any load
current. The choice for the circuit’s negative supply should take
this issue into account.
GND
V
OUT
V
IN
C2
0.1µF
3
+5V
–V
REF
V
IN
2
A1
1
U2
–5V
OP195
–V
+V
C1
1µF
U1
ADR380/
ADR381
R4
1kΩ
R3
100kΩC3
1µF
C4
1µF
R5
100Ω
0
2175-028
Figure 28. Negative Precision Voltage Reference Using No Precision Resistors
PRECISION CURRENT SOURCE
Many times in low power applications, the need arises for a
precision current source that can operate on low supply voltages.
As shown in Figure 29, the ADR380/ADR381 can be configured
as a precision current source. The circuit configuration illustrated
is a floating current source with a grounded load. The reference
output voltage is bootstrapped across RSET (R1 + P1), which sets
the output current into the load. With this configuration, circuit
precision is maintained for load currents in the range from the
reference supply current, typically 90 μA to approximately 5 mA.
GND
V
OUT
V
IN
3
IN
2
R1
1
R
L
P1
I
OUT
I
SY
ADJUST
U1
ADR380/
ADR381
C3
1µF
C1
1µF
C2
0.1µF
02175-029
Figure 29. Precision Current Source
ADR380/ADR381
Rev. B | Page 13 of 16
PRECISION HIGH CURRENT VOLTAGE SOURCE
In some cases, the user may want higher output current delivered
to a load and still achieve better than 0.5% accuracy from the
ADR380/ADR381. The accuracy for a reference is normally
specified on the data sheet with no load. However, the output
voltage changes with load current.
The circuit in Figure 30 provides high current without compromis-
ing the accuracy of the ADR380/ADR381. By op amp action,
VOUT follows VREF with very low drop in R1. To maintain circuit
equilibrium, the op amp also drives the N-Channel MOSFET
Q1 into saturation to maintain the current needed at different
loads. R2 is optional to prevent oscillation at Q1. In such an
approach, hundreds of milliamps of load current can be achieved,
and the current is limited by the thermal limitation of Q1. VIN =
VOUT + 300 mV.
GND
V
OUT
V
IN
3
V
OUT
21
8V TO 15V
R
L
V
IN
A1–V
+V
AD820
U1
ADR380/
ADR381
Q1
2N7002
R2
100Ω
R1
100kΩ
C1
0.001µF
02175-030
Figure 30. ADR380/ADR381 for Precision High Current Voltage Source
ADR380/ADR381
Rev. B | Page 14 of 16
OUTLINE DIMENSIONS
3.04
2.90
2.80
COMPLIANT TO JEDEC STANDARDS TO-236-AB
011909-C
12
3
SEATING
PLANE
2.64
2.10
1.40
1.30
1.20
2.05
1.78
0.100
0.013
1.03
0.89
0.60
0.45
0.51
0.37
1.12
0.89
0.180
0.085
0.25
0.54
REF
GAUGE
PLANE
0.60 MAX
0.30 MIN
1.02
0.95
0.88
Figure 31. 3-Lead Small Outline Transistor Package [SOT-23-3]
(RT-3)
Dimensions shown in millimeters
053006-0
20.20
MIN
1.00 MIN 0.75 MIN
1.10
1.00
0.90
1.50 MIN
7” REEL 100.00
OR
13” REEL 330.00
7” REEL 50.00 MIN
OR
13” REEL 100.00 MIN
DIRECTION OF UNREELING
0.35
0.30
0.25
2.80
2.70
2.60
1.55
1.50
1.45
4.10
4.00
3.90 1.10
1.00
0.90
2.05
2.00
1.95
8.30
8.00
7.70
3.20
3.10
2.90
3.55
3.50
3.45
13.20
13.00
12.80
14.40 MIN
9.90
8.40
6.90
Figure 32. Tape and Reel Dimensions
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option Branding Output Voltage Ordering Quantity
ADR380ARTZ-REEL71 −40°C to +85°C 3-Lead SOT-23 RT-3 R2D2 2.048 3,000
ADR381ART-REEL7 −40°C to +85°C 3-Lead SOT-23 RT-3 R3A 2.500 3,000
ADR381ARTZ-R21 −40°C to +85°C 3-Lead SOT-23 RT-3 R3A 2.500 250
ADR381ARTZ-REEL71 −40°C to +85°C 3-Lead SOT-23 RT-3 R3A# 2.500 3,000
1 Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
2 Prior to Date Code 0542, parts were branded with R2A without the #.
ADR380/ADR381
Rev. B | Page 15 of 16
NOTES
ADR380/ADR381
Rev. B | Page 16 of 16
NOTES
©2001–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02175-0-1/09(B)