LMC6009 9 Channel Buffer Amplifier for TFT-LCD General Description Features The LMC6009 is a CMOS integrated circuit that buffers 9 reference voltages for gamma correction in a Thin Film Transistor Liquid Crystal Display (TFT-LCD). Guaranteed to operate at both 3.3V and 5V supplies, this integrated circuit contains nine, independent unity gain buffers that can source 130 mA into a capacitive load without oscillation. The LMC6009 is useful for buffering gamma voltages into column drivers that employ the resistor-divider architecture. High output current capability and fast settling characteristics of this device improve display quality by minimizing rise time errors at the outputs of the column driver. The integration of nine buffers and a multiplexer eliminates the need for discrete buffers and a separate multiplexer (MUX) chip on the panel. The LMC6009 is available in 48-pin surface mount TSSOP. n n n n n n n n Number of inputs 3.3V and 5V operation Supply current Settling time A/B channel inputs for asymmetrical Gamma Number of outputs Number of control inputs Built-in thermal shutdown protection 18 3.5 mA 3 s 9 1 Applications n n n n n VGA/SVGA TFT-LCD drive circuits Electronic Notebooks Electronic Games Personal Communication Devices Personal Digital Assistants (PDA) Application in VGA/SVGA TFT-LCD DS012533-1 Ordering Information Package 48-pin TSSOP Temperature Range Transport Media -20C-+75C NSC Drawing MTD48 LMC6009MT LMC6009MTX (c) 1999 National Semiconductor Corporation DS012533 Tape and Reel www.national.com LMC6009 9 Channel Buffer Amplifier for TFT-LCD May 1999 Absolute Maximum Ratings (Note 1) Maximum Junction Temperature (TJ) Maximum Power Dissipation (PD) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance Input Voltage Supply Voltage (VDD) Operating Temperature Storage Temperature Range +150C 1.09W Operating Ratings (Note 1) 1.0 kV GND-0.3V V+ VDD+0.3VDC -0.3 to +6.5 VDC -20C to +75C -55C to +150C 2.7V VDD 5.5V DC-50 kHz Supply Voltage Frequency Thermal Resistance (JA) Derating 8.70 mW/C 3V DC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25C, and VDD = 3.0 VDC. Symbol Parameter VDD Supply Voltage VOS Offset Voltage IB Input Bias Current VOL Output Voltage, Low VOH Output Voltage, High Conditions Min Typ Max 2.7 3.0 3.3 V 20 mV RS = 10k Units 1500 nA Amp A8 and A9 ISINK = 13 mA GND + 0.2 V Amp A1-A7 ISINK = 13 mA GND + 0.6 V Amp A1 and A2 ISOURCE = 13 mA VDD-0.2 V Amp A3-A9 ISOURCE = 13 mA VDD-0.6 V ISC Output Short Circuit Current VOUT - 1.65V (Note 1) IDD Supply Current No Load VL Load Regulation VIN = 0.3-3 VDC ISOURCE = 13 mA VIH A/B Switch Logic Voltage, High Select A VIL A/B Switch Logic Voltage, Low Select B IIH A/B Switch Logic Current, High IIL A/B Switch Logic Current, Low AV Voltage Gain 80 150 3.5 ISINK = 13 mA mA 5 mA -10 mV +10 mV 2 V 0.8 V 1.5 A 1 0.985 A V/V Note 1: See Test Circuit (Figure 2 ) 5V DC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25C, and VDD = 5 VDC. Symbol Parameter VDD Supply Voltage VOS Offset Voltage IB Input Bias Current VOL Output Voltage, Low VOH Output Voltage, High Conditions Typ Max 4.5 5 5.5 V 20 mV RS = 10k Units 1500 nA Amp A8 and A9 ISINK = 20 mA GND + 0.2 V Amp A1-A7 ISINK = 20 mA GND + 1.0 V Amp A1 and A2 ISOURCE = 20 mA VDD-0.2 V Amp A3-A9 ISOURCE = 20 mA VDD-1.0 V ISC Output Short Circuit Current VOUT - 1.65V (Note 1) IDD Supply Current No Load www.national.com Min 120 200 4.5 2 mA 6 mA 5V DC Electrical Characteristics (Continued) Unless otherwise specified, all limits are guaranteed for TJ = 25C, and VDD = 5 VDC. Symbol Parameter Conditions VL Load Regulation VIH A/B Switch Logic Voltage, High Select A VIL A/B Switch Logic Voltage, Low Select B IIH A/B Switch Logic Current, High IIL A/B Switch Logic Current, Low AV Voltage Gain Min Typ VIN = 0.5-4.5 VDC ISOURCE = 20 mA ISINK = 20 mA Max Units -10 mV +10 mV 2 V 0.8 V 1.5 A 1 0.985 A V/V AC Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25C, and VDD = 3 VDC. Typ Max Units TS1 Symbol Settling Time 1 (Note 2) Parameter IDC = 13 mA (Sink/Source) Conditions Min 3 6 s TS2 Settling Time 2 (Note 2) IDC = 13 mA (Sink/Source) 3 6 s Note 2: See test circuits (Figure 3 , Figure 4 and Figure 5 ) DS012533-2 FIGURE 1. Rise and Fall Times at Outputs 3 www.national.com AC Electrical Characteristics (Continued) DS012533-5 FIGURE 4. 13 mA Sink/Source DS012533-3 FIGURE 2. DS012533-6 FIGURE 5. A6-A8: 13 mA Sink/Source A9: 13 mA Sink Only DS012533-4 FIGURE 3. A1: 13 mA Source only A2-A4: 13 mA Sink/Source Description of Pins; LMC6009 www.national.com Pin 1 NC Pin 25 NC Pin 2 NC Pin 26 NC Pin 3 NC Pin 27 NC Pin 4 A1 in (A) Pin 28 NC Pin 5 A1 in (B) Pin 29 A/B Switch Pin 6 A2 in (A) Pin 30 VDD (C) Pin 7 A2 in (B) Pin 31 GND (C) Pin 8 A3 in (A) Pin 32 A9 out Pin 9 A3 in (B) Pin 33 A8 out Pin 10 A4 in (A) Pin 34 A7 out Pin 11 A4 in (B) Pin 35 A6 out Pin 12 A5 in (A) Pin 36 A5 out Pin 13 A5 in (B) Pin 37 GND (B) Pin 14 A6 in (A) Pin 38 VDD (B) Pin 15 A6 in (B) Pin 39 A4 out Pin 16 A7 in (A) Pin 40 A3 out Pin 17 A7 in (B) Pin 41 A2 out Pin 18 A8 in (A) Pin 42 A1 out Pin 19 A8 in (B) Pin 43 GND (A) Pin 20 A9 in (A) Pin 44 VDD (A) Pin 21 A9 in (B) Pin 45 NC Pin 22 NC Pin 46 NC Pin 23 NC Pin 47 NC Pin 24 NC Pin 48 NC 4 Block Diagram DS012533-8 FIGURE 6. Block Diagram of LMC6009 Applications Since the buffers in the LMC6009 draw extremely low bias current (1.5 A max), large resistance values can be used in the reference voltage string. This allows the power dissipation in the gamma reference circuit to be minimized. The nine buffers are guaranteed to deliver 80 mA to the load, allowing the pixel voltages of the TFT-LCD to settle very quickly. The LMC6009 is useful for buffering the nine reference voltages for gamma correction in a TFT-LCD as shown in Figure 7. The A/B channel inputs allow the user to alternate two sets of gamma references to compensate for asymmetrical Gamma characteristic during Row Inversion. The LMC6009 eliminates the need for nine external switches or an 18-to-9 multiplexer. 5 www.national.com Applications (Continued) DS012533-7 FIGURE 7. Column Driver (Figure 7) also draw current from the LMC6009. Thus, the actual current available for charging the panel capacitance is: Ipx = 80 mA - (VVREF1-VVREF2)/RCD Example: Below is a calculation of pixel charge time (for a black to black transition) in a VGA display operating at a vertical refresh rate of 60 Hz, with a panel capacitance of 50 pF per sub-pixel: A full black to black transition represents the maximum charging time for the panel, since it requires that the panel capacitance be driven by a 4V swing from node VREF1 (Figure 7). Total capacitive load presented to the LMC6009 is CL = 50 pF x 3 x 640 = 96 nF Output current of the LMC6009 is: ISC = 80 mA Hence, slew time tSLEW = (96 nF x 4V)/80 mA = 3.07 s The total line time for a VGA system is approximately 34 s. Therefore, the LMC6009 easily meets the drive requirements for the application. The input resistance seen between the VREFn and VREF(n+1) inputs, (where n = 0 thru 8) of the www.national.com where VV REFn = Voltage at node VREFn, VVREF(n+1) = Voltage at node VREF(n+1), and RCD = Column driver input resistance between VREFn and VREF(n+1) Since the LMC6009 is capable of sourcing 80 mA, the pixel charging time is primarily limited only by the length of the RCD. CL time constant. To implement a high quality display, column drivers that allow the shortest possible time constant (lower values of RCD) are desirable. However, lower values of RCD result in increased system quiescent power dissipation. It is therefore important to optimize system performance by carefully considering speed vs power tradeoffs. 6 LMC6009 9 Channel Buffer Amplifier for TFT-LCD Physical Dimensions inches (millimeters) unless otherwise noted All dimensions are in millimeters 48-Lead Molded Thin Shrink Small Outline Package, JEDEC NS Package Number MTD48 LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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