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Document No. S17476EJ2V0DS00 (2nd edition)
Date Published December 2008 NS
Printed in Japan
MOS INTEGRATED CIRCUIT
μ
PD166100, 166101
DATA SHEET
N-CHANNEL LOW SIDE INTELLIGENT POWER DEVICE
2005
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
The
μ
PD166100, 166101 are N-channel Low-side Driver for Solenoids and Lamp Drivers. It build in protection functions.
FEATURES
z Built in current limit and thermal shutdown circuit.
Thermal shutdown will automatically restart after
the channel temperature has cool down.
z Low on-state resistance: RDS(ON) = 160 mΩ
(VIN = 5 V, IOUT = 0.8 A, Tch = 25°C)
z Built in dynamic clamp circuit
z
μ
PD166101: Dual channel Low-side switch
z Small and surface mount package
(Power SOP 8)
PACKAGE DRAWING (unit: mm)
1.27
0.12 M
6.0 ±0.3
4.4
0.40
+0.10
–0.05
0.78 Max.
0.05 Min.
1.8 Max.
1.44
0.8
0.5 ±0.2
0.15
+0.10
–0.05
5.37 Max.
0.10
14
85
ORDERING INFORMATION
Part Number Lead plating Packing Package
μ
PD166100GR-E1-AZ Note Sn-Bi Tape 2500 p/reel Power SOP 8
μ
PD166100GR-E2-AZ Note Sn-Bi Tape 2500 p/reel Power SOP 8
μ
PD166101GR-E1-AZ Note Sn-Bi Tape 2500 p/reel Power SOP 8
μ
PD166101GR-E2-AZ Note Sn-Bi Tape 2500 p/reel Power SOP 8
Note Pb-free (This product does not contain Pb in the external electrode.)
QUALITY GRADE
Part Number Quality Grade
μ
PD166100GR-E1-AZ Special
μ
PD166100GR-E2-AZ Special
μ
PD166101GR-E1-AZ Special
μ
PD166101GR-E2-AZ Special
Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
<R>
<R>
Data Sheet S17476EJ2V0DS
2
μ
PD166100, 166101
BLOCK DIAGRAM
IN1 OUT1
GND1
Over
Temperature
Protection
Circuit
Control
Circuit
Current
Limit
IN2 OUT2
GND2
Ch2
Ch1
Dynamic
Clamp
ESD
Control
Circuit
Current
Limit
Dynamic
Clamp
ESD
Over
Temperature
Protection
Circuit
Remark
μ
PD166100: Ch1 only
PIN CONFIGURATION (Top View)
• Power SOP 8
μ
PD166100GR,
μ
PD166101GR
1
2
3
4
8
7
6
5
GND1
IN1
GND2
Note
IN2
Note
OUT1
OUT1
OUT2
Note
OUT2
Note
Pin No. Symbol Function
1 GND1 Connected to Ground
2 IN1 Input terminal1 (active level is high)
3 GND2 Note Connected to Ground
4 IN2 Note Input terminal2 (active level is high)
5 OUT2 Note Output terminal2
6 OUT2 Note Output terminal2
7 OUT1 Output terminal1
8 OUT1 Output terminal1
Note
μ
PD166100: Pin No.3 to 6 are N.C.
Data Sheet S17476EJ2V0DS 3
μ
PD166100, 166101
ABSOLUTE MAXIMUM RATING (TA = 25°C unless otherwise specified)
Parameter Symbol Conditions Rating Unit
Output voltage VOUT VIN = 0 V, DC 40 V
Input voltage VIN 7 V
Negative input current IIL −10 mA
Output current IOUT(DC) VIN = 5 V SELF LIMITED A/UNIT
μ
PD166100 On-State 1.5 Total power dissipation PD Note
μ
PD166101 2ch On-State 2
W
Channel temperature Tch 150 °C
Storage temperature Tstg −55 to +150 °C
Note Mounted on ceramic substrate of 20 cm x 20 cm x 1.1 mm
ELECTRICAL CHARACTERISTICS (Tch = 25°C unless otherwise specified)
Parameter Symbol Conditions Min. Typ. Max. Unit
Output clamping voltage VOUT IOUT = 1 mA, VIN = 0 V 40 60 V
Output Off leakage current IOL VIN = VIL, VOUT = 20 V 100
μ
A
High Level Input current IIH VIN = 5.5 V, VOUT = 0 V 300
μ
A
Low Level Input current IIL VIN = 0 V, VOUT = 20 V −10 10
μ
A
High Level Input voltage VIH IOUT = 0.8 A, VOUT = 0.2 V 3 V
Low Level Input voltage VIL VOUT = 10 V, IOUT = 1 mA 1.5 V
VIN = 5 V, IOUT = 0.8 A 160 mΩ
ON-state resistance RDS(ON)
VIN = 3 V, IOUT = 0.8 A 195 mΩ
Turn-on time ton 120
μ
s
Rise time tr 80
μ
s
Turn-off time toff 200
μ
s
Fall time tf
VCC = 18 V, RL = 22 Ω,
VIN = 0 to 5 V,
RIN = 10 Ω
80
μ
s
Thermal shutdown
detection temperature Note
THI VIN = 5 V 150 °C
Current limit IS VIN = 3 V 1 A
Input frequency fIN 1 kHz
Note The low side switch is shutdown if the channel temperature exceeds thermal shutdown temperature.
It will automatically restart after the channel temperature has cooled down than thermal shutdown temperature.
TEST CIRCUIT
VCC = 18 V
RL = 22 Ω
VIN IN O UT
GND
μ
PD166100,
μ
PD166101
IN
Wave Form
OUT
Wave Form
90%
50%
90%
10%
50%
10%
ton
tr
toff
tf
Data Sheet S17476EJ2V0DS
4
μ
PD166100, 166101
TYPICAL CHARACTERISTICS
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
0
0.4
0.8
1.2
1.6
2
2.4
2.8
0 20 40 60 80 100
1
20 140 16
0
T
A
- Ambient Temperature - °C
P
T
- Total Power Dissi
p
ation –W
/
p
acka
g
e
Mounted on ceramic
substrate of
2000 mm
2
x 2.25 mm
1 unit
2 unit
OUTPUT OFF LEAKAGE CURRENT vs.
AMBIENT TEMPERATURE
0
10
20
30
40
50
60
70
80
90
100
-50 0 50 100 150 20
0
T
A
- Ambient Temperature - °C
I
OL
- Output Off Leakage Current -
μ
A
V
IN
= V
IL
, V
OUT
= 18
V
HIGH LEVEL INPUT CURRENT vs.
INPUT VOLTAGE
0
100
200
300
400
500
0 3 4 5 6 7
V
IN
- Input Voltage - V
I
IH
- High Level Input Current -
μ
A
1 2 8
V
OUT
= 0 V
600
T
A
= 25°C T
A
= −40°C
T
A
= 85°C
T
A
= 105°C
HIGH LEVEL INPUT CURRENT vs.
AMBIENT TEMPERATURE
0
50
100
150
200
250
300
350
400
-50 0 50 100 150 200
TA- Ambient Temperature - °C
IIH - High Level Input Current -
μ
A
V
IN
= 5.5 V, V
OUT
= 0 V
HIGH LEVEL INPUT VOLTAGE vs.
AMBIENT TEMPERATURE
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-50 0 50 100 150 200
T
A
- Ambient Temperature - °C
V
IH
- High Level Input Voltage - V
I
OUT
= 0.8 A
LOW LEVEL INPUT VOLTAGE vs.
AMBIENT TEMPERATURE
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-50 0 50 100 150 200
T
A
- Ambient Temperature - °C
V
IL
- Low Level Input Voltage - V
I
OUT
= 1 mA
Data Sheet S17476EJ2V0DS 5
μ
PD166100, 166101
ON-STATE RESISTANCE vs.
OUTPUT CURRENT
0
0.05
0.1
0.15
0.2
0.25
0 0.1 0.2
I
OUT
- Output Current -
A
R
DS(ON)
- ON-State Resistance - Ω
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
V
IN
= 3 V, 5 V, T
A
= 25°C
V
IN
= 5 V
V
IN
= 3 V
ON-STATE RESISTANCE vs.
AMBIENT TEMPERATURE
-50 0 50 100 150 200
T
A
- Ambient Temperature - °C
R
DS(ON)
- ON-State Resistance - Ω
V
IN
= 3 V, 5 V, I
OUT
= 0.8 A
V
IN
= 5 V
V
IN
= 3 V
0
0.05
0.1
0.15
0.2
0.25
ON-STATE RESISTANCE vs.
INPUT VOLTAGE
0 3 4 5 6 8
V
IN
- Input Voltage - V
0
0.05
0.1
0.15
0.2
0.25
R
DS(ON)
- ON-State Resistance -
Ω
1 2 7
I
OUT
= 0.8 A
T
A
= 25°C
T
A
= −40°C
T
A
= 85°C
T
A
= 105°C
Data Sheet S17476EJ2V0DS
6
μ
PD166100, 166101
TURN-ON / TURN-OFF DELAY TIME vs.
OUTPUT CURRENT
0
25
50
75
100
125
150
175
200
0 0.1
0.2
I
OUT
- Output Current -
t
on
/
t
off
– Turn-On
/
Turn-Off Time -
μ
s
t
on
t
off
0.3 0.4 0.5 0.6 0.7
0.8 0.9 1
V
IN
= 5 V, V
OUT
= 18 V, T
A
= 25°C
RISE TIME / FALL TIME vs.
OUTPUT CURRENT
0
12.5
25
37.5
50
62.5
75
87.5
100
00.1
0.2
I
OUT
- Output Current -
t
r
/
t
f
- Rise Time
/
Fall Time -
μ
s
t
r
t
f
0.3 0.4 0.5 0.6 0.7
0.8 0.9 1
V
IN
= 5 V, V
OUT
= 18 V, T
A
= 25°C
TURN-ON / TURN-OFF DELAY TIME vs.
AMBIENT TEMPERATURE
0
20
40
60
80
100
120
140
160
180
200
-50 0 50 100
150 200
T
A
- Ambient Temperature - °C
t
on
/ t
off
- Turn-On / Turn-Off Delay Time -
μ
s
V
IN
= 5 V, V
OUT
= 18 V, I
OUT
= 0.8 A
t
on
t
off
RISE TIME / FALL TIME vs.
AMBIENT TEMPERATURE
-50 0 50 100 150 20
0
T
A
- Ambient Temperature - °C
t
r
/
t
f
- Rise Time
/
Fall Time -
μ
s
V
IN
= 5 V, V
OUT
= 18 V, I
OUT
= 0.8 A
t
r
t
f
0
12.5
25
37.5
50
62.5
75
87.5
100
Data Sheet S17476EJ2V0DS 7
μ
PD166100, 166101
APPLICATION CIRCUIT EXAMPLE
(1) Inductance load
Inductance
load
IN OU
T
GND
Microcontroller
etc
GND GND
μ
PD166100,
μ
PD166101
VCC
(2) Lamp load
Lamp load
IN OUT
GND
Microcontroller
Etc.
GND GND
μ
PD166100,
μ
PD166101
VCC
Caution This circuit diagram is a connection example, and it is not the one to mass-produce it.
Data Sheet S17476EJ2V0DS
8
μ
PD166100, 166101
TAPING INFORMATION
There are two types (E1, E2) of directions of the device in the career tape.
−E2 TYPE−E1 TYPE
Reel side Draw-out side
MARKING INFORMATION
This figure indicates the marking items and arrangement. However, details of the letterform, the size and the
position aren't indicated.
•
μ
PD166100GR,
μ
PD166101GR
Example)
μ
PD166100GR
66100
Pb-free plating marking
Internal administrative code
Lot code
Note
1 pin mark
Week code (2 digit number)
Year code (last 1 digit number)
Note Composition of the lot code
<R>
<R>
Data Sheet S17476EJ2V0DS 9
μ
PD166100, 166101
RECOMMENDED SOLDERING CONDITIONS
The
μ
PD166100, 166101 should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales
representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
μ
PD166100GR-E1-AZ Note,
μ
PD166100GR-E2-AZ Note: Power SOP 8
μ
PD166101GR-E1-AZ Note,
μ
PD166101GR-E2-AZ Note: Power SOP 8
Process Conditions Symbol
Infrared Ray Reflow Peak temperature: 235°C or below (Package surface temperature),
Reflow time: 30 seconds or less (at 210°C or higher),
Maximum number of reflow processes: 3 times or less.
IR35-00-3
Partial Heating Method Pin temperature: 350°C or below,
Heat time: 3 seconds or less (Per each side of the device).
P350
Note Pb-free (This product does not contain Pb in the external electrode.)
Caution Apply only one kind of soldering condition to a device, except for "partial heating method", or the
device will be damaged by heat stress.
Remark Flux: Rosin-based flux with low chlorine content (chlorine 0.2 Wt% or below) is recommended.
<R>
Data Sheet S17476EJ2V0DS
10
μ
PD166100, 166101
REVISION HISTORY
Revision Major changes since last version Page
1st edition Released 1st edition March 2005
Released 2nd edition December 2008
Revised Ordering information 1
Add Taping information, Marking information 8
Revised Recommended soldering conditions 9
2nd edition
Add Revision history 10
<R>
Data Sheet S17476EJ2V0DS 11
μ
PD166100, 166101
1
2
3
4
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between V
IL
(MAX) and V
IH
(MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between V
IL
(MAX) and
V
IH
(MIN).
HANDLING OF UNUSED INPUT PINS
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to V
DD
or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred. Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded. The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
NOTES FOR CMOS DEVICES
5
6
μ
PD166100, 166101
The information in this document is current as of December, 2008. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-
designated "quality assurance program" for a specific application. The recommended applications of an NEC
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
each NEC Electronics product before using it in a particular application.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
•
•
•
•
•
•
M8E 02. 11-1
(1)
(2)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots.
Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support).
Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
"Standard":
"Special":
"Specific":