LM4995
LM4995 1.3 W Audio Power Amplifier
Literature Number: SNAS329F
LM4995November 19, 2009
1.3 W Audio Power Amplifier
General Description
The LM4995 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other
portable communication device applications. It is capable of
delivering 1.2W of continuous average power to an 8 BTL
load with less than 1% distortion (THD+N) from a 5VDC power
supply.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4995 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage appli-
cations where minimal power consumption is a primary re-
quirement.
The LM4995 features a low-power consumption shutdown
mode, which is achieved by driving the shutdown pin with
logic low. Additionally, the LM4995 features an internal ther-
mal shutdown protection mechanism.
The LM4995 contains advanced pop & click circuitry which
eliminates noise which would otherwise occur during turn-on
and turn-off transitions.
The LM4995 is unity-gain stable and can be configured by
external gain-setting resistors.
Key Specifications
■ PSRR at 3.6V (217Hz & 1kHz) 75dB
■ Output Power at 5.0V, 1% THD+N, 81.3W (typ)
■ Output Power at 3.6V, 1% THD+N, 8625mW (typ)
■ Shutdown Current 0.01µA (typ)
Features
Available in space-saving 0.4mm pitch μSMD package
Ultra low current shutdown mode
BTL output can drive capacitive loads
Improved pop & click circuitry eliminates noise during turn-
on and turn-off transitions
2.4 - 5.5V operation
No output coupling capacitors, snubber networks or
bootstrap capacitors required
Unity-gain stable
External gain configuration capability
LLP package: 0.5mm pitch, 3 x 3 mm
Applications
Mobile Phones
PDAs
Portable electronic devices
Typical Application
201599d3
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2009 National Semiconductor Corporation 201599 www.national.com
LM4995 1.3 W Audio Power Amplifier
Connection Diagrams
TM Package
20159903
Top View
Order Number LM4995TM
See NS Package Number TMD09AAA
TM Marking
20159949
Top View
X - Date Code
V - Die Traceability
G - Boomer Family
G8 - LM4995TM
SD Package
20159957
Top View
Order Number LM4995SD
See NS Package Number SDA08A
SD Marking
20159999
Top View
Z - Assembly Plant code
XY - 2 Digit date code
TT - Die Traceability
L4995 - LM4995SD
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LM4995
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (Note 10) 6.0V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD +0.3V
Power Dissipation (Note 3, Note
11)Internally Limited
ESD Susceptibility (Note 4) 2000V
ESD Susceptibility (Note 5) 200V
Junction Temperature 150°C
Thermal Resistance
 θJA (TM) 96.5°C/W
 θJA (SD) 56°C/W
Operating Ratings
Temperature Range
TMIN TA TMAX −40°C TA 85°C
Supply Voltage 2.4V VDD 5.5V
Electrical Characteristics VDD = 5V (Note 1, Note 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
Symbol Parameter Conditions
LM4995
Units
(Limits)
Typical Limit
(Note 6) (Note 7, Note
8)
IDD Quiescent Power Supply Current VIN = 0V, Io = 0A, No Load 1.5 2.5 mA (max)
VIN = 0V, Io = 0A, 8 Load 1.8 mA
ISD Shutdown Current VSD = VGND 0.01 1 µA (max)
VOS Output Offset Voltage No Load 5 26 mV (max)
PoOutput Power THD+N = 1% (max); f = 1 kHz 1.3 (TM)
1.25 (SD)
W
TWU Wake-up time 165 ms
THD+N Total Harmonic Distortion + Noise Po = 500mWRMS; f = 1kHz 0.08 %
PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p
Input terminated to GND
73 (f = 217Hz)
73 (f = 1kHz) dB
VSDIH Shutdown Voltage Input High 1.5 V
VSDIL Shutdown Voltage Input Low 1.2 V
Electrical Characteristics VDD = 3.6V (Note 1, Note 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
Symbol Parameter Conditions
LM4995
Units
(Limits)
Typical Limit
(Note 6) (Note 7, Note
8)
IDD Quiescent Power Supply Current VIN = 0V, Io = 0A, No Load 1.3 2.3 mA (max)
VIN = 0V, Io = 0A, 8 Load 1.6 mA
ISD Shutdown Current VSD = VGND 0.01 1 µA (max)
VOS Output Offset Voltage No Load 5 26 mV (max)
Po
Output Power THD+N = 1% (max); f = 1 kHz 625 (TM)
610 (SD)
mW
TWU Wake-up time 130 ms
THD+N Total Harmonic Distortion + Noise Po = 300mWRMS; f = 1kHz 0.07 %
PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p
Input terminated to GND
75 (f = 217Hz)
76 (f = 1kHz) dB
VSDIH Shutdown Voltage Input High 1.3 V
VSDIL Shutdown Voltage Input Low 1 V
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LM4995
Electrical Characteristics VDD = 3.0V (Note 1, Note 2)
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25°C.
Symbol Parameter Conditions
LM4995
Units
(Limits)
Typical Limit
(Note 6) (Note 7, Note
8)
IDD Quiescent Power Supply Current VIN = 0V, Io = 0A, No Load 1.3 mA
VIN = 0V, Io = 0A, 8 Load 1.6 mA
ISD Shutdown Current VSD = VGND 0.01 µA
VOS Output Offset Voltage No Load 5 mV
PoOutput Power THD+N = 1% (max); f = 1 kHz 400 mW
TWU Wake-up time 110 ms
THD+N Total Harmonic Distortion + Noise Po = 250mWRMS; f = 1kHz 0.07 %
PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p
Input terminated to GND
74 (f = 217Hz)
75 (f = 1kHz) dB
VSDIH Shutdown Voltage Input High 1.2 V
VSDIL Shutdown Voltage Input Low 1 V
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions
which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters
where no limit is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4995, see power derating
curves for additional information.
Note 4: Human body model, 100pF discharged through a 1.5k resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25°C and represent the parametric norm.
Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: ROUT is measured from the output pin to ground. This value represents the parallel combination of the 10k output resistors and the two 20k resistors.
Note 10: If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection
circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when VDD is greater than 5.5V
and less than 6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 11: Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be calculated using
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.
External Components Description
(Figure 1)
Components Functional Description
1. RiInverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high
pass filter with Ci at fC= 1/(2π RiCi).
2. CiInput coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter
with Ri at fC = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an explanation of
how to determine the value of Ci.
3. RfFeedback resistance which sets the closed-loop gain in conjunction with Ri.
4. CSSupply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
5. CBBypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
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LM4995
Typical Performance Characteristics
THD+N vs Output Power
VDD = 3V, RL = 8Ω
20159918
THD+N vs Output Power
VDD = 3.6V, RL = 8Ω
20159917
THD+N vs Output Power
VDD = 5V, RL = 8Ω
20159919
THD+N vs Frequency
VDD = 3V, RL = 8Ω,
f = 1kHz, PO = 250mW
20159942
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LM4995
THD+N vs Frequency
VDD = 3.6V, RL = 8Ω,
f = 1kHz, PO = 300mW
20159941
THD+N vs Frequency
VDD = 5V, RL = 8Ω,
f = 1kHz, PO = 500mW
20159943
PSRR vs Frequency
VDD = 3V, RL = 8Ω
20159950
PSRR vs Frequency
VDD = 3.6V, RL = 8Ω
20159933
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LM4995
PSRR vs Frequency
VDD = 5V, RL = 8Ω
20159951
Power Dissipation vs Output Power
VDD = 3V, RL = 8Ω
20159909
Power Dissipation vs Output Power
VDD = 3.6V, RL = 8Ω
20159908
Power Dissipation vs Output Power
VDD = 5V, RL = 8Ω
20159910
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LM4995
Output Level vs Frequency Response
(Three different caps)
20159906
Shutdown Voltage VSDIH
VDD = 3V
20159936
Shutdown Voltage VSDIH
VDD = 3.6V
20159947
Shutdown Voltage VSDIH
VDD = 5V
20159937
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LM4995
Shutdown Voltage VSDIL
VDD = 3V
20159939
Shutdown Voltage VSDIL
VDD = 3.6V
20159948
Shutdown Voltage VSDIL
VDD = 5V
20159940
Output Power vs Supply Voltage
RL = 8Ω
20159907
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LM4995
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4995 has two internal opera-
tional amplifiers. The first amplifier's gain is externally config-
urable, while the second amplifier is internally fixed in a unity-
gain, inverting configuration. The closed-loop gain of the first
amplifier is set by selecting the ratio of Rf to Ri while the sec-
ond amplifier's gain is fixed by the two internal 20k resistors.
Figure 1 shows that the output of amplifier one serves as the
input to amplifier two which results in both amplifiers produc-
ing signals identical in magnitude, but out of phase by 180°.
Consequently, the differential gain for the IC is
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and Vo2,
an amplifier configuration commonly referred to as “bridged
mode” is established. Bridged mode operation is different
from the classical single-ended amplifier configuration where
one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential drive
to the load, thus doubling output swing for a specified supply
voltage. Four times the output power is possible as compared
to a single-ended amplifier under the same conditions. This
increase in attainable output power assumes that the ampli-
fier is not current limited or clipped. In order to choose an
amplifier's closed-loop gain without causing excessive clip-
ping, please refer to the Audio Power Amplifier Design
section.
A bridge configuration, such as the one used in LM4995, also
creates a second advantage over single-ended amplifiers.
Since the differential outputs, Vo1 and Vo2, are biased at half-
supply, no net DC voltage exists across the load. This elimi-
nates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal IC
power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a suc-
cessful amplifier, whether the amplifier is bridged or single-
ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4995 has two opera-
tional amplifiers in one package, the maximum internal power
dissipation is 4 times that of a single-ended amplifier. The
maximum power dissipation for a given application can be
derived from the power dissipation graphs or from Equation
1.
PDMAX = 4*(VDD)2/(2π2RL) (1)
It is critical that the maximum junction temperature TJMAX of
150°C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding copper foil, the thermal resistance of the ap-
plication can be reduced from the free air value of θJA, result-
ing in higher PDMAX values without thermal shutdown
protection circuitry being activated. Additional copper foil can
be added to any of the leads connected to the LM4995. It is
especially effective when connected to VDD, GND, and the
output pins. Refer to the application information on the
LM4995 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150°C, then additional changes
must be made. These changes can include reduced supply
voltage, higher load impedance, or reduced ambient temper-
ature. Internal power dissipation is a function of output power.
Refer to the Typical Performance Characteristics curves
for power dissipation information for different output powers
and output loading.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high supply rejection. The capac-
itor location on both the bypass and power supply pins should
be as close to the device as possible. A ceramic 0.1μF placed
in parallel with the tantalum 2.2μF bypass (CB) capacitor will
aid in supply stability. This does not eliminate the need for
bypassing the power supply pins of the LM4995. The selec-
tion of a bypass capacitor, especially CB, is dependent upon
PSRR requirements, click and pop performance (as ex-
plained in the section, Proper Selection of External Com-
ponents), system cost, and size constraints.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4995 contains shutdown circuitry that is used to turn off the
amplifier's bias circuitry. This shutdown feature turns the am-
plifier off when logic low is placed on the shutdown pin. By
switching the shutdown pin to GND, the LM4995 supply cur-
rent draw will be minimized in idle mode. Idle current is
measured with the shutdown pin connected to GND. The trig-
ger point for shutdown is shown as a typical value in the
Shutdown Hysteresis Voltage graphs in the Typical Perfor-
mance Characteristics section. It is best to switch between
ground and supply for maximum performance. While the de-
vice may be disabled with shutdown voltages in between
ground and supply, the idle current may be greater than the
typical value of 0.01µA. In either case, the shutdown pin
should be tied to a definite voltage to avoid unwanted state
changes.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry, which pro-
vides a quick, smooth transition to shutdown. Another solution
is to use a single-throw switch in conjunction with an external
pull-up resistor. This scheme guarantees that the shutdown
pin will not float, thus preventing unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using
integrated power amplifiers is critical to optimize device and
system performance. While the LM4995 is tolerant of external
component combinations, consideration to component values
must be used to maximize overall system quality.
The LM4995 is unity-gain stable which gives the designer
maximum system flexibility. The LM4995 should be used in
low gain configurations to minimize THD+N values, and max-
imize the signal to noise ratio. Low gain configurations require
large input signals to obtain a given output power. Input sig-
nals equal to or greater than 1 Vrms are available from
sources such as audio codecs. Please refer to the section,
Audio Power Amplifier Design, for a more complete expla-
nation of proper gain selection.
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
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LM4995
width is dictated by the choice of external components shown
in Figure 1. The input coupling capacitor, Ci, forms a first order
high pass filter which limits low frequency response. This val-
ue should be chosen based on needed frequency response
for a few distinct reasons.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenua-
tion. But in many cases the speakers used in portable sys-
tems, whether internal or external, have little ability to
reproduce signals below 100Hz to 150Hz. Thus, using a large
input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance
is effected by the size of the input coupling capacitor, Ci. A
larger input coupling capacitor requires more charge to reach
its quiescent DC voltage (nominally 1/2 VDD). This charge
comes from the output via the feedback and is apt to create
pops upon device enable. Thus, by minimizing the capacitor
size based on necessary low frequency response, turn-on
pops can be minimized.
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize turn-
on pops since it determines how fast the LM4995 turns on.
The slower the LM4995's outputs ramp to their quiescent DC
voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0µF along with a small value of Ci (in
the range of 0.1µF to 0.39µF), should produce a virtually
clickless and popless shutdown function. While the device will
function properly, (no oscillations or motorboating), with CB
equal to 0.1µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CB equal to 1.0µF is
recommended in all but the most cost sensitive designs.
AUDIO POWER AMPLIFIER DESIGN
A 1W/8 Audio Amplifier
Given:
Power Output 1 Wrms
Load Impedance 8Ω
Input Level 1 Vrms
Input Impedance 20 k
Bandwidth 100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found.
5V is a standard voltage in most applications, it is chosen for
the supply rail. Extra supply voltage creates headroom that
allows the LM4995 to reproduce peaks in excess of 1W with-
out producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 2.
(2)
Rf/Ri = AVD/2
From Equation 2, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 k, and with a
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an
allocation of Ri = 20 k and Rf = 30 k. The final design step
is to address the bandwidth requirements which must be stat-
ed as a pair of −3 dB frequency points. Five times away from
a −3 dB point is 0.17 dB down from passband response which
is better than the required ±0.25 dB specified.
fL = 100Hz/5 = 20Hz
fH = 20kHz * 5 = 100kHz
As stated in the External Components section, Ri in con-
junction with Ci create a highpass filter.
Ci 1/(2π*20 k*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD. With
a AVD = 3 and fH = 100kHz, the resulting GBWP = 300kHz
which is much smaller than the LM4995 GBWP of 2.5MHz.
This figure displays that if a designer has a need to design an
amplifier with a higher differential gain, the LM4995 can still
be used without running into bandwidth limitations.
The LM4995 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical appli-
cation. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (C4) may be needed
as shown in Figure 2 to bandwidth limit the amplifier. This
feedback capacitor creates a low pass filter that eliminates
possible high frequency oscillations. Care should be taken
when calculating the -3dB frequency in that an incorrect com-
bination of R3 and C4 will cause rolloff before 20kHz. A typical
combination of feedback resistor and capacitor that will not
produce audio band high frequency rolloff is R3 = 20k and
C4 = 25pf. These components result in a -3dB point of ap-
proximately 320kHz.
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LM4995
201599d4
FIGURE 2. HIGHER GAIN AUDIO AMPLIFIER
201599d5
FIGURE 3. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4995
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LM4995
201599d6
FIGURE 4. REFERENCE DESIGN BOARD SCHEMATIC
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LM4995
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a major
impact on low level signal performance. Star trace routing
refers to using individual traces to feed power and ground to
each circuit or even device. This technique will require a
greater amount of design time but will not increase the final
price of the board. The only extra parts required will be some
jumpers.
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing High Frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digital
and analog ground traces to minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signal traces
should be located as far away as possible from analog com-
ponents and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces par-
allel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each other
from the top to the bottom side as much as possible will min-
imize capacitive noise coupling and cross talk.
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LM4995
Revision History
Rev Date Description
1.0 04/05/06 Initial WEB released of the datasheet.
1.1 05/17/06 Added the SD package.
1.2 08/07/06 Text edits.
1.3 08/22/06 Edited the THD+N Typical values on
the 3 EC tables, then re-released the D/
S to the WEB (per Allan S.).
1.4 09/11/07 Updated the SD pkg. diagram.
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LM4995
Physical Dimensions inches (millimeters) unless otherwise noted
TM Package
Order Number LM4995TM
NS Package Number TMD09AAA
X1 = 1.215± 0.03mm X2 = 1.215 ± 0.03mm X3 = 0.6 ± 0.075mm
SDPackage
Order Number LM4995SD
NS Package Number SDA08A
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LM4995
Notes
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LM4995
Notes
LM4995 1.3 W Audio Power Amplifier
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