TC74HC390AP/AF/AFN DUAL DECADE COUNTER The TC74HC390A is a high speed CMOS DUAL DECADE COUNTER LATCH fabricated with silicon gate C'MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists of two independent 4bit counters, each composed of a divide-by-two and a divideby~five counter.The divideby~two counter is incremented on the negative going transition of clock A(CKA). The divided- by~five counter is incremented on the negative going transition of clock B(CKB). The counter can be cascaded to form decade, bi-quinary, or various combinations up to a divideby-100 counter. When the CLEAR input is set high, the Q outputs are set to low independent of the clock inputs. All inputs are equipped with protection circuits against static dischage or transient excess voltage. FEATURES: * High Speed s+ssesssessssssseeeseesses Fa y=B4MHa(typ.)at Voc =5V * Low Power Dissipation --+++++---+ IqQn=44 A(Max.)at Ta=25C High Noise Immunity s+-rs+++++ +> Vain = Ve 28% Voc (Min. ) Output Drive Capability -+--+------ 10 LSTTL Loads * Symmetrical Output Impedance *~ | Ig1]=Iq. =4mA(Min.) Balanced Propagation Delays ------ tory > tou * Wide Operating Voltage Range *-- Voc (opr. )=2V~6V Pin and Function Compatible with 74LS390 1 P(DIP16-P300A) 1 1 F(SOP16-P300) FN(SOL16-P-150) PIN ASSIGNMENT iCKA 1 16 Voc 1CLR 20 15 2CKA 104 3Q 14 2CLR TcKs 4 13 20a 108 5] 12 2CKB 1ac 6 1 2068 100 7 10 20 GND 8{ 9 200 (TOP VIEW) 1EC LOGIC SYMBOL BLOCK DIAGRAM ICLR ICKA 104 108 1cKB 1ac 10D 2CLR 2CKA 20a 206 2CKB 20 200 1.15 |BINARY 3.13 CKA COUNTER Qa cLR 214 | | 5.11 QUINARY ake 422 [6.10 44 COUNTER] 7,9 }L"_ ap Voc=16.GND=8 HC-542TC74HC390AP/AF/AFN TRUTH TABLE INTPUTS OUTPUTS CKA CKB CLR QA OB ac aD x x H L C L L t x L BINARY COUNT UP x tL L QUINARY COUNT UP SYSTEM DIAGRAM(1/2 package) cka o>po______ak,, + -d> 0 CLR {>o _t CKB d>o dex 0 d> as Lol 3 HC-543TC74HC390AP/AF/AFN (1)8CO COUNT SEQUENCE CLR ality LIS LI Ls LSP LS LO a8} Li ry wt tl rs ac} | 1 ao} | 7 | b riatialalb oe lot ato tot oliail. CLR + QA connected to CKB (2)BI-QUINARY COUNT SEQUENCE** CLR Sy oa iif LJ rT LJ 1 TL _S- ac (| PP ap |} f~ l Qa} r | ori 2tgal 4 | ato! win ow | 0 1 2 CLR ** QD connected to CKA HC-544ABSOLUTE MAXIMUM RATINGS TC74HC390AP/AF /AFN PARAMETER SYMBOL VALUE UNIT Supply Voltage Range Vee 0.5~7 Vv *500mW in the range of Ta= . -)5~ -40C~ 65C. From Ta=65C DC Input Voltage Vis 0.5 ~Voc $0.5 Vv to 85C a derating factor of DC Output Voltage Vour -0.5 ~ Voc + 0.5 Vv -10mW/C shall be applied Input Diode Current lx +20 mA until 300m W. Output Diode Current lox +20 mA DC Output Current lout +25 mA DC Vec/Ground Current lec +50 mA Power Dissipation Py 500(DIP)#/180(MFP) mW Storage Temperature Tstg ~65 ~150 i 6 Lead Temperature 10sec T, 300 Cc RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL VALUE UNIT Supply Voltage Voc 2~6 Vv Input Voltage Vin 0~ Veco Vv Output Voltage Vour 0 ~ Voc Vv Operating Temperature Topr -40 ~ 85 C 0 ~ 1000( VQ. =2.0V) Input Rise and Fall Time | t;, tr O~ 500( Vo =4.5V) ns 0 ~ 400(Voc=6.0V) DC ELECTRICAL CHARACTERISTICS Ta=25C Ta=40 ~85C PARAMETER |SYMBOL TEST CONDITION Veo MIN, | TYP. [MAX.| MIN. [ MAX. UNIT a 2.0 1.5 ~ - 1.5 - teat Village | VIN a5} 315]; - - | gis} - |v | 6.0 4.2 = = 4,2 = _ 2.0 - - 5 - 0.5 Tao Voltage Viv 45 | - - 35 | - 1.35 | V 6.0 = ~ 8 = 18 2.0 1,9 2.0 - 1.9 ~ High-Level Vx = Toy =-20n A! 4,5 4.4 4.5 7 4.4 - Output Voltage Vou ViyorVis 6.0 5.9 6.0 3.9 Vv Hee Top =-4 mA) 45 [ 4b] 43ar fo - 4.13 [= lor =-5.2mA/ 6.0 5. 68 5. 80 = 5, 63 = 2.0 - 0.0 0.1 - 0.1 Low-Level Via = Iq =20 wA} 4.5 7 0.0 0.1 7 0.1 Output Voltage Vo. ViyorV, 6.0 0.0 0.1 0.1 Vv " me TTg sq mA] 4.5 = 0.17 | 0.26 = 0. 33 Iq =5,2mA | 6.0 = 0. 18 0. 26 ~ 0. 33 Input Leakage Current lis Vix =Voc or GND 6.0 = = +0.1 - +1.0 A Quiescent Supply Current loc Viv =Voc or GND 6.0 = - 4,0 - 40.0 | # HO-545TC74HC390AP/AF/AFN TIMING REQUIREMENTS (input t-=t(=6ns) Ta=40 ~85C PARAMETER SYMBOL| TEST CONDITION Va TYP LIMIT CIMIT UNIT Minimum Pulse Width } twa) is - i i (CLOCK) twa 6.0 - 13 16 Minimum Pulse Width | , ss - 5 3 (CLR) wu) 4. 15 1 6.0 = 13 16 2.0 - 25 30 Minimum Removal Time | trem 4.5 ~ 5 6 ns 6.0 = 5 5 Clock Frequency f 2. : - " (CKA) 6.0 - 38 31 Clock Frequency f et - a (CKB) 6.0 - 36 29 AC ELECTRICAL CHARACTERISTICS(C, =16pF, Voc=5V, Ta=26C ) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. |UNIT Output Transition Time tT - 4 8 tTHL Propagation Delay Time | tyy _ 10 20 (CKA-QA) tout Propagation Delay Time | , ao _ (CKA-QC) toe. QA connected to CKB 29 51 Propagation Delay Time | tay _ 12 29 ns (CKB-@QB, QD) CoH Propagation Delay Time | tory _ 17 32 (CKB-QC) toHL Propagation Delay Time _ (CLR-Qn) to 12 26 Maximum Clock Frequency f, 84 _ (CKA) MAX 35 MHz Maximum Clock Frequency f 33 65 _ (CKB) MAX HG-546AC ELECTRICAL CHARACTERISTICS(C,=50pF Input t,-=t, =6ns) TC74HC390AP/AF/AFN Ta=25C Ta=-40 ~85C PARAMETER SYMBOL| TEST CONDITION Voc | MIN- | TYP: [MAX | MIN. [MAX. UNIT t 2.0 - 30 15 - 95 Output Transition Time pu 4.5 - 8 15 - 19 THL 6.0 | - 7 13 = 16 Propagation Delay Time | tyy, 2.0 ~ 39 120 ~ 150 ___ t 4.5 - 13 24 - 30 (CKA-QA) pHL 6.0 - 11 20 - 26 Propagation Delay Time | toy QA connected to 2.0 ~ 102 290 7 365 ao t ~S 4.5 - 34 58 73 (CKA~QC) ou | CKB 6.0 | - | 29 | 49 | - 62 = = ns Propagation Delay Time | tyH ae _ % _ 16 (CKB-QB, QD) | tn 60 | - | 13 | 2 | - | 2 Propagation Delay Time | tyy is - * a "3 (CKB-QC) oe 60 | - | 1 | a | - 28 Propagation Delay Time 2.0 - 45 150 _ 190 tout 4.5 - 15 30 38 (CLR-Qn) 6.0 | - 13 2g | - 32 Maximum Frequency fax ie Ps i - a (CKA) 6.0 | 38 | 90 - | 31 =| arte Maximum Clock Frequency 2.0 6 15 ~ 5 ~ CKE fMAX 4.5 | 31 60 - 25 - (CKB) 6.0 | 36 | 70 -_| 29 = Input Capacitance Cw - 5 10 = 10 F Power Dissipation Capacitance | Cpp{1) = 44 - = = P Note(1) Cpp is defined as the value of the internal equivalent capacitance which operating current consumption without load. Average operating current can be obtained by the equation: Ioc ge=Cpp * Vacs fix tla /2(per Counter) HC-547 is calculated from the