LTC1647-1/
LTC1647-2/LTC1647-3
1
1647fa
TYPICAL APPLICATION
FEATURES DESCRIPTION
Dual Hot Swap Controllers
The LTC
®
1647-1/LTC1647-2/LTC1647-3 are dual Hot
Swap™ controllers that permit a board to be safely inserted
and removed from a live backplane.
Using external N-channel MOSFETs, the board supply
voltages can be ramped up at a programmable rate. A high
side switch driver controls the MOSFET gates for supply
voltages ranging from 2.7V to 16.5V. A programmable
electronic circuit breaker protects against overloads and
shorts. The ON pins are used to control board power or
clear a fault.
The LTC1647-1 is a dual Hot Swap controller with a
common VCC pin, separate ON pins and is available in an
SO-8 package. The LTC1647-2 is similar to the LTC1647-1
but combines a fault status flag with automatic retry at
the ON pins and is also available in the SO-8 package. The
LTC1647-3 has individual VCC pins, ON pins and FAULT
status pins for each channel and is available in a 16-lead
narrow SSOP package.
Dual Motherboard Resident Hot Swap Controller
APPLICATIONS
n Allows Safe Board Insertion and Removal from a
Live Backplane
n Programmable Electronic Circuit Breaker
n FAULT Output Indication
n Programmable Supply Voltage Power-Up Rate
n High Side Drive for External MOSFET Switches
n Controls Supply Voltages from 2.7V to 16.5V
n Undervoltage Lockout
n Hot Board Insertion
n Electronic Circuit Breaker
n Portable Computer Device Bays
n Hot Plug Disk Drive
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
ON1
12V
SUPPLY
ON2
10nF
10nF
DDZ23*
10Ω
20mΩ IRF7413
20mΩ
IRF7413
CLOAD
VOUT1
(2.5A)
VOUT2
(2.5A)
10Ω
1647-1/2/3 TA01
VCC SENSE 1
ON1
ON2
GND
GATE 1
SENSE 2 GATE 2
LTC1647-1
+
DDZ23*
CLOAD
+
*REQUIRED FOR VCC > 10V
10ms/DIV
VON
5V/DIV
VOUT
5V/DIV
VGATE
10V/DIV
1647-1/2/3 TA01a
ON/OFF Sequence
LTC1647-1/
LTC1647-2/LTC1647-3
2
1647fa
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC) ................................................17V
Input Voltage (SENSE) ................. –0.3V to (VCC + 0.3V)
Input Voltage (ON) .....................................–0.3V to 17V
Output Voltage (FAULT) ..............................– 0.3V to 17V
Output Voltage (GATE) ...........Internally Limited (Note 3)
(Note 1)
1
2
3
4
8
7
6
5
TOP VIEW
SENSE1
SENSE2
GATE1
GATE2
VCC
ON1
ON2
GND
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, qJA = 130°C/W
1
2
3
4
8
7
6
5
TOP VIEW
SENSE1
SENSE2
GATE1
GATE2
VCC
ON1/FAULT1
ON2/FAULT2
GND
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, qJA = 130°C/W
1
2
3
4
5
6
7
8
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
16
15
14
13
12
11
10
9
VCC1
ON1
FAULT1
ON2
FAULT2
NC
NC
GND
VCC2
SENSE1
SENSE2
GATE1
GATE2
NC
NC
NC
TJMAX = 150°C, qJA = 130°C/W
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1647-1CS8#PBF LTC1647-1CS8#TRPBF 16471 8-Lead (4mm ¥ 3mm) Plastic SO 0°C to 70°C
LTC1647-1IS8#PBF LTC1647-1IS8#TRPBF 16471I 8-Lead (4mm ¥ 3mm) Plastic SO –40°C to 85°C
LTC1647-2CS8#PBF LTC1647-2CS8#TRPBF 16472 8-Lead (4mm ¥ 3mm) Plastic SO 0°C to 70°C
LTC1647-2IS8#PBF LTC1647-2IS8#TRPBF 16472I 8-Lead (4mm ¥ 3mm) Plastic SO –40°C to 85°C
LTC1647-3CGN#PBF LTC1647-3CGN#TRPBF 16473 16-Lead Plastic SSOP 0°C to 70°C
LTC1647-3IGN#PBF LTC1647-3IGN#TRPBF 16473I 16-Lead Plastic SSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Operating Temperature Range
C-Grade ................................................... 0°C to 70°C
I-Grade ................................................. –40°C to 85°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
LTC1647-1/
LTC1647-2/LTC1647-3
3
1647fa
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: An internal Zener on the GATE pins clamp the charge pump
voltage to a typical maximum operating voltage of 28V. External overdrive
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC VCCX Supply Range Operating Range l2.7 16.5 V
ICC VCC Supply Current (Note 4) ON1, ON2 = VCC1 = VCC2, ICC = ICC1 + ICC2 l1.0 6 mA
ICCX VCCX Supply Current (Note 5, LTC1647-3) ONX = VCCX, ICCX Individually Measured,
VCC1 = 5V, VCC2 = 12V or VCC1 = 12V, VCC2 = 5V
l0.5 5 mA
VLKO VCCX Undervoltage Lockout Coming Out of UVLO (Rising VCCX)l2.30 2.45 2.60 V
VLKH VCCX Undervoltage Lockout Hysteresis 210 mV
VCB Circuit Breaker Trip Voltage VCB = VCCX – VSENSEX l40 50 60 mV
ICP GATEX Output Current ONX High, FAULTX High, VGATE = GND (Sourcing)
ONX Low, FAULTX High, VGATE = VCC (Sinking)
ONX High, FAULTX Low, VGATE = 15V (Sinking)
l610
50
50
14 μA
μA
mA
ΔVGATE External MOSFET Gate Drive (VGATE – VCC), VCC1 = VCC2 = 5V
(VGATE – VCC), VCC1 = VCC2 = 12V
l
l
10
10
13
15
17
19
V
V
VONHI ONX Threshold High l1.20 1.29 1.38 V
VONLO ONX Threshold Low l1.17 1.21 1.25 V
VONHYST ONX Hysteresis 70 mV
IIN ONX Input Current ON = GND or VCC l±1 ±10 μA
VOL FAULTX Output Low Voltage
(LTC1647-2, LTC1647-3)
IO = 1mA, VCC = 5V
IO = 5mA, VCC = 5V
l
0.8
0.4 V
V
ILEAK FAULTX Output Leakage Current
(LTC1647-3)
No Fault, FAULTX = VCC = 5V ±1 ±10 μA
t
FAULT Circuit Breaker Delay Time VCCX – VSENSEX = 0 to 100mV 0.3 μs
tRESET Circuit Breaker Reset Time ONX High to Low, to FAULTX High l50 100 μs
tON Turn-On Time ONX Low to High, to GATEX On 2 μs
tOFF Turn-Off Time ONX High to Low, to GATEX Off 1 μs
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
of the GATE pin beyond the internal Zener voltage may damage the device.
The GATE capacitance must be <0.15μF at maximum VCC. If a lower GATE
pin clamp voltage is desired, use an external Zener diode.
Note 4: The total supply current ICC is measured with VCC1 and VCC2
connected internally (LTC1647-1, LTC1647-2) or externally (LTC1647-3).
Note 5: The individual supply current ICCX is measured on the LTC1647-3.
The lower of the two supplies, VCC1 and VCC2, will have its channel’s
current. The higher supply will carry the additional supply current of the
charge pump and the bias generator beside its channel’s current.
LTC1647-1/
LTC1647-2/LTC1647-3
4
1647fa
TYPICAL PERFORMANCE CHARACTERISTICS
ICC vs VCC ICC vs Temperature ICC1 vs VCC2
VCC (V)
26 10 14 184 8 12 16
ICC (mA)
1647-1/2/3 G01
6
5
4
3
2
1
0
TA = 25°C
ICC = ICC1 + ICC2
VCC = VCC1 = VCC2 = ON1 = ON2
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100 125 150
ICC (mA)
1647-1/2/3 G02
6
5
4
3
2
1
0
ICC = ICC1 + ICC2
VCC = VCC1 = VCC2 = ON1 = ON2
VCC = 15V VCC = 12V
VCC = 3V
VCC = 5V
VCC2 (V)
02468101214161820
ICC1 (mA)
1647-1/2/3 G03
5
4
3
2
1
0
TA = 25°C
VCC1 = 15V
VCC1 = 12V
VCC1 = 3V
VCC1 = 5V
LTC1647-1 Pinout
PIN DESCRIPTION PIN DESCRIPTION
1V
CC 5 GATE2
2 ON1 6 GATE1
3 ON2 7 SENSE2
4 GND 8 SENSE1
LTC1647-1 Does Not Have the FAULT Status Feature.
LTC1647-2 Pinout
PIN DESCRIPTION
1V
CC
2 ON1 and FAULT1
(Internally Tied Together)
3 ON1 and FAULT2
(Internally Tied Together)
4 GND
The ONX/FAULTX must be connected to a driver via a resistor if the
autoretry feature is being used.
PIN DESCRIPTION
5 GATE2
6 GATE1
7 SENSE2
8 SENSE1
LTC1647-3 Pinout
PIN DESCRIPTION PIN DESCRIPTION
1V
CC 9NC
2 ON1 10 NC
3FAULT1 11 NC
4 ON2 12 GATE2
5FAULT2 13 GATE1
6 NC 14 SENSE2
7 NC 15 SENSE1
8 GND 16 VCC2
PIN TABLES
LTC1647-1/
LTC1647-2/LTC1647-3
5
1647fa
TYPICAL PERFORMANCE CHARACTERISTICS
VGATE1 vs VCC2
GATE Output Source Current
vs VCC
GATE Output Source Current
vs Temperature
ICC2 vs VCC2 (VGATE – VCC) vs VCC VGATE vs VCC
(VGATE – VCC) vs Temperature VGATE vs Temperature (VGATE1 – VCC1) vs Temperature
VCC2 (V)
0 2 4 6 8 10 12 14 16 18 20
ICC2 (mA)
1647-1/2/3 G04
5
4
3
2
1
0
TA = 25°C
VCC1 = 15V
VCC1 = 12V
VCC1 = 3V
VCC1 = 5V
VCC (V)
02468101214161820
(VGATE – VCC) (V)
1647-1/2/3 G05
20
18
16
14
12
10
8
6
4
2
0
TA = 25°C
VCC = VCC1 = VCC2
VCC (V)
02468101214161820
VGATE (V)
1647-1/2/3 G06
30
25
20
15
10
5
0
TA = 25°C
VCC = VCC1 = VCC2
TEMPERATURE (°C)
(VGATE – VCC) (V)
1647-1/2/3 G07
20
18
16
14
12
10
8
6
4
2
0
VCC = VCC1 = VCC2
–75 –50 –25 0 25 50 75 100 125 150
VCC = 15V
VCC = 12V
VCC = 3V
VCC = 5V
TEMPERATURE (°C)
VGATE (V)
1647-1/2/3 G08
35
30
25
20
15
10
5
0
VCC = VCC1 = VCC2
–75 –50 –25 0 25 50 75 100 125 150
VCC = 15V
VCC = 12V
VCC = 3V
VCC = 5V
VCC2 (V)
0 2 4 6 8 10 12 14 16 18 20
(VGATE1 – VCC1) (V)
1647-1/2/3 G09
20
18
16
14
12
10
8
6
4
2
0
VCC1 = 15V
VCC1 = 12V
VCC1 = 3V
VCC1 = 5V
TA = 25°C
(LTC1647-3)
VCC2 (V)
02468101214161820
VGATE1 (V)
1647-1/2/3 G10
35
30
25
20
15
10
5
0
TA = 25°C
(LTC1647-3)
VCC1 = 15V
VCC1 = 12V
VCC1 = 3V
VCC1 = 5V
VCC (V)
02468101214161820
GATE OUTPUT SOURCE CURRENT (μA)
1647-1/2/3 G11
14
13
12
11
10
9
8
7
6
TA = 25°C
VCC = VCC1 =VCC2
TEMPERATURE (°C)
GATE OUTPUT SOURCE CURRENT (μA)
1647-1/2/3 G12
14
13
12
11
10
9
8
7
6
VCC = VCC1 = VCC2 = 5V
–75 –50 –25 0 25 50 75 100 125 150
LTC1647-1/
LTC1647-2/LTC1647-3
6
1647fa
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold
vs Temperature ON Threshold Voltage vs VCC
ON Threshold Voltage
vs Temperature
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
1647-1/2/3 G19
2.6
2.5
2.4
2.3
2.2
2.1
–75 –50 –25 0 25 50 75 100 125 150
RISING EDGE
FALLING EDGE
VCC (V)
0 2 4 6 8 10 12 14 16 18 20
ON THRESHOLD VOLTAGE (V)
1647-1/2/3 G20
1.35
1.30
1.25
1.20
1.15
TA = 25°C
HIGH
LOW
TEMPERATURE (°C)
ON THRESHOLD VOLTAGE (V)
1647-1/2/3 G21
1.35
1.30
1.25
1.20
1.15
–75 –50 –25 0 25 50 75 100 125 150
VCC = 5V
HIGH
LOW
GATE Output Sink Current vs VCC
GATE Output Sink Current
vs Temperature
GATE Fast Pull-Down Current
vs VCC
GATE Fast Pull-Down Current
vs Temperature
Circuit Breaker Trip Voltage
vs VCC
Circuit Breaker Trip Voltage
vs Temperature
VCC (V)
0 2 4 6 8 10 12 14 16 18 20
GATE OUTPUT SINK CURRENT (μA)
1647-1/2/3 G13
100
90
80
70
60
50
40
30
20
10
0
TA = 25°C
TEMPERATURE (°C)
GATE OUTPUT SINK CURRENT (μA)
1647-1/2/3 G14
55
54
53
52
51
50
49
48
47
46
45
VCC = 5V
–75 –50 –25 0 25 50 75 100 125 150
VCC (V)
0 2 4 6 8 10 12 14 16 18 20
GATE FAST PULL-DOWN CURRENT (mA)
1647-1/2/3 G15
60
55
50
45
40
35
30
TA = 25°C
TEMPERATURE (°C)
GATE FAST PULL-DOWN CURRENT (mA)
1647-1/2/3 G16
80
70
60
50
40
30
20
10
0
–75 –50 –25 0 25 50 75 100 125 150
VCC = VCC1 = VCC2 = 5V
VCC (V)
0 2 4 6 8 10 12 14 16 18 20
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1647-1/2/3 G17
60
58
56
54
52
50
48
46
44
42
40
TA = 25°C
TEMPERATURE (°C)
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1647-1/2/3 G18
60
58
56
54
52
50
48
46
44
42
40
–75 –50 –25 0 25 50 75 100 125 150
VCC = 15V
VCC = 12V
VCC = 5V
VCC = 3V
LTC1647-1/
LTC1647-2/LTC1647-3
7
1647fa
FAULT VOL vs VCC FAULT VOL vs Temperature tFAULT vs VCC
tFAULT vs Temperature Circuit Breaker Reset Time vs VCC
Circuit Breaker Reset Time
vs Temperature
VCC (V)
02468101214161820
FAULT VOL (V)
1647-1/2/3 G22
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
TA = 25°C
IOL = 5mA
IOL = 1mA
TEMPERATURE (°C)
FAULT VOL (V)
1647-1/2/3 G23
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
VCC = 5V
IOL = 5mA
IOL = 1mA
–75 –50 –25 0 25 50 75 100 125 150
VCC (V)
02468101214161820
TFAULT (μs)
1647-1/2/3 G24
1.0
0.8
0.6
0.4
0.2
0
TA = 25°C
TEMPERATURE (°C)
TFAULT (μs)
1647-1/2/3 G25
1.0
0.8
0.6
0.4
0.2
0
–75 –50 –25 0 25 50 75 100 125 150
VCC = 15V
VCC = 12V
VCC = 3V
VCC = 5V
VCC (V)
0 2 4 6 8 10 12 14 16 18 20
CIRCUIT BREAKER RESET TIME (μs)
1647-1/2/3 G26
70
60
50
40
30
TA = 25°C
TEMPERATURE (°C)
CIRCUIT BREAKER RESET TIME (μs)
1647-1/2/3 G27
60
58
56
54
52
50
48
46
44
42
40
–75 –50 –25 0 25 50 75 100 125 150
VCC = 3V
VCC = 5V
VCC = 12V
VCC = 15V
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1647-1/
LTC1647-2/LTC1647-3
8
1647fa
PIN FUNCTIONS
VCC1 (LTC1647-3): Channel 1 Positive Supply Input.
The supply range for normal operation is 2.7V to 16.5V.
The supply current, ICC1, is typically 1mA. Channel 1’s
undervoltage lockout (UVLO) circuit disables GATE 1 until
the supply voltage at VCC1 is greater than VLKO (typically
2.45V). GATE 1 is held at ground potential until UVLO
deactivates. If ON1 is high and VCC1 is above the UVLO
threshold voltage, GATE 1 is pulled high by a 10μA current
source. If VCC1 falls below (VLKO – VLKH), GATE 1 is pulled
immediately to ground. The internal reference and the
common charge pump are powered from the higher of
the two VCC inputs, VCC1 or VCC2.
VCC2 (LTC1647-3): Channel 2 Positive Supply Input. See
VCC1 for functional description.
VCC: The Common Positive Supply Input for the LTC1647-1
and the LTC1647-2. VCC1 and VCC2 are internally connected
together.
GND: Chip Ground.
ON1: Channel 1 ON Input. The threshold at the ON1 pin is
set at 1.29V with 70mV hysteresis. If UVLO and the circuit
breaker of channel 1 are inactive, a logic high at ON1 enables
the 10μA charge pump current source, pulling the GATE
1 pin above VCC1. If the ON1 pin is pulled low, the GATE 1
pin is pulled to ground by a 50μA current sink.
ON1 resets channel 1’s electronic circuit breaker by pulling
ON1 low for greater than one tRESET period (50μs). A
low-to-high transition at ON1 restarts a normal GATE 1
pull-up sequence.
ON2: Channel 2 ON Input. See ON1 for functional
description.
FAULT1: Channel 1 Open-Drain Fault Status Output. FAULT1
pin pulls low after 0.3μs (tFAULT) if the circuit breaker
measures greater than 50mV across the sense resistor
connected between VCC1 and SENSE 1. If FAULT1 pulls
low, GATE 1 also pulls low. FAULT1 remains low until ON1
is pulled low for at least one tRESET period.
FAULT2: Channel 2 Open-Drain Fault Status Output. See
FAULT 1 for functional description.
SENSE1: Channel 1 Circuit Breaker Current Sense Input.
Load current is monitored by a sense resistor connected
between VCC1 and SENSE 1. The circuit breaker trips if the
voltage across the sense resistor exceeds 50mV (VCB). To
disable the circuit breaker, connect SENSE 1 to VCC1. In
order to obtain optimum performance, use Kelvin-sense
connections between the VCC and SENSE pins to the
current sense resistor.
SENSE2: Channel 2 Circuit Breaker Current Sense Input.
See SENSE 1 for functional description.
GATE1: Channel 1 N-channel MOSFET Gate Drive Output.
An internal charge pump guarantees at least 10V of gate
drive from a 5V supply. Two Zener clamps are incorporated
at the GATE 1 pin; one Zener clamps GATE 1 approximately
15V above VCC and the second Zener clamps GATE 1
appoximately 28V above GND. The rise time at GATE 1 is
set by an external capacitor connected between GATE 1
and GND and an internal 10μA current source provided
by the charge pump. The fall time at GATE 1 is set by
the 50μA current sink if ON1 is pulled low. If the circuit
breaker is tripped or the supply voltage hits the UVLO
threshold, a 50mA current sink rapidly pulls GATE 1 low.
An external 23V Zener from GATE1 to GND is required for
supply voltages (VCC1) greater than 10V.
GATE2: Channel 2 N-channel MOSFET Gate Drive Output.
See GATE 1 for functional description.
NC: No Connection.
LTC1647-1/
LTC1647-2/LTC1647-3
9
1647fa
BLOCK DIAGRAMS
3
–
+
50μs
FILTER
–
+
1.21V
50mV CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10μA
CP
+
–
50μA
2.45V
UVL
CHARGE
PUMP
REFERENCE 1.21V
ON2
1647-1/2/3 BD1
7SENSE2 5GATE2
4GND
1VCC
CP
2ON1
8SENSE1
6GATE1
3
–
+
50μs
FILTER
–
+
1.21V
50mV CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10μA
CP
+
–
50μA
FAULT
2.45V
UVL
CHARGE
PUMP
REFERENCE 1.21V
ON2/FAULT2
1647-1/2/3 BD2
7SENSE2 5GATE2
4GND
1VCC
CP
2ON1/FAULT1
8SENSE1
6GATE1
LTC1647-1
LTC1647-2
LTC1647-1/
LTC1647-2/LTC1647-3
10
1647fa
BLOCK DIAGRAMS
14
–
+
50μs
FILTER
–
+
1.21V
50mV CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10μA
CP
+
–
50μA
FAULT
2.45V
UVL
CHARGE
PUMP
REFERENCE 1.21V
SENSE2
4ON2
5FAULT2
1647-1/2/3 BD3
16VCC2 12 GATE2
8GND CP VCC
SELECTION
15SENSE1
13 GATE1
3FAULT1
2ON1
1VCC1
LTC1647-3
VCC Selection Circuit
The LTC1647-3 features separate supply inputs (VCC1
and VCC2) for each channel. The reference and charge
pump circuit draw supply current from the higher of the
two supplies. An internal VCC selection circuit detects and
makes the power connection automatically. This allows
a 3V channel to have standard MOSFET gate overdrive
when the other channel is 5V. An internal Zener clamps
GATE about 15V above VCC.
If both supplies are connected together (internally for
LTC1647-1 and LTC1647-2 or externally for LTC1647-3),
the reference and charge pump circuit draw equal current
from both pins.
APPLICATIONS INFORMATION
Electronic Circuit Breaker
Each channel of the LTC1647 features an electronic circuit
breaker to protect against excessive load current and short-
circuits. Load current is monitored by sense resistor R1 as
shown in Figure 1. The circuit breaker threshold, VCB, is
50mV and it exhibits a response time, tFAULT, of approximately
300ns. If the voltage between VCC and SENSE exceeds VCB
for more than tFAULT, the circuit breaker trips and immediately
pulls GATE low with a 50mA current sink. The MOSFET turns
off and FAULT pulls low. The circuit breaker is cleared by
pulling the ON pin low for a period of at least tRESET (50μs).
A timing diagram of these events is shown in Figure 2.
The value of the sense resistor R1 is given by:
R1 = VCB/ITRIP(Ω)
LTC1647-1/
LTC1647-2/LTC1647-3
11
1647fa
APPLICATIONS INFORMATION
SENSE
15 13
ON1
2
FAULT
ON
VCC VOUT
FAULT 3
GND
8
GATE
LTC1647-3
C1
10nF
1647-1/2/3 F01
R2
10Ω
*D1
DDZ23
R1
0.01Ω
Q1
IRF7413
CLOAD
+
VCC
1
R3
10k
*D1 REQUIRED FOR VCC > 10V
Figure 1. Supply Control Circuitry
tFAULT
tRESET
VON
VCC – VSENSE
VGATE
VFAULT
1647-1/2/3 F02
SENSE
VCC VOUT
GATE
LTC1647
C1
10nF
C3
10nF
1647-1/2/3 F03
R2
10Ω
R1
0.01Ω
Q1
IRF7413
CLOAD IPK = 7.5A
IAV = 2.5A
ITRIP = VCB/R1 = 5A
tDELAY = 10μs
+
VCC
R3
1.5k
Figure 2. Current Fault Timing
Figure 3. Filtering Current Ripple/Glitches
where VCB is the circuit breaker trip voltage (50mV) and
ITRIP is the value of the load current at which the circuit
breaker trips. Kelvin-sense layout techniques between
the sense resistor and the VCC and SENSE pins are highly
recommended for proper operation.
The circuit breaker trip voltage has a tolerance of 20%;
combined with a 5% sense resistor, the total tolerance is
25%. Therefore, calculate R1 based on a trip current ITRIP
of no less than 125% of the maximum operating current.
Do not neglect the effect of ripple current, which adds to
the maximum DC component of the load current. Ripple
current may arise from any of several sources, but the
worst offenders are switching supplies.
A switching regulator on the load side will attempt to draw
some ripple current from the backplane and this current
passes through the sense resistor. Similarly, output ripple
from a switching regulator supplying the backplane will flow
through the sense resistor and into the load capacitor.
Minimize the effects of ripple current by either filtering the
VOUT line or adding an RC filter to the SENSE pin. A series
inductance of 1μH to 10μH inserted between Q1 and CLOAD
is adequate ripple current suppression in most cases.
Alternatively, a filter, consisting of R3 and C3 (Figure 3),
simply filters the ripple component from the SENSE pin at the
expense of response time. The added delay is given by:
t
DELAY = –R3•C3•ln[1 – (VCB/R1 – IAV)/(IPK – IAV)]
Power MOSFET Selection
Power MOSFETs are classified into two catagories: standard
MOSFETs (RDS(ON) specified at VGS = 10V) and logic-level
MOSFETs (RDS(ON) specified at VGS = 5V). The absolute
maximum rating for VGS is typically 20V for standard
MOSFETs. The maximum rating for logic-level MOSFETs
is lower and ranges from 8V to 16V depending on the
manufacturer and specific part number. Some logic-level
MOSFETs have a 20V maximum VGS rating. The LTC1647
is primarily targeted for standard MOSFETs; low supply
voltage applications should use logic-level MOSFETs. GATE
overdrive as a function of VCC is illustrated in the Typical
Performance Curves. If lower GATE overdrive is desired,
connect a diode in series with a Zener between GATE and
VCC or between GATE and VOUT as shown in Figure 4. For
VCC VOUT
*D1, D4 USER SELECTED VOLTAGE CLAMP
1N4688 (5V)
1N4692 (7V): LOGIC-LEVEL MOSFET
1N4695 (9V)
1N4702 (15V): STANDARD-LEVEL MOSFET
**D5 DDZ23 (23V) REQUIRED FOR VCC > 10V 1647-1/2/3 F04
R1
D1*
D2
1N4148 D4*
D2
1N4148
Q1
**D5
Figure 4. Optional Gate Clamp
LTC1647-1/
LTC1647-2/LTC1647-3
12
1647fa
APPLICATIONS INFORMATION
VCC + ΔVGATE
VCC
VCC
VON
CLOAD DISCHARGES
RAMP-DOWN
SLOPE = –50μA/C1
RAMP-UP
SLOPE = 10μA/C1
VOUT
VGATE
0V
0V 1647-1/2/3 F05
VCC + ΔVGATE
VCC
VCC
VCC
VLKO
VLKO – VLKH
CLOAD DISCHARGES
VCC
UNPLUGGED
OUT OF UVLO
INTO UVLO
FAST RAMP-DOWN
AT UNDERVOLTAGE
LOCKOUT
VGATE DROOP
DUE TO VCC
RAMP-UP
SLOPE = 10μA/C1
VOUT
VGATE
0V
0V 1647-1/2/3 F06
Figure 5. Supply Turn-On/Off with ON
Figure 6. Supply Turn-On/Off with VCC
SENSE
86
ON/FAULT
VCC VOUT
FAULT
ON
(5V LOGIC)
2
GND
4
GATE
LTC1647-2
C1
10nF
R2
10Ω
R1
0.01Ω
Q1
IRF7413
CLOAD
+
VCC
1
R3
15k
C3
0.1μF
tRESET
tDELAY
tRAMP
VCC – VSENSE
VGATE
VFAULT
1647-1/2/3 F07
an input supply greater than 10V at VCC1 or VCC2, a 24V
Zener is recommended between the corresponding GATE1
or GATE2 pin and GND as shown in Figures 1 and 4.
The RDS(ON) of the external pass transistor must be low to
make VDS a small percentage of VCC. At VCC = 3.3V, VDS
+ VCB = 0.1V yields 3% error at maximum load current.
This restricts the choice of MOSFETs to very low RDS(ON).
At higher VCC voltages, the RDS(ON) requirement can be
relaxed. MOSFET package dissipation (PD and TJ) may
restrict the value of RDS(ON).
Power Supply Ramping
VOUT is controlled by placing MOSFET Q1 in the power
path (Figure 1). R1 provides load current fault detection
and R2 prevents MOSFET high frequency oscillation. By
ramping the gate of the pass transistor at a controlled
rate (dV/dt = 10μA/C1), the transient surge current
(I = CLOAD•dV/dt = 10μA•CLOAD/C1) drawn from the main
backplane is limited to a safe value when the board is
inserted into the connector.
When power is first applied to VCC, the GATE pin pulls low.
A low-to-high transition at the ON pin initiates GATE ramp-
up. The rising dV/dt of GATE is set by 10μA/C1 (Figure 5),
where C1 is the total external capacitance between
GATE and GND. The ramp-up time for VOUT is equal to
t = (VCC•C1)/10μA.
A high-to-low transition at the ON pin initiates a GATE
ramp-down at a slope of –50μA/C1. This rate is usually
adequate as the supply bypass capacitors take time to
discharge through the load.
If the ON pin is connected to VCC, or is pulled high before
VCC is first applied, GATE is held low until VCC rises above
the undervoltage lockout threshold, VLKO (Figure 6). Once
the threshold is exceeded, GATE ramps at a controlled rate
of 10μA/C1. When the power supply is disconnected, the
body diode of Q1 holds VCC about 700mV below VOUT.
The GATE voltage droops at a rate determined by VCC. If
VCC drops below VLKO – VLKH, the LTC1647 enters UVLO
and GATE pulls down to GND.
Figure 7. Autoretry Sequence
LTC1647-1/
LTC1647-2/LTC1647-3
13
1647fa
Autoretry
The LTC1647-2 and LTC1647-3 are designed to allow an
automatic reset of the electronic circuit breaker after a
fault condition occurs. This is accomplished by pulling
the ON/FAULT (LTC1647-2) pin or the ON and FAULT pins
tied together (LTC1647-3) high through a resistor, R3, as
shown in Figure 7. An autoretry sequence begins if a fault
occurs. If the circuit breaker trips, FAULT pulls the ON
pin low. After a tRESET interval elapses, FAULT resets and
R3 pulls the ON pin up. C3 delays GATE turn-on until the
voltage at the ON pin exceeds VIH. The delay time is
t
DELAY = –R3•C3•ln[1–(VIH – VOL)/(VON – VOL)]
GATE ramps up at 10μA/C1 until Q1 conducts. If VOUT is
still shorted to GND, the cycle repeats. The ramp interval
is about tRAMP = VTH•C1/10μA where VTH is the threshold
voltage of the external MOSFET.
Hot Circuit Insertion
When circuit boards are inserted into a live backplane or
a device bay, the supply bypass capacitors on the board
can draw huge transient currents from the backplane or
the device bay power bus as they charge up. The transient
currents can damage the connector pins and glitch the
system supply, causing other boards in the system to
reset or malfunction.
The LTC1647 is designed to turn two positive supplies on
and off in a controlled manner, allowing boards to be safely
inserted or removed from a live backplane or device bay.
The LTC1647 can be located before or after the connector
as shown in Figure 8. A staggered PCB connector can
sequence pin conections when plugging and unplugging
circuit boards. Alternatively, the control signal can be
generated by processor control.
Ringing
Good engineering practice calls for bypassing the supply
rail of any circuit. Bypass capacitors are often placed at
the supply connection of every active device, in addition
to one or more large value bulk bypass capacitors per
supply rail. If power is connected abruptly, the bypass
APPLICATIONS INFORMATION
capacitors slow the rate of rise of voltage and heavily
damp any parasitic resonance of lead or trace inductance
working against the supply bypass capacitors.
The opposite is true for LTC1647 Hot Swap circuits on a
daughterboard. In most cases, on the powered side of the
MOSFET switch (VCC) there is no supply bypass capacitor
present. An abrupt connection, produced by plugging a
board into a backplane connector, results in a fast rising
edge applied to the VCC line of the LTC1647.
No bulk capacitance is present to slow the rate of rise and
heavily damp the parasitic resonance. Instead, the fast edge
shock excites a resonant circuit formed by a combination
of wiring harness, backplane and circuit board parasitic
inductances and MOSFET capacitance. In theory, the peak
voltage should rise to 2X the input supply, but in practice
the peak can reach 2.5X, owing to the effects of voltage
dependent MOSFET capacitance.
The absolute maximum VCC potential for the LTC1647 is
17V; any circuit with an input of more than 6.8V should be
scrutinized for ringing. A well-bypassed backplane should
not escape suspicion: circuit board trace inductances
of as little as 10nH can produce sufficient ringing to
overvoltage VCC.
Check ringing with a fast storage oscilloscope (such as a
LECROY 9314AL DSO) by attaching coax or a probe to VCC
and GND, then repeatedly inserting the circuit board into
the backplane. Figures 9a and 9b show typical results in a
12V application with different VCC lead lengths. The peak
amplitude reaches 22V, breaking down the ESD protection
diode in the process.
There are two methods for eliminating ringing: clipping
and snubbing. A transient voltage suppressor is an
effec tive means of limiting peak voltage to a safe level.
Figure 10 shows the effect of adding an ON Semiconduc-
tor, 1SMA12CAT3, on the waveform of Figure 9.
Figures 11a and 11b show the effects of snubbing with
different RC networks. The capacitor value is chosen as
10X to 100X the MOSFET COSS under bias and R is selected
for best damping—1Ω to 50Ω depending on the value of
parasitic inductance.
LTC1647-1/
LTC1647-2/LTC1647-3
14
1647fa
Supply Glitching
LTC1647 Hot Swap circuits on the backplane are generally
used to provide power-up/down sequence at insertion/
removal as well as overload/short-circuit protection.
If a short-circuit occurs at supply ramp-up, the circuit
breaker trips. The partially enhanced MOSFET, Q1, is easily
disconnected without any supply glitch.
If a dead short occurs after a supply connection is made
(Figure 12), the sense resistor R1 and the RDS(ON) of fully
enhanced Q1 provide a low impedance path for nearly
unlimited current flow. The LTC1647 discharges the GATE
pin in a few microseconds, but during this discharge time
current on the order of 150 amperes flows from the VCC
power supply. This current spike glitches the power sup-
ply, causing VCC to dip (Figure 12a and 12b).
On recovery from overload, some supplies may overshoot.
Other devices attached to this supply may reset or
malfunction and the overshoot may also damage some
components. An inductor (1μH to 10μH) in series with
Q1’s source limits the short-circuit di/dt, thereby limiting
the peak current and the supply glitch (Figure 12a and
12b). Additional power supply bypass capacitance also
reduces the magnitude of the VCC glitch.
APPLICATIONS INFORMATION
VID Power Controller
The two Hot Swap channels of the LTC1647 are ideally
suited for VID power control in portable computers.
Figure 13 shows an application using the LTC1647-2 on the
system side of the device bay interface (1394 PHY and/or
USB). The controller detects the presence of a peripheral
in each device bay and controls the LTC1647-2. The timing
waveform illustrates the following sequence of events: t1,
rising out of undervoltage lockout with GATE 1 ramping up;
t2, load current fault at R1; t3, circuit breaker resets with
R5/C3 delay; t4/t5, controller gates off/on device supply
with RC delay; t6, device enters undervoltage lockout.
If C6 is not connected in Figure 13, FAULT2 and ON2 will
have similar waveforms. t7 initiates an ON sequence; t8, a
load fault is detected at R7 with FAULT2 pulling low. If the
controller wants to stretch the interval between retries, it
can pull ON2 low at t9 ( t9 – t8 < 0.4•tRESET). At t10/t11,
the controller initiates a new power-up/down sequence.
LTC1647-1/
LTC1647-2/LTC1647-3
15
1647fa
APPLICATIONS INFORMATION
SENSE
15 13
FAULT
VCC VOUT
FAULT
ON
3ON
2
GND
8
GATE
LTC1647-3
C1
BACKPLANE
CONNECTOR
STAGGERED PCB
EDGE CONNECTOR
R2
R1 Q1
CLOAD
+
VCC
1
R3
R5R4
Q2
8a. HOT SWAP CONTROLLER ON MOTHERBOARD
SENSE
15 13
FAULT
VCC VOUT
FAULT
3ON
2
GND
8
GATE
LTC1647-3
C1
1647-1/2/3 F08
R2
R1 Q1
CLOAD
+
VCC
1
R3
BACKPLANE
CONNECTOR
STAGGERED PCB
EDGE CONNECTOR
8b. HOT SWAP CONTROLLER ON DAUGHTERBOARD
R4
Figure 8. Staggered Pins Connection
LTC1647-1/
LTC1647-2/LTC1647-3
16
1647fa
APPLICATIONS INFORMATION
VOUT
C1
10nF
*D1
DDZ23
* REQUIRED FOR VCC >10V
1647-1/2/3 F09
R2
10Ω
R1
0.01Ω
12V
Q1
IRF7413
CLOAD
+
+
–
LTC1647
POWER
LEADS
SCOPE
PROBE
8'
1μs/DIV 1647-1/2/3 F09a
4V/DIV
0V
24V
1μs/DIV
4V/DIV
1647-1/2/3 F09b
0V
24V
9a. Undamped VCC Waveform (48” Leads) 9b. Undamped VCC Waveform (8” Leads)
Figure 9. Ring Experiment
LTC1647-1/
LTC1647-2/LTC1647-3
17
1647fa
APPLICATIONS INFORMATION
VOUT
C1
10nF
*D2
DDZ23
1647-1/2/3 F10
R2
10Ω
D1*
ON SEMICONDUCTOR
* 1SMA12CAT3, REQUIRED FOR VCC > 10V
R1
0.01Ω
12V
Q1
IRF7413
CLOAD
+
+
–
LTC1647
POWER
LEADS
BACKPLANE CONNECTOR
PCB EDGE CONNECTOR
1μs/DIV 1647-1/2/3 F10a
2V/DIV
0V
12V
VCC Waveform Clamped
by a Transient Suppressor
Figure 10. Transient Suppressor Clamp
VOUT
C1
10nF
*D1
DDZ232
*REQUIRED FOR VCC > 10V
1647-1/2/3 F11
R2
10Ω
R1
0.01Ω
12V
Q1
IRF7413
CLOAD
+
+
–
LTC1647
POWER
LEADS
BACKPLANE CONNECTOR
PCB EDGE CONNECTOR
R3
10Ω
C1
0.1μF
1μs/DIV 1647-1/2/3 F11a
2V/DIV
0V
12V
1μs/DIV 1647-1/2/3 F11b
2V/DIV
0V
12V
11a. VCC Waveform Damped by a Snubber (15Ω, 6.8nF) 11b. VCC Waveform Damped by a Snubber (10Ω, 0.1μF)
Figure 11. Snubber “Fixes”
LTC1647-1/
LTC1647-2/LTC1647-3
18
1647fa
APPLICATIONS INFORMATION
C1
10nF
*D1
DDZ23
*REQUIRED FOR VCC > 10V 1647-1/2/3 F12
R2
10Ω
R1
0.01Ω
12V
Q1
IRF7413
L1
2μH
+
–
LTC1647
SUPPLY
GLITCH
BACKPLANE CONNECTOR
BOARD WITH POSSIBLE
SHORT-CIRCUIT FAULT
C2
100μF
+
5μs/DIV
GATE OF MOSFET
5V/DIV
VCC
5V/DIV
VCC SHORT-CIRCUIT
SUPPLY CURRENT
50A/DIV
1647-1/2/3 F12a 5μs/DIV 1647-1/2/3 F12b
VCC SHORT-CIRCUIT
SUPPLY CURRENT
10A/DIV
VCC
5V/DIV
GATE OF MOSFET
5V/DIV
12a. VCC Short-Circuit Supply Current Glitch without Any Limiting 12b. VCC Supply Glitch with 2μH Series Inductor
Figure 12. Supply Glitch
LTC1647-1/
LTC1647-2/LTC1647-3
19
1647fa
APPLICATIONS INFORMATION
VCC
SENSE1
1
86
ON1/FAULT1
C4
10nF
2
ON2/FAULT2
3.3V VID
SUPPLY
3
GND
4
GATE1
SENSE2
75
GATE2
LTC1647-2
CONNECTOR #1
1394 PHY
AND/OR
USB PORT
DEVICE #1
C1
10nF
R2
10Ω
R1
0.1Ω
Q1
1/2 MMDF3N02HD
R7
0.1Ω
Q2
1/2 MMDF3N02HD
R5
10Ω
R3** R4**CLOAD*
* CLOAD IS USER-SELECTED BASED
ON THE DEVICE REQUIREMENTS
** R3, R4, R7 AND R8 ARE OPTIONAL DISCHARGE
RESISTORS WHEN DEVICES ARE POWERED-OFF
Q1, Q2: ON SEMICONDUCTOR
R8
10Ω
+
CONNECTOR #2
1394 PHY
AND/OR
USB PORT
DEVICE #2
R9** R10**CLOAD*
+
C3
0.1μF
R6
10Ω
C6
0.1μF
ON1
FAULT1
ON2
FAULT2
DEVICE BAY
CONTROLLER
WITH 1394 PHY
AND/OR USB
VID
VON1
VR1
VGATE1
VFAULT1
VON2
VR7
VGATE2
VFAULT2
VLKO
VIH VIH
VLKO – VLKH
VIL
FAULT 1 WAVEFORM SHOWN WITH C3
FAULT 2 WAVEFORM SHOWN WITHOUT C6
t4 t5
t1
t7
t8
1647-1/2/3 F13
t2
t9 t10 t11
t3 t6
Figure 13. VID Power Controller with Fault Status and Retry Sequence
LTC1647-1/
LTC1647-2/LTC1647-3
20
1647fa
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
GN16 (SSOP) 0204
12
345678
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ± .004
(0.38 ± 0.10) s 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 BSC.0165 ±.0015
.045 ±.005
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LTC1647-1/
LTC1647-2/LTC1647-3
21
1647fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 10/10 Replaced Typical Application circuit
Updated Order Information section
Revised GATE1 description in Pin Functions section
Revised Figures 1, 4, 6, 7, 8, 9, 10, 11 and 12 in Applications Information section
Updated references to Figure 12a and 12b in Applications Information section
Revised Figure 14 in Typical Applications and updated Related Parts list
1
2
8
11, 12, 15, to 18
14
20
LTC1647-1/
LTC1647-2/LTC1647-3
22
1647fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
” LINEAR TECHNOLOGY CORPORATION 1999
LT 1010 REV A • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
LTC1421 2-Channel Hot Swap Controller 24-Pin, Operates from 3V to 12V and Supports –12V
LTC1422 Hot Swap Controller in SO-8 System Reset Output with Programmable Delay
LT1640AL/LT1640AH Negative Voltage Hot Swap Controller in SO-8 Operates from –10V to –80V
LT1641 High Voltage Hot Swap Controller in SO-8 Operates from 9V to 80V
LT1642 Fault Protected Hot Swap Controller Operates Up to 16.5V, Protected to 33V
LTC1643L/LTC1643H PCI-Bus Hot Swap Controller 3.3V, 5V and ±12V in Narrow 16-Pin SSOP
LT1645 2-Channel Hot Swap Controller Operates from 1.2V to 12V, Power Sequencing
Hot Swapping Two Supplies
Two separate supplies can be independently controlled by
using the LTC1647-3. In some applications, sequencing
between the two power supplies is a requirement. For
example, it may be necessary to ramp-up one supply first
before allowing the second supply to power-up, as well
as requiring that this same supply ramp-down last on
power-down. Figure 14’s circuit illustrates how to program
the delays between the two pass transistors using the
ON1 and ON2 pins (time events t1 to t4). t5 and t7 show
both channels being switched on simultaneously where
sequencing is not crucial.
Some applications require that both channels be gated
off if a fault occurs in one channel. This is accomplished
in Figure 14 by using a crisscross FAULT-to-SENSE
arrangement of R3/R4 and R7/R8. t6 and t9 illustrate the
circuit’s operation.
SENSE1
15 13
FAULT2
5V SUPPLY VOUT1
(5A)
FAULT
GND
ON2
ON1
5ON2
4FAULT1
3ON1
2
GND
8
GATE1
LTC1647-3
C1
10nF
R2
10Ω
R1
0.01Ω
Q1
IRF7413
R3
100Ω
CLOAD
+
VCC1
SENSE2 GATE2VCC2
1
14 1216
R8
100Ω
12V SUPPLY VOUT2
(2.5A)
CLOAD
+
R5
10k
R6
10k
R4
4.7k
R7
12k
C3
10nF
*D1
DDZ23
*REQUIRED FOR VCC > 10V
Q2
IRF7413
R9
10Ω
R10
0.02Ω
CONNECTOR
VR1
VR10
VON1
VON2
VOUT1
VOUT2
t6
t9
1647-1/2/3 F14
t3t2
t1 t4 t5 t7 t8
Figure 14. Hot Swapping Two Supplies
