TFBS4652
www.vishay.com Vishay Semiconductors
Rev. 1.9, 29-Apr-2019 5Document Number: 84671
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RECOMMENDED CIRCUIT DIAGRAM
Operated at a clean low impedance power supply the
TFBS4652 needs only one additional external component
when the IRED drive current should be minimized for
minimum current consumption according the low power
IrDA standard. When combined operation in IrDA and
remote control is intended no current limiting resistor is
recommended. When long wires are used for bench tests,
the capacitors are mandatory for testing rise/fall time
correctly.
Fig. 1 - Recommended Application Circuit
The capacitor C1 is buffering the supply voltage VCC2 and
eliminates the inductance of the power supply line. This one
should be a small ceramic version or other fast capacitor to
guarantee the fast rise time of the IRED current. The resistor
R1 is necessary for controlling the IRED drive current when
the internally controlled current is too high for the
application.
Vishay transceivers integrate a sensitive receiver and a
built-in power driver. The combination of both needs a
careful circuit board layout. The use of thin, long, resistive
and inductive wiring should be avoided. The inputs (TXD,
SD) and the output RXD should be directly (DC) coupled to
the I/O circuit.
The capacitor C2 combined with the resistor R2 is the low
pass filter for smoothing the supply voltage.
As already stated above R2, C1 and C2 are optional and
depend on the quality of the supply voltages VCCx and
injected noise. An unstable power supply with dropping
voltage during transmission may reduce the sensitivity (and
transmission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to the
transceiver power supply pins.
When connecting the described circuit to the power supply,
low impedance wiring should be used.
In case of extended wiring the inductance of the power
supply can cause dynamically a voltage drop at VCC2. Often
some power supplies are not apply to follow the fast current
is rise time. In that case another 10 μF cap at VCC2 will be
helpful.
Keep in mind that basic RF-design rules for circuit design
should be taken into account. Especially longer signal lines
should not be used without termination. See e.g. “The Art of
Electronics” Paul Horowitz, Wienfield Hill, 1989, Cambridge
University Press, ISBN: 0521370957.
TRUTH TABLE
INPUTS OUTPUTS
SD TXD OPTICAL INPUT IRRADIANCE mW/m2RXD TRANSMITTER
High x x Tri-state floating with a weak
pull-up to the supply voltage 0
Low High x Low (echo on) Ie
Low High > 100 μs x High 0
Low Low < 2 High 0
Low Low > min. irradiance Ee
< max. irradiance EeLow (active) 0
Low Low > max. irradiance Eex0
IRED Anode
Ground
VCC2
VCC1
GND
SD
TXD
RXD
SD
TXD
RXD
R1
R2
C1 C2
Vlogic
Vlogic
19289
VCC
RECOMMENDED APPLICATION CIRCUIT
COMPONENTS
COMPONENT RECOMMENDED VALUE
C1, C2 0.1 μF, ceramic Vishay part#
VJ 1206 Y 104 J XXMT
R1 See table below
R2 47 Ω, 0.125 W (VCC1 = 3 V)
RECOMMENDED RESISTOR R1 (Ω)
VCC2
(V)
MINIMIZED CURRENT CONSUMPTION,
IrDA LOW POWER COMPLIANT
2.7 24
330
3.3 36