The CS52843 provides all the nec-
essary features to implement off-
line fixed frequency current-mode
control with a minimum number
of external components.
The CS52843 incorporates a new
precision temperature-controlled
oscillator to minimize variations in
frequency. An undervoltage lock-
out ensures that VREF is stabilized
before the output stage is enabled.
In the CS52843 turn on is at 8.4V
and turn off at 7.6V.
Other features include low start-up
current, pulse-by-pulse current lim-
iting, and a high-current totem pole
output for driving capacitive loads,
such as gate of a power MOSFET.
The output is low in the off state,
consistent with N-channel devices.
1
Features
VCC
Gnd
COMP
OSC
Sense
VREF
OUTPUT
ENABLE
Internal
Bias
NOR
S
R
PWM
Latch
Current
Sensing
Comparator
R
2 R
1V
Error
Amplifier
-
+
2.50V
Set/
Reset
VCC Undervoltage Lock-out
34V
8.4V/7.6V
R
R
VFB
VCC Pwr
VOUT
Pwr Gnd
Oscillator
5.0 Volt
Reference
■Optimized for Off-line
Control
■Internally Temperature
Compensated Oscillator
■VREF Stabilized before
Output Stage is Enabled
■Very Low Start-up Current
300 µA (typ)
■Pulse-by-pulse Current
Limiting
■Improved Undervoltage
Lockout
■Double Pulse Suppression
■2% 5 Volt Reference
■High Current Totem Pole
Output
Package Options
CS52843
Current Mode PWM Control Circuit
CS52843
Description
Block Diagram
Absolute Maximum Ratings
Supply Voltage (ICC<30mA) ..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current ...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5µJ
Analog Inputs (VFB, VSENSE)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Reflow (SMD styles only)...........60 sec. max above 183°C, 230°C peak
1
7
8
2
3
45
6
COMP
VFB
Sense
OSC
VREF
VCC
VOUT
Gnd
8L SO Narrow
A Company
®
10
7
14
13
12
8
1
2
3
4
5
6
11
9
COMP
NC
VFB
NC
Sense
NC
OSC
VREF
NC
VCC
VCC Pwr
VOUT
Pwr Gnd
Gnd
14L SO Narrow
Rev. 12/23/97
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
2
Electrical Characteristics: -40 ≤TA ≤85˚C; VCC = 15V (Note 1); RT = 680Ω; CT = .022µF for triangle mode,
RT = 10kΩ; CT = 3.3nF sawtooth mode unless otherwise stated.
CS52843
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
■Reference Section
Output Voltage TJ = 25˚C, IREF = 1mA 4.90 5.00 5.10 V
Line Regulation 12 ≤VCC ≤25V 6 20 mV
Load Regulation 1 ≤IRE F≤20mA 6 25 mV
Temperature Stability (Note 1) 0.2 0.4 mV/˚C
Total Output Variation Line, Load, Temp. (Note 1) 4.82 5.18 V
Output Noise Voltage 10Hz ≤f ≤10kHz, TJ = 25˚C (Note 1) 50 µV
Long Term Stability TA = 125˚C, 1000 Hrs. (Note 1) 5 25 mV
Output Short Circuit TA = 25˚C -30 -100 -180 mA
■Oscillator Section
Initial Accuracy Sawtooth Mode, TJ = 25˚C (Note 1) 47 52 57 kHz
Triangle Mode, TJ = 25˚C 44 52 60 kHz
Voltage Stability 12 ≤VCC ≤25V 0.2 1.0 %
Temperature Stability Sawtooth Mode TMIN ≤TA ≤TMAX 5%
Triangle Mode TMIN ≤TA ≤TMAX (Note 1) 8 %
Amplitude VOSC (peak to peak) 1.7 V
Discharge Current TJ = 25˚C 7.3 8.3 9.3 mA
TMIN ≤TA ≤TMAX 6.8 9.8 mA
■Error Amp Section
Input Voltage VCOMP = 2.5V 2.42 2.50 2.58 V
Input Bias Current VFB = 0V -0.3 -2.0 µA
AVOL 2 ≤VOUT ≤4V 65 90 dB
Unity Gain Bandwidth (Note 1) 0.7 1.0 MHz
PSRR 12 ≤VCC ≤25V 60 70 dB
Output Sink Current VFB = 2.7V, VCOMP = 1.1V 2 6 mA
Output Source Current VFB = 2.3V, VCOMP = 5V -0.5 -0.8 mA
VOUT HIGH VFB = 2.3V, RL = 15kΩto Gnd 5 6 V
VOUT LOW VFB = 2.7V, RL = 15kΩto VREF 0.7 1.1 V
■Current Sense Section
Gain (Notes 2 & 3) 2.85 3.00 3.15 V/V
Maximum Input Signal VCOMP = 5V (Note 2) 0.9 1.0 1.1 V
PSRR 12 ≤VCC ≤25V (Note 2) 70 dB
Input Bias Current VSense=0V -2 -10 µA
Delay to Output TJ=25˚C (Note 1) 150 300 ns
■Output Section
Output Low Level ISINK = 20mA 0.1 0.4 V
ISINK = 200mA 1.5 2.2 V
Output High Level ISOURCE = 20mA 13.0 13.5 V
ISOURCE = 200mA 12.0 13.5 V
3
CS52843
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
8L 14L
SO Narrow SO Narrow
1 1 COMP Error amp output, used to compensate error amplifier.
23 V
FB Error amp inverting input.
3 5 Sense Noninverting input to Current Sense Comparator.
4 7 OSC Oscillator timing network with Capacitor to Ground, resistor to VREF.
5 8 Gnd Ground.
5 9 Pwr Gnd Output driver Ground.
610V
OUT Output drive pin.
711V
CCPwr Output driver positive supply.
712V
CC Positive power supply.
814V
REF Output of 5V internal reference.
2,4,6,13 NC No Connection.
Electrical Characteristics: -40 ≤TA ≤85˚C; VCC = 15V (Note 1); RT = 680Ω; CT = .022µF for triangle mode,
RT = 10kΩ; CT = 3.3nF sawtooth mode unless otherwise stated.
Rise Time TJ = 25˚C, CL = 1nF (Note 1) 50 150 ns
Fall Time TJ=25˚C, CL=1nF (Note 1) 50 150 ns
Output Leakage UVLO Active VOUT = 0 -.01 -10.0 µA
■Total Standby Current
Start-Up Current 300 500 µA
Operating Supply Current VFB=VSense=0V RT=10kΩ, CT=3.3nF 11 17 mA
VCC Zener Voltage ICC=25mA 34 V
■Undervoltage Lockout Section
Start Threshold 7.8 8.4 9.0 V
Min. Operating Voltage After Turn On 7.0 7.6 8.2 V
Notes: 1.These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with VFB=0.
3. Gain defined as: A = ; 0 ≤VSense ≤0.8V.
∆VCOMP
∆VSense
Figure 1: Startup voltage for the CS52843.
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to sink minor amounts of current. The output
should be shunted to ground with a resistor to prevent
activating the power switch with extraneous leakage cur-
rents.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in VCC causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
VCC
VON =8.4V
VOFF = 7.6V
ON/OFF Command
to reset of IC
<15mA
<500µAVON VOFF
ICC
VCC
4
CS52843
Test Circuit Open Loop Laboratory Test Fixture
VREF
VCC
VOUT
1kΩ
1W
0.1µF
0.1µF
VREF
VCC
VOUT
Gnd
VFB
Sense
OSC
COMP
5kΩ
100kΩ
4.7kΩ
1kΩ
Error Amp
Adjust
4.7kΩSense
Adjust
RT
2N2222
CT
Gnd
A
Typical Performance Characteristics
100 200 700 1k 2k 5k 7k 10k
80
90
DUTY CYCLE (%)
RT (Ω)
70
60
50
40
30
20
10
4k3k500400300
100
.0005 .001 .002 .003 .005 .01 .02 .03 .04
800
900
FREQ. (kHz)
CT (µF)
700
600
500
400
300
200
100
.05
RT =1.5kΩ
RT =680Ω
RT =10kΩ
Oscillator Frequency vs CTOscillator Duty Cycle vs RT
Circuit Description
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing the
duty cycle to momentarily increase. Since the duty cycle
tends to exceed the maximum allowed to prevent trans-
former saturation in some power supplies, the internal
oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of oscillator timing
components.
Figure 2: Timing Diagram
Figure 3: Oscillator Timing Network and Parameters
Setting the Oscillator
The times Tcand Tdcan be determined as follows:
tc= RTCTln
td= RTCTln
Substituting in typical values for the parameters in the
above formulas:
VREF = 5.0V, VUPPER = 2.7V, VLOWER = 1.0V, Id= 8.3mA,
then
tc≈0.5534RTCT
td= RTCTln
For better accuracy RTshould be ≥10kΩ.
Grounding
High peak currents associated with capacitive loads neces-
sitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd in a single
point ground.
The transistor and 5kΩpotentiometer are used to sample
the oscillator waveform and apply an adjustable ramp to
Sense.
)
2.3 - 0.0083 RT
4.0 - 0.0083 RT
(
)
VREF - IdRT- VLOWER
VREF - IdRT- VUPPER
(
)
VREF - VLOWER
VREF - VUPPER
(
VCC
IO
VO
Switch
Current
EA Output
Toggle
F/F Output
OSC
RESET
VOSC
5
CS52843
Circuit Description
VREF
OSC
Gnd
RT
CT
Vupper
Vlower tctd
VOSC
Internal Clock
LARGE RT (≈10kΩ)
VREF
Internal Clock
SMALL RT (≈700kΩ)
Triangular Mode
Sawtooth Mode
6
Part Number Description
CS52843ED8 8L SO Narrow
CS52843EDR8 8L SO Narrow (tape & reel)
CS52843ED14 14L SO Narrow
CS52843EDR14 14L SO Narrow (tape & reel)
Rev. 12/23/97
CS52843
D
Lead Count Metric English
Max Min Max Min
8L SO Narrow 5.00 4.80 .197 .189
14L SO Narrow 8.75 8.55 .344 .337
Thermal Data 8L SO Narrow 14L SO Narrow
RΘJC typ 45 30 ˚C/W
RΘJA typ 165 125 ˚C/W
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
Ordering Information
© 1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Surface Mount Narrow Body (D); 150 mil wide
1.27 (.050) BSC
0.51 (.020)
0.33 (.013)
6.20 (.244)
5.80 (.228)
4.00 (.157)
3.80 (.150)
1.57 (.062)
1.37 (.054)
D
0.25 (0.10)
0.10 (.004)
1.75 (.069) MAX
1.27 (.050)
0.40 (.016)
REF: JEDEC MS-012
0.25 (.010)
0.19 (.008)
