Description
The A6261 is a linear, programmable current regulator providing
up to 100 mA from each of four outputs to drive arrays of high
brightness LEDs. The regulated LED current from each output,
accurate to 5%, is set by a single reference resistor. Current
matching in each string is better than 10% without the use of
ballast resistors. Driving LEDs with constant current ensures
safe operation with maximum possible light output.
Output control is provided by an enable input, giving direct
control for PWM applications. Outputs can be connected in
parallel or left unused as required.
Short detection is provided to protect the LEDs and the A6261
during a short-to-ground at any LED output pin. An open LED
in any of the strings disables all outputs, but can be overridden.
Shorted LED output pins or open LEDs are indicated by a
fault flag.
A temperature monitor is included to reduce the LED drive
current if the chip temperature exceeds a thermal threshold.
The device packages are a 10-pin MSOP (LY) and a 16-pin
TSSOP (LP), both with exposed pad for enhanced thermal
dissipation. They are lead (Pb) free, with 100% matte tin
leadframe plating.
A6261A-DS, Rev. 6
Features and Benefits
Total LED drive current up to 400 mA
Current shared equally up to 100 mA by up to 4 strings
6 to 50 V supply
Low dropout voltage
LED output short-to-ground and thermal protection
Disable on open LED detection option
Enable input for PWM control
Current slew rate limit during PWM
Current set by reference resistor
Automotive K-temperature range (–40°C to 150°C)
Packages
Typical Application Diagram
A6261
Protected LED Array Driver
A6261
+
–
LA1
VIN
PWM dimming input
Power input
GND
LA2
LA3
LA4
EN
FF
IREF
THTH
Not to scale
10-pin MSOP with
exposed thermal pad
(suffix LY)
16-pin TSSOP with
exposed thermal pad
(suffix LP)
Protected LED Array Driver
A6261
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings1
Characteristic Symbol Notes Rating Unit
Load Supply Voltage VIN –0.3 to 50 V
Pin EN –0.3 to 50 V
Pins LA[1:4] –0.3 to 50 V
Pin FF –0.3 to 50 V
Pins IREF, THTH –0.3 to 6.5 V
Ambient Operating Temperature
Range2TA
E temperature range –40 to 85 °C
K temperature range –40 to 125 °C
Maximum Continuous Junction
Temperature TJ(max) 150 °C
Transient Junction Temperature TtJ
Over temperature event not exceeding 10 s, lifetime duration
not exceeding 10 h, guaranteed by design characterization 175 °C
Storage Temperature Range Tstg –55 to 150 °C
1With respect to GND.
2Limited by power dissipation.
Selection Guide
Part Number Ambient Operating
Temperature, TA (°C) Packing Package
A6261ELPTR-T –40 to 85 4000 pieces per 13-in. reel 16-pin TSSOP with exposed thermal pad,
4.4 × 5 mm case
A6261KLPTR-T –40 to 125 4000 pieces per 13-in. reel
A6261KLYTR-T –40 to 125 4000 pieces per 13-in. reel 10-pin MSOP with exposed thermal pad,
3 × 3 mm case
Thermal Characteristics*may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance
(Junction to Ambient) RJA
LP package
On 4-layer PCB based on JEDEC standard 34 ºC/W
On 2-layer PCB with 3.8 in.2 of copper area each side 43 ºC/W
LY package
On 4-layer PCB based on JEDEC standard 48 ºC/W
On 2-layer PCB with 2.5 in.2 of copper area each side 48 ºC/W
Package Thermal Resistance
(Junction to Pad) RJP 2 ºC/W
*To be verified by characterization. Additional thermal information available on the Allegro® website.
Protected LED Array Driver
A6261
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Pin-out Diagrams
LP Package
LY Package
LA1
VIN
+V
Current
Regulators
GND
PAD
Fault
Control
Tem p
Comp
Tem p
Monitor
Slew
Limit
Current
Reference
Control
Logic
LA2
LA3
LA4
EN
FF
IREF
RREF
RTH
THTH
Functional Block Diagram
THTH
IREF
GND
LA1
LA2
FF
EN
VIN
LA4
LA3
1
2
3
4
5
10
9
8
7
6
PAD
NC
NC
THTH
IREF
GND
LA1
LA2
NC
NC
NC
FF
EN
VIN
LA4
LA3
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PAD
Terminal List Table
Name
Number
FunctionLP LY
EN 13 9 Enable
FF 14 10 Fault output
GND 5 3 Ground reference
IREF 4 2 Current reference
LA1 6 4 LED anode (+) connection 1
LA2 7 5 LED anode (+) connection 2
LA3 10 6 LED anode (+) connection 3
LA4 11 7 LED anode (+) connection 4
NC 1,2,8,
9,15,16 – No connection; connect to GND
PAD – – Exposed thermal pad
THTH 3 1 Thermal threshold
VIN 12 8 Supply
Protected LED Array Driver
A6261
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Supply and Reference
VIN Functional Operating Range26 – 50 V
VIN Quiescent Current IINQ LA[1:4] connected to VIN – – 10 mA
VIN Sleep Current IINS EN = GND, VIN = 16 V – – 10 A
Startup Time tON VIN > 7 V to ILA1 < –5 mA, RREF = 125 52030 s
Current Regulation
Reference Voltage VIREF 0.7 mA < IREF < 8.8 mA 1.15 1.2 1.25 V
Reference Current Ratio GHILAx / IREF – 12.5 – –
Current Accuracy3EILAx –10 mA > ILAx > –100 mA –5 ±4 5 %
Current Matching4EIMLAx
–20 mA > ILAx > –100 mA, VLAx match to
within 1 V – 5 10 %
Output Current ILAx
EN = high – GH ×
IREF
––
IREF = 8 mA, EN = high –105 –100 –95 mA
Maximum Output Current ILAxmax IREF = 9.2 mA, EN = high – – –110 mA
Minimum Drop-out Voltage VDO
VIN – VLAx , ILAx = –100 mA – – 800 mV
VIN – VLAx , ILAx = –40 mA – – 660 mV
Output Disable Threshold VODIS VIN – VLAx 65 – 160 mV
Current Slew Time Current rising or falling between 10% and 90% 50 80 110 s
Logic Inputs FF and EN
Input Low Voltage VIL – – 0.8 V
Input High Voltage VIH 2–– V
Input Hysteresis (EN pin) VIhys 150 350 – mV
Pull-Down Resistor (EN pin) RPD –50– k
Output Low Voltage (FF pin) VOL IOL = 1 mA – – 0.4 V
Protection
Short Detect Voltage VSCD Measured at LAx 1.2 – 1.8 V
Short Circuit Source Current ISCS Short present LAx to GND –2 –0.8 –0.5 mA
Short Release Voltage VSCR Measured at LAx – – 1.9 V
Short Release Voltage Hysteresis VSChys VSCR – VSCD 200 – 500 mV
Open Load Detect Voltage VOCD VIN – VLAx 170 – 450 mV
Open Load Detect Delay tOCD –2–ms
Thermal Monitor Activation Temperature TJM TJ with ISEN = 90% 95 115 130 °C
Thermal Monitor Slope dISEN/dTJISEN = 50% –3.5 –2.5 –1.5 %/°C
Thermal Monitor Low Current
Temperature TJL TJ at ISEN = 25% 120 135 150 °C
Overtemperature Shutdown TJF Temperature increasing – 170 – °C
Overtemperature Hysteresis TJhys Recovery = TJF – TJhys –15– °C
1For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2Function is correct but parameters are not guaranteed outside the general limits (7 to 40 V).
3When EN = high, EILAx = 100 × [( | ILAx | × RREF / 15 ) –1], with ILAx in mA and RREF in k.
4EIMLA = 100 × max ( | ILAx– ILA(AV) | ) / ILA(AV) , where ILA(AV) is the average current of all active outputs.
ELECTRICAL CHARACTERISTICS1 Valid at TJ= –40°C to 150°C, VIN = 7 to 40 V, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Protected LED Array Driver
A6261
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Functional Description
The A6261 is a linear current regulator that is designed to provide
drive current and protection for parallel strings of series-con-
nected high brightness LEDs. It provides up to four matched pro-
grammable current outputs, at up to 100 mA, with low minimum
dropout voltages below the main supply voltage. For 12 V power
net applications optimum performance is achieved when driving
4 strings of 1 to 3 LEDs, at currents up to 100 mA per string.
The A6261 is specifically designed for use in applications where
the LED current is controlled by a single logic input or a high-
side switched supply. In addition the A6261 disables all LEDs on
detecting a single open LED.
Current regulation is maintained and the LEDs protected during a
short-to-ground at any point in the LED string. A short-to-ground
on any regulator output terminal will disable that output and set
the fault flag. An open load on any output will set the fault flag
and disable all outputs. Remaining outputs can be re-enabled
by pulling the fault flag output low. Individual outputs can be
disabled by connecting the output to VIN.
Integrated thermal management reduces the regulated current
level at high internal junction temperatures to limit power dis-
sipation.
Pin Functions
VIN Supply to the control circuit and current regulators. A small
value ceramic bypass capacitor, typically 100 nF, should be con-
nected from close to this pin to the GND pin.
GND Ground reference connection. Should be connected directly
to the negative supply.
EN Logic input to enable LED current output. This provides a
direct on/off action and can be used for direct PWM control.
IREF 1.2 V reference to set current reference. Connect resistor,
RREF, to GND to set reference current.
THTH Sets the thermal monitor threshold, TJM
, where the output
current starts to reduce with increasing temperature. Connecting
THTH directly to GND will disable the thermal monitor function.
LA[1:4] Current source connected to the anode of the first
LED in each string. Connect directly to VIN to disable the
respective output. In this document “LAx” indicates any one of
the four outputs.
FF Open drain fault flag, used with an external pull-up resistor,
to indicate open, short, or overtemperature conditions. FF is inac-
tive when a fault is present. During an open load condition, FF
can be pulled low to force the remaining outputs on.
LED Current Level
The LED current is controlled by four matching linear current
regulators between the VIN pin and each of the LAx outputs. The
basic equation that determines the nominal output current at each
LAx pin is:
Given EN = high,
ILAx =RREF
15
(1)
where ILAx is in mA and RREF is in k.
The output current may be reduced from the set level by the ther-
mal monitor circuit.
Conversely the reference resistors may be calculated from:
ILAx
=
RREF
15
(2)
where ILAx is in mA and RREF is in k.
For example, where the required current is 90 mA the resistor
value will be :
90
==
RREF 167
15
These equations completely define the output currents with
respect to the setting resistors. However, for further reference, a
more detailed description of the internal reference current calcu-
lations is included below.
It is important to note that because the A6261 is a linear regu-
lator, the maximum regulated current is limited by the power
dissipation and the thermal management in the application. All
current calculations assume adequate heatsinking for the dissi-
pated power. Thermal management is at least as important as the
electrical design in all applications. In high current high ambient
temperature applications the thermal management is the most
important aspect of the systems design. The application section
below provides further detail on thermal management and the
associated limitations.
Protected LED Array Driver
A6261
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Operation with Fewer LED Strings or Higher Currents
The A6261 may be configured to use fewer than four LED
strings, either by connecting outputs together for higher cur-
rents, or by connecting the output directly to VIN to disable the
regulator for that output. When a regulator is disabled it will
not indicate an open load and will not affect the fault flag or the
operation of the remaining regulator outputs.
Sleep Mode
When EN is held low the A6261 will be in shutdown mode and
all sections will be in a low power sleep mode. The input current
will be typically less than 10 A. This means that the complete
circuit, including LEDs, may remain connected to the power sup-
ply under all conditions.
Safety Features
The circuit includes several features to ensure safe operation and
to protect the LEDs and the A6261:
• The current regulators between VIN and each LAx output pro-
vide a natural current limit due to the regulation.
• Each LAx output includes a short-to-ground detector that will
disable the output to limit the dissipation.
• An open circuit on any output will disable all outputs.
• The thermal monitor reduces the regulated current as the tem-
perature rises.
• Thermal shutdown completely disables the outputs under ex-
treme overtemperature conditions.
Short Circuit Detection A short-to-ground on any LED
cathode (figure 1A) will not result in a short fault condition. The
current through the remaining LEDs will remain in regulation and
the LEDs will be protected. Due to the difference in the voltage
drop across the LEDs, as a result of the short the current match-
ing in the A6261 may exceed the specified limits.
Any LAx output that is pulled below the short detect voltage
(figure 1B) will disable the regulator on that output and allow
the fault flag, FF, to go high. A small current will be sourced
from the disabled output to monitor the short and detect when
it is removed. When the voltage at LAx rises above the short
detect voltage the fault flag will be removed and the regulator
re-enabled.
A shorted LED (figure 1C) will not result in a short fault condi-
tion. The current through the remaining LEDs will remain in
regulation and the LEDs will be protected. Due to the difference
in the voltage drop across the LEDs, as a result of the short, the
current matching in the A6261 may exceed the specified limits.
A short between LEDs in different strings (figure 1D) will not
result in a short fault condition. The current through the remain-
A6261
LA1
VIN
GND
LA2
LA3
LA4
A6261
LA1
VIN
GND
LA2
LA3
LA4
A6261
LA1
VIN
GND
LA2
LA3
LA4
A6261
LA1
VIN
GND
LA2
LA3
LA4
A. Any LED cathode short-to-ground.
Current remains regulated in
non-shorted LEDs. Matching may be
affected. FF is low.
B. Any LAx output short-to-ground.
Shorted output is disabled. Other
outputs remain active. FF is high.
C. Shorted LEDs.
Current remains regulated.
Matching may be affected.
Only the shorted LED is inactive.
FF is low.
D. Short between LEDs in different
strings. Current remains regulated.
Current is summed and shared by
affected strings. Intensity match
dependent on voltage binning.
FF is low.
Figure 1. Short circuit conditions.
Protected LED Array Driver
A6261
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ing LEDs will remain in regulation and the LEDs will be pro-
tected. The current will be summed and shared by the affected
strings. Current matching in the strings will then depend on the
LED forward voltage differences.
Open Load Detection An open load condition is detected
when the voltage across the regulator, VIN – VLAx , is less than
the open load detect voltage, VOCD , but greater than the output
disable threshold voltage, VODIS
. When this condition is present
for more than the open load detect time, tOCD , then all regulators
will be disabled and the fault flag allowed to go high.
The regulators will remain disabled until either the power is
cycled off and on, the EN input is taken low then high, or the
fault flag, FF, is pulled low. If the power is cycled or EN is pulsed
low, the regulators will start in the enabled state, unless disabled
by tying the output to VIN, and the open load detection timer will
be reset. If the open load is still present the regulators will again
be disabled after the open load detect time.
Pulling the fault flag low will override the open load fault action
and all enabled regulators will be switched on. This state will
be maintained while the fault flag is held low. If the fault flag is
allowed to go high the A6261 will return to the open load fault
condition and will disable all regulators.
Each of the four regulators includes a limiter to ensure that
the output voltage will not rise higher than the output disable
threshold voltage below VIN when driven by the regulator. This
means that the voltage across the regulator will not be less than
the output disable voltage, unless it is forced by connecting the
LAx pin to VIN. However if a load becomes disconnected, the
regulator will pull the LAx pin up to the limit, which will ensure
that the voltage across the regulator, VIN – VLAx , is less than the
open load detect voltage, VOCD .
Note that an open load may also be detected if the sum of the for-
ward voltages of the LEDs in a string is close to or greater than
the supply voltage on VIN.
Temperature Monitor A temperature monitor function,
included in the A6261, reduces the LED current as the silicon
junction temperature of the A6261 increases (see figure 2). By
mounting the A6261 on the same thermal substrate as the LEDs,
this feature can also be used to limit the dissipation of the LEDs.
As the junction temperature of the A6261 increases, the regulated
current level is reduced, reducing the dissipated power in the
A6261 and in the LEDs. The current is reduced from the 100%
level at typically 4% per degree Celsius until the point at which
the current drops to 25% of the full value, defined at TJL
. Above
this temperature the current will continue to reduce at a lower
rate until the temperature reaches the overtemperature shutdown
threshold temperature, TJF.
The temperature at which the current reduction begins can be
adjusted by changing the voltage on the THTH pin. When THTH
is left open the temperature at which the current reduction begins
is defined as the thermal monitor activation temperature, TJM, and
is specified, in the characteristics table, at the 90% current level.
TJM will increase as the voltage at the THTH pin, VTHTH , is
reduced and is defined as approximately:
0.0039
=
TJM (°C)
1.46 –VTHTH
(3)
A resistor connected between THTH and GND will reduce VTHTII
and increase TJM. A resistor connected between THTH and a refer-
ence supply greater than 1 V will increase VTHTH and reduce TJM.
100
80
60
40
20
0
TJM
TJL
TJF
90
25
70 90 110
Junction Temperature, TJ (°C)
Relative Sense Current (%)
130 150 170
Figure 2. Temperature monitor current reduction.
Protected LED Array Driver
A6261
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 3 shows how the nominal value of the thermal monitor
activation temperature varies with the voltage at THTH and with
either a pull-down resistor, RTH, to GND or with a pull-up resis-
tor, RTH
, to 3 V and to 5 V.
In extreme cases, if the chip temperature exceeds the overtem-
perature limit, TJF
, all regulators will be disabled. The tempera-
ture will continue to be monitored and the regulators re-activated
when the temperature drops below the threshold provided by the
specified hysteresis.
Note that it is possible for the A6261 to transition rapidly
between thermal shutdown and normal operation. This can hap-
pen if the thermal mass attached to the exposed thermal pad is
small and TJM is increased to close to the shutdown temperature.
The period of oscillation will depend on TJM
, the dissipated
power, the thermal mass of any heatsink present, and the ambient
temperature.
250
200
150
100
50
0
1.3
1.2
1.1
1.0
0.9
0.8
VTHTH
70 80 90 110100
Thermal Monitor Activation Temperature, TJM (°C)
RTH (k)
VTHTH (V)
130120 150140
RTH pull-up
to 5 V
RTH pull-up
to 3 V
RTH pull-down
to GND
Figure 3. TJM versus a pull-up or pull-down resistor, RTH, and VTHTH.
Protected LED Array Driver
A6261
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Application Information
Power Dissipation
The most critical design considerations when using a linear regu-
lator such as the A6261 are the power produced internally as heat
and the rate at which that heat can be dissipated.
There are three sources of power dissipation in the A6261:
• The quiescent power to run the control circuits
• The power in the reference circuit
• The power due to the regulator voltage drop
The elements relating to these dissipation sources are illustrated
in figure 4.
Quiescent Power The quiescent power is the product of the
quiescent current, IINQ
, and the supply voltage, VIN , and is not
related to the regulated current. The quiescent power, PQ, is there-
fore defined as:
PQ = VIN × IINQ (4)
Reference Power The reference circuit draws the reference
current from the supply and passes it through the reference resis-
tor to ground. The reference current is 8% of the output current
on any one active output. The reference circuit power is the prod-
uct of the reference current and the difference between the supply
voltage and the reference voltage, typically 1.2 V. The reference
power, PREF , is therefore defined as:
PREF =RREF
(VIN – VREF) × VREF
(5)
Regulator Power In most application circuits the largest dis-
sipation will be produced by the output current regulators. The
power dissipated in each current regulator is simply the product
of the output current and the voltage drop across the regulator.
The total current regulator dissipation is the sum of the dissipa-
tion in each output regulator. The regulator power for each output
is defined as:
PREGx =(VIN – VLEDx ) × ILEDx
(6)
where x is 1, 2, 3, or 4.
Note that the voltage drop across the regulator, VREG , is always
greater than the specified minimum drop-out voltage, VDO
. The
output current is regulated by making this voltage large enough
to provide the voltage drop from the supply voltage to the total
forward voltage of all LEDs in series, VLED .
The total power dissipated in the A6261 is the sum of the qui-
escent power, the reference power, and the power in each of the
four regulators:
PDIS =PQ + PREF
+ PREGA + PREGB + PREGC + PREGD
(7)
The power that is dissipated in each string of LEDs is:
PLEDx =VLEDx × ILEDx
(8)
where x is A, B, C, or D, and VLEDx is the voltage across all
LEDs in the string.
A6261
LAx
ILAx
IINQ
IREF
VIN
GND
IREF
RREF
VREF
VLED
VREG
VIN
Figure 4. Internal power dissipation sources.
Protected LED Array Driver
A6261
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
From these equations (and as illustrated in figure 5) it can be seen
that, if the power in the A6261 is not limited, then it will increase
as the supply voltage increases but the power in the LEDs will
remain constant.
Dissipation Limits
There are two features limiting the power that can be dissipated
by the A6261: thermal shutdown and thermal foldback.
Thermal Shutdown If the thermal foldback feature is disabled
by connecting the THTH pin to GND, or if the thermal resistance
from the A6261 to the ambient environment is high, then the
silicon temperature will rise to the thermal shutdown threshold
and the current will be disabled. After the current is disabled the
power dissipated will drop and the temperature will fall. When
the temperature falls by the hysteresis of the thermal shutdown
circuit, then the current will be re-enabled and the temperature
will start to rise again. This cycle will repeat continuously until
the ambient temperature drops or the A6261 is switched off. The
period of this thermal shutdown cycle will depend on several
electrical, mechanical, and thermal parameters and could be from
a few milliseconds to a few seconds.
Thermal Foldback If there is a good thermal connection to the
A6261, then the thermal foldback feature will have time to act.
This will limit the silicon temperature by reducing the regulated
current and therefore the dissipation.
The thermal monitor will reduce the LED current as the tempera-
ture of the A6261 increases above the thermal monitor activation
temperature, TJM , as shown in figure 6. The figure shows the
operation of the A6261 with 4 strings of 3 red LEDs, each string
running at 50 mA. The forward voltage of each LED is 2.3 V and
the graph shows the current as the supply voltage increases from
14 to 17 V. As the supply voltage increases, without the thermal
foldback feature, the current would remain at 50 mA, as shown by
the dashed line. The solid line shows the resulting current decrease
as the thermal foldback feature acts.
If the thermal foldback feature did not affect LED current, the
current would increase the power dissipation and therefore the
silicon temperature. The thermal foldback feature reduces power
in the A6261 in order to limit the temperature increase, as shown
in figure 7. The figure shows the operation of the A6261 under
the same conditions as figure 6. That is, 4 strings of 3 red LEDs,
each string running at 50 mA with each LED forward voltage at
Figure 5. Power Dissipation versus Supply Voltage.
3.0
2.5
2.0
1.5
1.0
0.5
0
A6261 Power
89 1110
Supply Voltage, VIN (V)
Power Dissipation, PD (W)
1312 161514
LED Power
Figure 6. LED current versus Supply Voltage.
Figure 7. Junction Temperature versus Supply Voltage.
54
52
50
48
46
44
42
40
Without thermal monitor
With thermal monitor
14.0 14.5 15.0 16.0 17.015.5
Supply Voltage, VIN (V)
ILED (mA)
16.5
4 Strings
VLED = 6.9 V
ILED = 50 mA
TA = 50°C
130
125
120
115
110
105
100
Without thermal monitor
With thermal monitor
14.0 14.5 15.0 16.0 17.015.5
Supply Voltage, VIN (V)
TJ (°C)
16.5
4 Strings
VLED = 6.9 V
ILED = 50 mA
TA = 50°C
Protected LED Array Driver
A6261
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2.3 V. The graph shows the temperature as the supply voltage
increases from 14 to 17 V. Without the thermal foldback feature
the temperature would continue to increase up to the thermal
shutdown temperature as shown by the dashed line. The solid line
shows the effect of the thermal foldback function in limiting the
temperature rise.
Figures 6 and 7 show the thermal effects where the thermal
resistance from the silicon to the ambient temperature is 40°C/W.
Thermal performance can be enhanced further by using a signifi-
cant amount of thermal vias as described below.
Thermal Dissipation
The amount of heat that can pass from the silicon of the A6261
to the surrounding ambient environment depends on the thermal
resistance of the structures connected to the A6261. The thermal
resistance, RJA
, is a measure of the temperature rise created by
the power dissipated and is usually measured in degrees Celsius
per watt (°C/W).
The temperature rise, T, is calculated from the power dissipated,
PD
, and the thermal resistance, RJA
, as:
T = PD × RJA (9)
A thermal resistance from silicon to ambient, RJA
, of approxi-
mately 30°C/W (LP package) or 34°C/W (LY package) can be
achieved by mounting the A6261 on a standard FR4 double-sided
printed circuit board (PCB) with a copper area of a few square
inches on each side of the board under the A6261. Multiple
thermal vias, as shown in figure 8, help to conduct the heat from
the exposed pad of the A6261 to the copper on each side of the
board. The thermal resistance can be reduced by using a metal
substrate or by adding a heatsink.
Supply Voltage Limits
In some applications the available supply voltage can vary over
a two-to-one range; for example, emergency lighting systems
using battery backup. In such systems is it necessary to design
the application circuit such that the system meets the required
performance targets over a specified voltage range.
To determine this range when using the A6261 there are two
limiting conditions:
• For maximum supply voltage the limiting factor is the power
that can be dissipated from the regulator without exceeding the
temperature at which the thermal foldback starts to reduce the
output current below an acceptable level.
• For minimum supply voltage the limiting factor is the maximum
drop-out voltage of the regulator, where the difference between
the load voltage and the supply is insufficient for the regulator
to maintain control over the output current.
Minimum Supply Limit: Regulator Saturation Voltage
The supply voltage, VIN
, is always the sum of the voltage drop
across the high-side regulator, VREG , and the forward voltage of
the LEDs in the string, VLED, as shown in figure 4.
VLED is constant for a given current and does not vary with
supply voltage. Therefore VREG provides the variable difference
between VLED and VIN . VREG has a minimum value below which
the regulator can no longer be guaranteed to maintain the output
current within the specified accuracy. This level is defined as the
regulator drop-out voltage, VDO.
The minimum supply voltage, below which the LED current does
not meet the specified accuracy, is therefore determined by the
sum of the minimum drop-out voltage, VDO , and the forward
voltage of the LEDs in the string, VLED . The supply voltage must
Figure 8. Board via layout for thermal dissipation: (top) LP package
(bottom) LY package.
Protected LED Array Driver
A6261
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
always be greater than this value and the minimum specified sup-
ply voltage, that is:
VIN > VDO + VLED, and
VIN > VIN
(min) (10)
As an example, consider the configuration used in figures 6 and
7 above, namely 4 strings of 3 red LEDs, each string running at
50 mA, with each LED forward voltage at 2.3 V. The minimum
supply voltage will be approximately:
VIN(min) = 0.55 + (3 × 2.3) = 7.45 V
Maximum Supply Limit: Thermal Limitation As described
above, when the thermal monitor reaches the activation tempera-
ture, TJM (due to increased power dissipation as the supply volt-
age rises), the thermal foldback feature causes the output current
to decrease. The maximum supply voltage is therefore defined as
the voltage above which the LED current drops below the accept-
able minimum.
This can be estimated by determining the maximum power that
can be dissipated before the internal (junction) temperature of the
A6261 reaches TJM.
Note that, if the thermal monitor circuit is disabled (by connect-
ing the THTH pin to GND), then the maximum supply limit will
be determined by the specified maximum continuous operating
temperature, 150°C.
The maximum power dissipation is therefore defined as:
PD(max) =RJA
T
(11)
where T is difference between the thermal monitor activa-
tion temperature, TJM
, of the A6261 and the maximum ambient
temperature, TA(max), and RJA is the thermal resistance from the
internal junctions in the silicon to the ambient environment.
If minimum LED current is not a critical factor, then the maxi-
mum voltage is simply the absolute maximum specified in the
parameter tables above.
Application Examples
In some filament bulb replacement applications the supply may
be provided by a PWM-driven, high-side switch. The A6261 can
be used in this application by simply connecting EN to VIN.
If neither fault action nor fault reporting is required, then FF
should be tied to ground.
When power is applied there will be a short startup delay, tON
,
before the current starts to rise. The current rise time will be lim-
ited by the internal current slew rate control.
The application circuit options in figure 9 show operation with
a higher voltage supply and with combinations of outputs tied
together and disabled.
A6261
+
–
LA1
VIN
12 V PWM
high-side drive
GND
LA2
LA3
LA4
EN
FF
IREF
THTH
A6261
+
–
LA1
VIN
24 V
PWM dimming
input
Fault output
GND
LA2
LA3
LA4
EN
FF
IREF
THTH
A6261
+
–
LA1
VIN
12 V
PWM dimming
input
GND
LA2
LA3
LA4
EN
FF
IREF
THTH
Figure 9. Typical applications with various supply and output options.
B. Higher voltage operation
C. Mix of output combinations
A. High brightness (HB) LED incandescent lamp replacement
Protected LED Array Driver
A6261
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LP, 16-Pin TSSOP with Exposed Thermal Pad
A
1.20 MAX
0.15
0.00
0.30
0.19
0.20
0.09
8º
0º
0.60 ±0.15
1.00 REF
C
SEATING
PLANE
C0.10
16X
0.65 BSC
0.25 BSC
21
16
5.00±0.10
4.40±0.10 6.40±0.20
GAUGE PLANE
SEATING PLANE
ATerminal #1 mark area
B
For Reference Only; not for tooling use (reference MO-153 ABT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
C
Exposed thermal pad (bottom surface); dimensions may vary with device
6.10
0.65
0.45
1.70
3.00
3.00
16
21
Reference land pattern layout (reference IPC7351
SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
PCB Layout Reference View
C
Branded Face
3±0.05
3±0.05
Protected LED Array Driver
A6261
14
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LY, 10-Pin MSOP with Exposed Thermal Pad
Terminal #1 mark area
A
Gauge Plane
Seating Plane
0.86 ±0.05
SEATING
PLANE
0.50
REF
0.25
21
10
21
10
A
B
0.53 ±0.10
0.15 ±0.05
0.05
0.15
0° to 6°
3.00 ±0.10
3.00 ±0.10 4.88 ±0.20
1.98
1.73
0.27
0.18
For Reference Only; not for tooling use (reference JEDEC MO-187)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
Exposed thermal pad (bottom surface)
Protected LED Array Driver
A6261
15
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright ©2009-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Revision History
Revision Revision Date Description of Revision
Rev. 6 January 13, 2012 Update RJA
