TEA1613T/N1,518 - NXP Semiconductors

AN10907

TEA1613T resonant power supply control IC

Rev. 1 — 28 December 2010 Application note

Document information

Info Content

Keywords TEA1613T, burst mode, adapter, LCD TV, plasma TV, resonant, converter.

Abstract This applica tion note discusses the TEA1613T application functions.

The TEA1613T provides th e drive function for the two discrete power

MOSFETs in a resonant half-bridge configuration.

The TEA1613T integrates a controller for a half-bridge resonant converter

(HBC).

The controller for a zero-voltage switching LLC resonant converter

includes a high-voltage level-shift circuit and several protection features

like over-current protection, open-lo op protection, capacitive mode

protection and a general purpose latched protection input.

In addition to the normal frequency controlled operation mode, it also

supports burst mode operation.

The proprietary high voltage BCD Powerlogic process makes an efficient,

direct start-up possible from the rectified universal mains voltage. A

second low voltage SOI IC is used for accurate, high speed protection

functions and control.

The integrated functionality makes the TEA1613T very suitable for power

supplies in LCD-TV, plasma televisions, PC power supplies, high-power

office equipment and adapters.

A similar product is the TEA1713, which also contains an integrated PFC

controller.

Application note Rev. 1 — 28 December 2010 2 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Revision history

Rev Date Description

v.1 20101228 first issue

Application note Rev. 1 — 28 December 2010 3 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

1. Introduction

1.1 Scope and setup of this document

This application note discusses the TEA1613T functions for applications in general. The

extensive functionality of the TEA1613T leads to a high number of subjects to discuss.

To facilitate the reading of this application note, the setup of this document is made in

such a way, that a chapter or p aragraph on a selected subject can be read as a

stand-alone explanation with a minimum number of cross-referen ce s to othe r do cu m en t

parts or the data sheet. This leads to some repetition of information within the application

note and to description s or figures tha t are similar to the o nes publishe d in the TEA1613T

data sheet. In most cases typical values are given to enhance the readability.

Section 1 “Introduction”

Section 2 “TEA1613T highlights and features”

Section 3 “Pin overview with functional description”

Section 4 “Application diagram”

Section 5 “Block diagram”

Section 6 “Supply func tion s ”

Section 7 “MOSFET drivers GATELS and GATEHS”

Section 8 “HBC functions”

Section 9 “Burst mode operation”

Section 10 “Protection functions”

Section 11 “Miscellaneous advice and tips”

Section 12 “Application examples and topologies”

Section 13 “Abbreviations”

Section 14 “Legal information”

Section 15 “Tables”

Section 16 “Figures”

Section 17 “Contents”

Please note that all values provided throughout this document are typical values

unless otherwise stated.

1.2 Related documents

Additional information and tools can be found in other TEA1613T documents such as:

•Data sheet

•Calculation sheet

•User manual of demo board

Application note Rev. 1 — 28 December 2010 4 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

2. TEA1613T highlights and features

2.1 Resonant conversion

Today’s market demands high quality, reliable, small, lightweight and efficient power

supplies.

In principle, the higher the operating frequency, the smaller and lighter the transformers,

filter inductors and capacitor s can be. On the other hand, the core, switching and winding

losses of the transformer increases at higher frequencies and become dominant. This

effect reduces efficiency at high frequencies, which limits the minimum size of the

transformer.

The corner frequency of the output filter usually determines the band width of the con tro l

loop. A well-chosen corner frequency allows high operating frequencies for achieving a

fast dynamic response.

Pulse-Width Modulated (PWM) power converters, such as flyback, up- and down

converters, are widely used in low and medium power applications. A disadvantage of

these converters is that the PWM rectangular voltage and current waveforms cause

turn-on and turn-off losses that limit the operating frequency. The rectangular waveforms

also generate broadband electromagnetic energy that can p roduce ElectroMagnetic

Interference (EMI).

A resonant DC-DC converter produces sinusoidal waveforms and reduces the switching

losses, which allows it to oper a te at high er fre qu enc ie s.

Recent environmental considerations have resulted in a need for high efficiency

performance at low loads. Burst-mode operation of the resonant converter can provide

this if the converter is to remain active as for adapter applications.

Resonant conversion provides the following benefits:

•High power

•High efficiency

•EMI friendly

•Compact

2.2 General features

•Universal mains supply operation

•High level of integration, resulting in a low external component count and a cost

effective design

•Enable input

•On-chip high-voltage start-up source

•Stand-alone operation or IC supply from external DC supply

Application note Rev. 1 — 28 December 2010 5 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

2.3 Resonant half-bridge controller features

•Integrated high-voltage level shifter

•Adjustable minimum and maximum frequency

•Maximum 500 kHz half-bridge switching frequency

•Adaptive non-overlap timing

•Burst mode switching

2.4 Protection features

•Safe restart mode for system fault conditions

•General latched protection input for output over-voltage protection or external

temperature protection

•Protection timer for time-out and restart

•Overtemperature protection

•Soft (re)start

•Under-voltage protection for boost (brownout), IC supply and output voltage

•Over-current regulation and protection

•Input voltage browno u t

•Capacitive mode protection for resonant converter

2.5 Protection

The TEA1613T provides several protection functions that combine detection with a

response to solve the problem. By regulating the frequency as a reaction to, for example,

over-power or bad half- bridge switching, the prob lem can be solved or operation kept safe

until it is decided to stop and restart (timer-function).

2.6 Typical areas of application

•LCD television

•Plasma television

•High-power adapters

•Slim notebook adapters

•PC power supplies

•Office equipment

Application note Rev. 1 — 28 December 2010 6 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

3. Pin overview with functional description

Table 1. Pinning overview

Pin Name Functional description

1 SNSOUT/PFCON Input for sensing (indirectly) the output voltage of resonant converter . Normally connected to an

auxiliary winding of HBC.

Also output signal for PFC to hold switching in order to provide synchro nous burst mode

operation.

This pin has 2 functions rel ated to internal comparators:

•Overvoltage protection: SNSOUT >3.5 V, latched

•Undervoltage protection: SNSOUT <2.3 V, protection timer

The pin also contains an internal current source of 100 mA that, initially, generates a voltage up

to 1.5 V across an external impedance (>20 k recommended). This voltage level should

enable PFC operation (PFCON). After start-up this level is higher, representing the state of the

output voltage.

During burst mode, an internal switch makes this voltage level low during the time that the HBC

is not switching.

2 SNSFB Sense input for HBC output regulation feedback by voltage.

Sinking a current from SNSFB provides the feedback-voltage on SNSFB. This current through

an internal resistor (1.5 k), internally connected to 8.4 V results in the regulation voltage.

The regulation voltage range is from 4.1 V to 6.4 V, and corresponds with the maximum and

minimum frequency that can be controlled by SNSFB. The SNSFB range is limi ted to 65 % of

the maximum frequency preset by RFMAX.

Open loop detection i s provided, activating t he protect ion timer wh en SNSFB is (re mains) above

7.7 V.

3 SNSBURST Sense input for regulation voltage to enter burst mode.

Externally connected to SNSFB by using a resistive divi der.

When the voltage on SNSBURST drops below Vburst(SNSBURST) = 3.5 V, the HBC pauses its

operation. When the voltage on SNSBURST increases to above Vburst(SNSBURST) + internal

hysteresis = 3.6 V it resumes operation without a soft-start sequence. The transition level can

be chosen by the values of the resistors used.

An internal current source compensates the tra nsition level for vari ations on boost voltage

(supply voltage of the converter) by using the SNSBOOST information. Th e total impedance of

the resistive divider determines the amount of compensation.

4 SNSBOOST Sense input for boost voltage.

Externally connected to resistor divided boost voltage.

As soon as the voltage on this pin drops below VUVP(SNSBOOST) = 1.6 V, switching of the HBC is

stopped at the moment the low-side MOSFET is on.

An internal hysteresis current source of 3 mA in combination with the resistance of the external

divider determines the start level. The boost voltage for starting is higher than the boost voltage

for stopping.

Application note Rev. 1 — 28 December 2010 7 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

5 SUPIC IC voltage supply input and output of the internal HV start-up source.

All internal circuits are directly or indirectly (via SUPREG) supplied from this pin, with the

exception of the high-voltage circuit.

The buffer capacitor on SUPIC can be charged in several ways:

•Internal high-voltage (HV) start-up source

•Auxiliary winding from HBC transformer or capacitive supply from switching half-bridge

node

•External DC supply, for example a standby supply

The IC enables operation when the SUPIC voltage has reached th e start level of 22 V (for

HV start) or 17 V (for external supply). It stops operation below 15 V and a shutdown reset is

activated at 7 V.

6 PGND Power ground. Reference (ground) for HBC low-side driver.

7 SUPREG Output of the internal regulator: 10.9 V.

The supply made by this function is used by internal IC functions such as the MOSFET drivers.

It can also be used to supply an external circuit. SUPREG can provide a minimum output

current of 40 mA.

SUPREG becomes operational after SUPIC has reached its start level.

The IC starts full operation when SUPREG has reached 10.7 V.

UVP: If SUPREG drops below 10.3 V after start, the IC stops operating and the current from

SUPIC is limited to 5.4 mA, to allow recovery.

8 GATELS Gate driver output for low-side MOSFET of HBC.

9 n.c. Not connected, high-voltage spacer.

10 SUPHV High-voltage supply input for internal HV start-up source.

In a stand-alone power supply application, this pin is connected to the boost voltage. SUPIC and

SUPREG are charged with a constant current by the internal start-up source. SUPHV operates

at a voltage above 25 V.

Initially the charging current is low (1.1 mA). When the SUPIC exceeds the short-circuit

protection level of 0.65 V, the generated current increases to 5.1 mA. The source is switched off

when SUPIC reaches 22 V which initiate s a start operation. During start operation the voltage

drops until an auxiliary supply takes over the supply of SUPIC. If the takeover does not take

place before SUPIC drops below 15 V, the SUPHV so urce is reactivated and a restart is made.

11 GATEHS Gate driver output for high-side MOSFET of HBC.

12 SUPHS High-side driver supply connected to an external bootstrap capacitor between HB and SUPHS.

The supply is obtained using an external diode between SUPREG and SUPHS.

13 HB Reference for the high-side driver GATEHS.

Input for the internal half-bridge slope detection circuit for adaptive non-overlap regulation and

capacitive mode protection, externally connected to a half-bridge node between the MOSFETs

of HBC.

14 n.c. Not connected, high-voltage spacer.

15 SNSCURHBC Sense input for the momentary current of the HBC. In case of too high voltage level (that

represents the primary current), internal comparators determine to regulate to a higher

frequency (SNSCURHBC = 0.5 V) or protect (SNSCURHBC = 1 V) by switching immediately

to maximum frequency.

Variations on protection level, caused by HBC input voltage variations, can be compensated by

additional current from SNSCURHBC. This current leads to a voltage offset across the external

series resistance which adapts the protection levels. This series resistance is normally provided

by the current measurement resistor and an extra series resistance which has a typical value of

1 k.

Table 1. Pinning overview …continued

Pin Name Functional description

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NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

16 SGND Signal ground, reference for IC.

17 CFMIN Oscillator pin.

The value of the external capacitor determines the minimum switching frequency of the HBC. In

combination with the resistor value on RFMAX, it sets the operating frequency range.

To facilitate switching timing, a triangular waveform is generated on the CFMIN capacitor

Vlow(CFMIN) = 1 V and Vhigh(CFMIN) = 3 V). The minimum frequency is determined by a fixed

minimum (dis)charging current of 150 A. During special conditions, the (dis)charging current is

reduced to 30 A to temporarily slow down the charging.

An internal function limits the operating frequency to 670 kHz.

18 RFMAX Oscillator frequency pin.

The value of the resistor connected between th is pin and ground, determines the frequency

range. Both the minimum and maximum frequencies of the HBC are preset. The minimum

frequency is set by CFMIN and the absolute maximum frequency is internally limited to 670 kHz.

The voltage on RFMAX and the value of the resistor connected to it, determine the variable part

(in addition to the fixed 150 A) of the (dis)charging current of the CFMIN-capacitor . The voltage

on RFMAX can vary between 0 V (minimum frequency) and 2.5 V (maximum frequency).

The RFMAX voltage (running frequency) is driven by SNSFB- and SSHBC/EN- function.

The protection timer is started when the voltage level is above 1.83 V. An error is assumed

when the HBC is operating at high frequency for a longer time.

19 SSHBC/EN Combined soft-start/protection frequency control of HBC and IC enable input (PFC or

PFC + HBC). Externally connected to a soft-start capacitor and an enable pull-down function.

This pin has 3 functions:

•Enable IC (>2.2 V)

•Frequency sweep during soft-start from 3.2 V to 8 V

•Frequency control during protections between 8 V to 3.2 V

Seven internal current sources operate the frequency control, depending on whic h of the

following actions is required:

•Soft-start + overcurrent protection: high/low charge (160 A/40 A) + high/low discharge

(160 A/40 A)

•Capacitive mode regulation: high/low discharge (1800 A/440 A)

•General: bias discharge (5 A)

20 RCPROT T imer presetting for time-out and restart.The timing is determined by the values of an externally

connected resistor and capacitor.

Protection timer.

During the protections listed below, the timer is activated by a 100 A charge current:

•OverCurrent Regulation OCR (SNSCURHBC)

•High Frequency Protection HFP (RFMAX)

•Open Loop Protection OLP (SNSFB)

•Undervoltage Protection UVP (SNSOUT)

When the level of 4 V is reached the protection is activated. The resistor discharges the

capacitor and at a level of 0.5 V, a restart is made.

Restart timer.

Table 1. Pinning overview …continued

Pin Name Functional description

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xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

Application note Rev. 1 — 28 December 2010 9 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

4. Application diagram

Fig 1. Basic application diagram TEA1613T

001aal427

TEA1613

mains

rect Boost

SupHs

TrHbc

RCurcmp

RCurHbc

CRes

CHB

CSupHs

CSupReg

CSupIc

Output

DSupHs

RProt

Rfmax

CProt

Cfmin

CSoStHbc

SNSBOOST GATEHS

GATELS

SNSCURHBC

SNSOUT/

PFC ON

SNSFB

SNSBURST

CFMIN

RFMAX

RCPROT

SSHBC/EN

SUPHV SUPIC SUPREG

SupReg

PfcOnNot

CurHbc

SUPHS

SGNDPGND

Disable

RESONANT HALF-BRIDGE

CONTROLLER

POWER

FACTOR

CONTROLLER

Application note Rev. 1 — 28 December 2010 10 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

5. Block diagram

Fig 2. TEA1613T with application block diagram (part 1)

coa074

120 μA

5.6 V

2.2 V Enableplc

3.2 V

3.2 V 8.0 V

ClampEndSoftStart

SenseFbSS

40 μA

120 μA

40 μA

1360 μA

440 μA

5 μA

42 μA

FREQUENCY

CONTROL

HBC

3 A

5.8 V

SUPHV

SNSBOOST BoostUv

SPIKE FILTER

SSHBC/EN

Disable supply

Enable supply

0 V to >2 V

Boost

SUPREG

3.0 V

8.4 V

SuplcChargeLow = 1.1 mA

SuplcCharge = 5.1 mA

HV START-UP SOURCE

CONTROL

10.9 V 5.5 mA

SUPIC

SuplcShort

LatchReset

0.65 V

7 V

1.6 V 50 mV

SupReg

EnableSupReg

reduced

current

startlevel Hv = 22 V

startlevel Lv = 17 V

stoplevel = 15 V

SupRegUvStart

startlevel = 10.7 V

SupRegUvStop

stoplevel = 10.3 V

SupHvPresent CSUPREG

Protection

HBC softstart reset

Vfmax(SSHBC)

VSSHBC/EN

Vfmin(SSHBC)

fmin

fHB

fmax

off

fmax

forced fast

sweep slow sweep regulationregulation

Vss(hf-lf)(SSHBC)

014aaa864

0ISNSFB

Vopen = 8.4 V

0.66 mA

Ifmin

VRFMAX

2.2 mA

Ifmax

VSSHBC = 8 V

260 μA

IOLP

VOLP = 7.7 V

Vfmin = 6.4 V

Vfmax = 4.1 V

Vclamp,fmax = 3.2 V

VSNSFB

8 mA

Iclamp,max

2.5 Vtyp = Vfmax

1.5 Vtyp = 0.6 × Vfmax

001aal040

passed

none

present

short

error long

error

PROTECTION TIMER repetative

error

Vhigh(RCPROT)

Islow(RCPROT)

IRCPROT

Error

VRCPROT

Protection time

001aal063

62 kΩ1 nF

9.8 MΩC

Application note Rev. 1 — 28 December 2010 11 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 3. TEA1613T with application block diagram (part 2)

coa075

1.5 kΩ

RProt

340 kΩ

CProt

640 nF

TEA1613 N1A

pin list:

1. SNSOUT/PFCON

2. SNSFB

3. SNSBURST

4. SNSBOOST

5. SUPIC

6. PGND

7. SUPREG

8. GATELS

9. n.c.

10. SUPHV

20. RCPROT

19. SSHBC/EN

18. RFMAX

17. CFMIN

16. SGND

15. SNSCURHBC

14. n.c.

13. HB

12. SUPHS

11. GATEHS

Output

High

Voltage

Output

Low

Voltage

Output

Vout

CCO

RFMAX

FreqHigh ProtTimer

30 μA

Fmax,limit

Rfmax Cfmin

FreqHbc

(75 % of max)

1.83 V

Slowed

down

current

CFMIN

Vhigh = 3.0 V

Vlow = 1.0 V

HBC DRIVE CONTROL Drive GateHS

Drive GateLS

Enable

Logic

SUPHS

GATEHS

7.3 mA

3.2 V

6.4 V 100 mV

2.2 mA 100 μA100 μA

VOLTAGE PIN SSHBC

POLARITY INVERSION

(max 2.5 V)

VOLTAGE PIN RFMAX

HBC OSCILLATOR

CONVERSION TO CURRENT

via R

fmax

FEEDBACK CURRENT

PIN SNSFB

FIXED f

min

CURRENT

CONVERSION TO

VOLTAGE (max 1.5 V)

(DIS-)CHARGE CURRENT

PIN CFMIN

CONVERSION TO

FRQUENCY via C

fmin

Cur(HBC)

= R

cur(HBC)

× I

Cur(HBC)

ocr(high)

ocp(high)

ocp(nom)

ocr(nom)

−I

ocr(nom)

−I

ocp(nom)

−I

ocr(high)

−I

ocp(high)

Cur(HBC)

SNSCURHBC

HBC BOOST COMPENSATION

reg

uvp

Boost

GATELS

GATEHS

sink current only with positive V

SNSCURHBC

sink

source

low V

Boost

strong compensation

high OCP

low V

Boost

strong compensation

high OCR

nominal V

Boost

no compensation

nominal OCP

nominal V

Boost

no compensation

nominal OCR

SNSCURHBC

ocr(HBC)

−V

ocr(HBC)

ocp(HBC)

−V

ocp(HBC)

0 μA0 V 1.8 V V

SNSBOOST

compensation on SNSCURHBC

2.5 V =

regulation

170 μA

−170 μA

ADAPTIVE NON OVERLAP

LEVEL

SHIFTER

SupHs

Drive GateHS

Drive GateLS

CAPACITIVE MODE REGULATION

SLOPE

DETECTION

SlopeNeg

SlopeNegStart

SlopePos

SlopePosStart

SupHs

GATELS

SNSOUT/PFCON PFC off

SNSFB

SupReg

1.5 V

3.5 V

hold hbc

3.5 V

2.35 V

ProtTimer

(latched) ProtSd

OutputUv

OutputOv

SNSBURST

compensation of burst

voltage level by boost voltage

HoldHbc

SnsBoost

RCPROT

Restart

Over Current Regulation HBC

High Frequency Protection HBC

Open Loop Protection SNSFB

Under Voltage Protection SNSOUT

4.0 V

0.5 V

SNSCURHBC

OperatingHbc

CurHbc

SPIKE

FILTER

SUPIC

SupReg

PGND

HB 4.5 V HB

SupReg

CSupReg

CRes2

CCurHbc

CSuplc

RCurHbc

0.23 Ω

RCurcmp

1 kΩ

CHb

CRes1

SPIKE

FILTER

SPIKE

FILTER

BOOST VOLT A GE

COMPENSATION

SnsBoost 2.5 V => 0 μA

1.7 V => 100 μA

1 V

0.5 V

0.4 V

8.1 V

8.4 V ProtTimer

open loop level = 7.7 V

Freq.

Control

ProtTimer

Standby

(external) supply

RESTART/

PRO TECTION TIMER CONTROL

014aaa865

014aaa860

fast HB slope

Boost

GateLs

GateHs

0slow HB slope incomplete HB slope t

001aal033

HB,limit

max,B

fmax

RFMAX

curve C

fmin

fmax

A high high

B low low

C low too low

max,A

min,

B and C

min,A

001aal037

500 mV

−500 mV

SNSCURHBC

160 μA

40 μA

−40 μA

−160 μA

SSHBC/EN

8 V

5.6 V

3.2 V

Output

regulate

HBC 0CR

Fast soft-start sweep (charge and discharge) Slow soft-start sweep (charge and discharge)

001aal044

2.5

1.7

Icmp

(μA)

SnsBoost

(V)

Application note Rev. 1 — 28 December 2010 12 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6. Supply functions

6.1 Basic supply system overview

6.1.1 TEA1613T supplies

The main supply for the TEA1613T is SUPIC.

SUPHV can be used to charge SUPIC for starting the supply. During operation a supply

voltage is ap plied to SUPIC and the SUPHV source is switched of f. The SUPHV source is

only switched on again at a new start-up.

The internal regulator SUPREG generates a fixed voltage of 10.9 V to supply the internal

MOSFET drivers GATELS and GATEHS. To supply GATEHS a boot strap fu nction with an

external diode is used to make supply SUPHS.

SUPIC and SUPREG also supply other internal TEA1613T circuits.

6.1.2 Supply monitoring and protection

The supply voltages are internally monitored for deciding when to initia te ce rtain action s

i.e. starting, stopping or protection.

In several applications the SUPIC voltage can also be used to monitor the HBC output

voltage by protection input SNSOUT/PFCON.

Fig 4. Basic overview internal IC supplies

001aal429

TEA1613

SUPHV

22 V

start when HVsupply

enable HVsource

start when LVsupply

stop, UVP

shutdown reset

COMP

0.65 V

COMP

17 V

COMP

7 V

COMP

15 V

COMP

start

EXTERNAL

stop

10.7 V

10.9 V

COMP

GATEHS SUPHS

SUPREG

SUPIC

HBC

VAUXILIARY

SNSOUT/PFCON

GATELS

10.3 V

COMP

OVP

latched

shutdown

UVP

protection

timer

3.5 V

COMP

2.35 V

COMP

1.1 mA5.1 mA

STARTUP

CONTROL

VBOOST

Application note Rev. 1 — 28 December 2010 13 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.2 SUPIC - the low voltage IC supply

SUPIC is the main IC supply. With the exception of the SUPHV circuit, all internal circuit s

are either directly or indirectly supplied from this pin.

6.2.1 SUPIC start-up

SUPIC needs to be connected to an externa l buffe r capacitor. This buffer cap acitor can be

charged in several ways:

•Internal high-voltage (HV) start-up source

•Auxiliary supply (e.g. from a winding on the HBC transformer)

•External DC supply (e.g. from a standby supply)

The IC starts operating when the SUPIC and SUPREG voltages have reached the start

level. The start level value of SUPIC depends on the condition of the SUPHV pin.

SUPHV 25 Vmax

This is the case in a stand-alone application where SUPIC is initially charged by the HV

start-up source. The SUPIC start level is 22 V. The large difference between start level

and stop level (15 V) is used to allow discharge of the SUPIC capacitor until the auxiliary

supply can take over the IC supply.

SUPHV not connected/used

This is the case when the TEA1613T is supplied from an external DC supply. The SUPIC

start level is now 17 V. During start-up and operation the IC is continuously supplied by

the external DC supply. For this kind of application the SUPHV pin should be left open.

6.2.2 SUPIC stop, UVP and short-circuit protection

The IC stops operating when the SUPIC voltage drops below 15 V which is the

Under-Voltage Protection (UVP) of SUPIC. While in the process of stopping, the HBC

continues until the low-side MOSFET is active befo re stopping the HBC operation. SUPIC

has a low level detection at 0.65 V to detect a sh ort circuit to ground. This level also

controls the current source from the SUPHV pin.

6.2.3 SUPIC current consumption

The SUPIC current consumption depends on the state of the TEA1613T.

•Disabled IC state: when the IC is disabled via the SSHBC/EN pin, the current

consumption is low at 250 A.

•SUPIC charge, SUPREG charge, thermal hold, restart and shutdown state:

During the charging of SUPIC and SUPREG before start-up, during a restart

sequence or during shutdown after activation of protection, only a small part of the IC

is active. The HBC operation is disabled. The current consumption from SUPIC in

these states is small: 400 A.

•Operating supply state: When the HBC is operational and switching, the current

consumption is larger . The MOSFET drivers are dominant in the cu rrent consumption,

especially during a so ft-start of the HBC, when the switching frequency is high, but

also during normal operation (see Section 6.5.5). Initially the SUPIC current is

delivered by the stored energy in the SUPIC capacitor. During normal operation, this

is eventually taken over by the supply source on SUPIC.

Application note Rev. 1 — 28 December 2010 14 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.3 SUPIC supply using HBC transformer auxiliary winding

6.3.1 Start-up by SUPHV

In a stand-alone power supply application, the IC can be started by a high voltage source

such as the rectified mains voltage. Fo r this purpose the high voltage input SUPHV can be

connected to the boost voltage (for example a PFC output voltage).

The SUPIC and SUPREG a re charged by the internal HV start-up source which delivers a

constant current from SUPHV to SUPIC. SUPHV is operational at a voltag e > 25 V.

As long as the voltage at SUPIC is below the short circuit protection level (0.65 V), the

current from SUPHV is low (1.1 mA). This is to limit the dissipation in the HV start-up

source when SUPIC is shorted to ground.

During normal conditions, SUPIC quickly exceeds the protection level and th e HV sta rt-up

source switches to normal current (5.1 mA). The HV start-up source switches off when

SUPIC has reached the start level (22 V). The current consumption from SUPHV is low

(7 A) when switched off.

When SUPIC has reache d th e start leve l (22 V), SUPREG is charged. When SUPREG

reaches the level of 10.7 V, it enables operation of HBC.

The auxiliary winding supply of the HBC transformer must take over the supply of SUPIC

before it is discharged to the SUPIC undervoltage stop level (15 V).

6.3.2 Block diagram for SUPIC start-up

Fig 5. Block diagram: SUPIC and SUPREG start-up with SUPHV and auxiliary supply

001aal018

SuplcChargeLow = 1.1 mA

SuplcCharge = 5.1 mA

SuplcCharge = off

HV START-UP SOURCE

CONTROL

0.65 V

10.9 V 5.5 mA

SUPIC

SUPHV

SUPREGSupReg

EnableSupReg

VAUXILIARY

reduced

current

SuplcShort

startlevel Hv = 22 V

startlevel Lv = 17 V

stoplevel = 15 V

SupRegUvStart

startlevel = 10.7 V

SupRegUvStop

stoplevel = 10.3 V

SupHvPresent CSUPREG

Application note Rev. 1 — 28 December 2010 15 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.3.3 Auxiliary winding on the HBC transformer

To obtain a supply voltage for SUPIC during operation, an auxiliary winding on the HBC

transformer can be used. As SUPIC has a wide operational voltage range (15 V to 38 V),

this is not a critical parameter.

Also note:

•For low power consumption, the voltage on SUPIC should be low.

•To use the voltage from the auxiliary winding for both the IC supply and the HBC

output voltage measurement (by SNSOUT/PFCON). The auxiliary supply must be

made accurately to represent the output voltage. To ensure good coupling, this

winding needs to be placed on the secondary (output) side.

•When mains insulation is included in the HBC transformer, it can impact the

construction of the auxiliary winding. Triple insulated wire is needed when the

auxiliary winding is placed on the mains-insulated area of the transformer

construction.

6.3.3.1 SUPI C and SNSOUT/PFCON by auxiliary winding

The SNSOUT/PFCON input provides a combination of 3 functions:

•Overvoltage protection: SNSOUT/PFCON > 3.5 V, latched

•Undervoltage protection: SNSOUT/PFCON < 2.35 V, protection timer

•During burst mode an internal switch makes this voltage level low during the time that

the HBC is not switching. This signal can be used to make a PFC burst

synchronously.

Remark: A more detailed discussion of the SNSOUT/PFCON functions can be found in

Section 9.1 “Burst mode implementation”, Section 10.3.1 “OverVoltage Protection (OVP)

output” and Section 10.3.2 “UnderVoltage Protection (UVP) output”.

Often, a circuit is used which combines SUPIC and the output voltage monitoring by

SNSOUT/PFCON, with one auxiliary winding on the HBC transformer. But an

independent construction for SUPIC and SNSOUT is also possible; for example when

SUPIC is supplied by a separate standby supply and an auxiliary winding is only used for

output voltage sensing. It is also possible not to use SNSOUT for ou tp u t sen sin g.

SNSOUT can be used as a general purpose protection input. For more details on the

possibilities, refer to Section 10.3.3 “OVP and UVP combinations”.

Fig 6. Auxiliary winding on primary side (left) and secondary side (right)

001aal019

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NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

In case of a combined function of SUPIC and SNSOUT/PFCON by an auxiliary winding on

the HBC transformer, some issues need to be addressed to obtain a good representation

of the output voltage for SNSOUT/PFCON measurement.

The advantage of a good coupling/representation of the auxiliary winding with the output

windings is that a stable auxiliary volt age is also obtained for SUPIC. A low SUPIC voltage

value can be designed more easily for lowest power consumption.

6.3.3.2 Auxiliary supply voltage va riations by output current

At high (peak) current loads, the voltage drop across the series components of the HBC

output stage (resistance and diodes) is compensated by regulation. This results in a

higher voltage on the windings at higher output currents due to the higher currents

causing a larger voltage drop across the series components. An auxiliary winding supply

shows this variation caused by the HBC output.

6.3.3.3 Voltage variations by auxiliary winding position: primary side component

Due to a less optimal position of the auxiliary winding, the voltage for SNSOUT/PFCON

and/or SUPIC can cont ain a certai n amount of undesired primary vo ltage component. This

can seriously endanger the feasibility of the SNSOUT/PFCON sensing function.

To avoid a primary voltage component on the auxiliary voltage, the coupling of the

auxiliary winding with the primary winding should be as small as possible. To obtain this,

the auxiliary winding should be placed on the secondary winding(s) and as physically

remote as possible from the primary winding. See the differences in the results provided

by the comparison on a secondary side position in Figure 7.

Fig 7. Po si tion the auxiliary winding for good outp ut coupling

001aal020

secondary side

primary side Vaux

Vaux

Vaux.new Vaux.new

Bad coupling Vaux

to VO at high

output current

Good coupling

Vaux.new to VO at

high output current

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NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.3.4 Difference between UVP on SNSOUT/PFCON and SNSCURHBC OCP/OCR

In a system that uses output voltage sensing by means of the SNSOUT/PFCON function,

there can be an overlap in functionality in an over-power or short circuit situation. In such

a situation, often both the SNSOUT/PFC O N UnderVoltage Protection (UVP) and the

OverCurrent Protection/Regulation on SNSCURHBC, activates the protection timer.

There are basic differences between both functions:

•OCP/OCR monitors the power in the system by sensing the primary current in detail

•SNSOUT/PFCON mon ito rs (in direc tly) the HBC output voltage or another externa l

protection circuit (e.g. NTC temperature measurement)

SNSOUT/PFCON is a more general protection input while SNSCURHBC is specifically

designed for HBC operation.

In addition, SNSOUT/PFCON also offers two other functions: OVP (latched) and an

output signal for PFC bursting.

6.4 SUPIC supply by external voltage

6.4.1 Start-up

When the TEA1613T is supplied by an external DC supply, the SUPHV pin can be left

unconnected. The SUPIC start level is now 17 V.

When the SUPIC exceeds 17 V, the internal regulator is activated and charges SUPREG.

At SUPREG ³ 10.7 V, GA TELS is switched on for the bootstrap fu nction to charge SUPHS.

The TEA1613T starts the converter as soon as VBOOST reaches a preset lev el

(SNSBOOST ³ 1.6 V).

6.4.2 Stop

Operation of the TEA1613T can be stopped by switching off the external source for

SUPIC. As soon as the voltage level on SUPIC drops below 15 V, operation is stopped.

In case of shutdown (because of pr otection), this state is reset by inte rnal logic as soon as

the SUPIC voltage drops below 7 V.

6.5 SUPREG

SUPIC has a large voltage range for easy application. But because of this, SUPIC can not

directly be used to su pply the internal MOSFET dr ivers as they would exce ed th e allowed

gate voltage of many external MOSFETs.

To avoid this issue (and create a few other benefits), the TEA1613T contains an

integrated series stabilizer. The series stabilizer generates an accurate regulated voltage

on SUPREG on the external buffer capacitor.

This stabilized SUPREG voltage is used for:

•Supply of internal low-side HBC driver

•Supply of internal high-side driver via external components

•Reference voltage or supply of external circuits

Application note Rev. 1 — 28 December 2010 18 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The series stabilizer for SUPREG is enabled after SUPIC has been charged. In this way

optional external circuitry at SUPREG does not draw from the start-up current during the

charging of SUPIC. The capacitor on SUPIC acts as a buffer at charge of SUPREG and

start-up of the IC.

To ensure that the ex ter n al MO SF ETs re ce ive sufficient gate drive, the SUPREG voltage

must first reach the Vstart(SUPREG) level before the IC starts operating, provided that the

SUPIC voltage has also reached the start level.

The SUPREG has an Under -Voltage Protection. When the SUPREG volt a ge dr op s belo w

the 10.3 V two actions occur:

•The IC stops operating to prevent unreliable switching due to a too low gate driver

voltage. The HBC continues until the low-side stroke is active.

•The maximum current from the internal SUPREG series stabilizer is reduced to

5.4 mA. In case of an overload at SUPREG in combination with an external DC supply

for SUPIC, this action reduces the dissipation in the series stabilizer.

It is important to realize that in principle, SUPREG can only source current.

The GATELS driver (and indirectly the GATEHS driver) is supplied by this voltage and

takes current from it during operation depending on the operating conditions. Some

change in value can be expected due to current load and temperature.

Voltage characteristics for load Voltage characteristics for temperature

Fig 8. Typical SUPREG voltage characteristics for load and temperature

SUPREG load current (mA)

0504010 20 30

001aal433

10.89

10.90

10.91

10.92

SUPREG

voltage

(V)

10.88

SUPIC = 17 V

SUPIC = 20 V

Temperature (°C)

−50 150100050

001aal021

10.85

10.90

10.80

10.95

11.00

SUPREG

voltage

(V)

10.75

Application note Rev. 1 — 28 December 2010 19 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.5.1 Block diagram of SUPREG regulator

6.5.2 SUPREG during start-up

SUPREG is supplied by SUPIC. SUPIC is the unregulated external power source that is

the input voltage for the internal voltage regulator that provides SUPREG.

At start-up SUPIC needs to reach a specific voltage level before SUPREG is activated:

•When start-up is by the internal HV supply, SUPREG is activated when SUPIC 22 V.

•When start-up is by an external (low voltage) supply, SUPREG is activated when

SUPIC 17 V.

6.5.3 Supply voltage for the output drivers: SUPREG

The TEA1613T has a powerful output stage for GATELS and GATEHS to drive large

MOSFETs. These internal drivers are supplied by SUPREG which provides a fixed

voltage.

It can be seen from the simplified model that current is taken from SUPREG when the

external MOSFET is switched on by charging the gate to a high voltage.

Fig 9. Block diagram of intern al SUPREG regulator

001aal434

10.9 V 5.5 mA

CSUPIC

CSUPREG

SUPIC

SUPREG

EnableSupReg

SUPHV SOURCE Vaux

reduced

current

SupRegUvStart

startlevel = 10.7 V

SupRegUvStop

stoplevel = 10.3 V

Fig 10. Simplified mo de l of MOSFET drive

001aal435

EXTERNAL

GATE CIRCUIT

SUPREG

RDS-ON

Cgs Vgs

Idischarge

Icharge

RDS-ON

TEA1613

Application note Rev. 1 — 28 December 2010 20 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The shape of the current from SUPREG at switch on is related to:

•the supply voltage for the internal driver (10.9 V)

•the characte rist ic of the internal driver

•the gate capacitance to be charged

•the gate thresho l d vo ltage for the MOSFET to switch on

•the external circuit to the gate

The charging of SUPHS for GATEHS is synchronized in time with GATELS but has a

different shape because of the bootstrap function.

6.5.4 Supply voltage for the output drivers: SUPHS

The high-side driver is supplied by an external bootstrap buffer capacitor. The bootstrap

capacitor is connected between the high-side reference pin HB and the high-side driver

supply input pin SUPHS. This capacitor is charged by an external diode from SUPREG

during the time that HB is low. With the use of a suitable external diode, the voltage drop

between SUPREG and SUPHS can be minimized. This is especially important when

using a MOSFET that needs a large amount of gate charge and/or when switching at hig h

frequencies.

Instead of using SUPREG as the power source for charging SUPHS, another supply

source can be used. In such a construction it is important to check for correct start/stop

sequences and to prevent the voltage exceeding the maximum value of HB +14 V.

Note that for each cycle, the current taken from SUPREG to charge SUPHS differs (in

time and shape) from the current taken by GATELS.

6.5.4.1 Initial charging of SUPHS

At start-up, SUPHS is charged by the bootstrap function by setting GATELS HIGH to

switch on the low-side MOSFET, keeping th e HB node at lo w voltage. The PFC operation

is started while SUPHS is being charged. Th e tim e between start charging and start HBC

operation is normally sufficient to charge SUPHS completely.

6.5.4.2 Current load on SUPHS

The current taken from SUPHS consists of two parts:

•Internal MOSFET driver GATEHS

•Internal circuit to control GATEHS (37 A)

It can be seen from Figure 11 that the current taken by the driver GATEHS occurs at

switch on. The shape of the current from SUPHS at switch on is related to:

•the value of the supply voltage for the internal driver

•the characte rist ic of the internal driver

•the gate capacitance to be charged

•the gate thresho l d vo ltage for the MOSFET to switch on

•the external circuit to the gate

The voltage value of SUPHS can vary.

Application note Rev. 1 — 28 December 2010 21 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.5.4.3 Lower voltage on SUPHS

During normal operatio n, each time the half- bridg e node (HB) is switched to groun d level,

the SUPHS capacitor is charged by the boots trap function. Because of the voltage drop

across the boot strap diode, the value of SUPHS is normally lower than SUPREG (or other

bootstrap supply input).

The voltage drop across the bootstrap diode is directly related to the amount of current

that is needed to charge SUPHS. The resultant SUPHS voltage is also influenced by the

time available for charging.

A large volt age drop occurs wh en an external MOSFET with a large gate capacit ance has

to be switched at high frequency (high current + short time).

Also, during burst mode operation, a low voltage on SUPHS can occur. In burst mode

there are (lon g) periods of not switching, and th erefore no charging of SUPHS. During this

time the circuit supplied by SUPHS slo wly disc h arges the supp ly vo ltage capacitor. At the

moment a new burst starts, the SUPHS voltage is lower than during normal operation.

During the first switching cycles the SUPHS is recharged to its normal level. During burst

mode, at low output power, the switching frequency is normally rather high which limits a

fast recovery of the SUPHS voltage.

Although in most applications the voltage drop is limited, it is an important issue to be

evaluated. It can influence the selection of the best diode type for the bootstrap function

and the value of the buffer capacitor on SUPHS.

6.5.5 SUPREG power consumed by MOSFET drivers

During operation the drivers GATELS and GATEHS charging the gate cap acitan ces of the

external MOSFETs consume a major part of the power from SUPREG. The amount of

energy needed for this in time, is linear to the switching frequency. Often, for the

MOSFETs used, the total charge is specified for certain conditions. With this value an

estimation can be made for the amount of current needed from SUPREG.

GATELS and GATEHS (driving two MOSFETs in total):

ISUPIC = 2  Qgate  fbridge

For example, a MOSFET with Qgate = 40 nC at a bridge frequency 100 kHz:

Fig 11. Typical appl ication of SUPHS

001aal437

SUPHS

GATEHS

GATELS

SUPREG

VBOOST

TEA1613

Application note Rev. 1 — 28 December 2010 22 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

ISUPIC = 2  40 nC  100 kHz = 8 mA

Remark: Note that the calculated value is generally higher than the value found in

practice, beca us e th e switc hin g ope ratio n deviates from the MOSFET specification for

Qgate.

6.5.6 SUPREG supply voltage for other circuits

The regulated voltage of SUPREG can also be used as a regulated supply for external

circuits. The load of the external circuits has an effect on the start-up (time) and the total

load (IC + external circuit) of SUPREG during operation.

Current available for supplying an external circuit from SUPREG.

The total current available from SUPREG is 40 mA. To determine how much current is

available for an external circuit, it must be known how much is being used by the IC.

ISUPREG_for_external = 40 mA  ISUPREG_for_IC

With respect to the IC, by far the most amount of current from SUPREG is consumed by

the MOSFET drivers (GATELS and GATEHS). Other circuit parts in the IC, consume a

maximum of 4 mA.

ISUPREG_for_IC = ISUPREG_for_MOSFET-drivers + ISUPREG_for_other_IC-circuits

ISUPREG_for_IC = ISUPREG_for_MOSFET-drivers + 4 mAmax

ISUPREG_for_MOSFET-drivers can be estimated by the method provided in Section 6.5.5.

An estimation by measurement

The current used by SUPIC, while supplying the circuit from an external power supply , can

be assumed as a firs t ap pr ox ima tio n of how much current the IC circuits take from

SUPREG. Using this value, an estimation can be made of the power availa ble for external

circuits.

Be aware that the highest power consumption value is reached when the MOSFET

drivers are switching at the highest frequency.

Example:

ISUPIC(maximum measured) = 14 mA

ISUPREG(for IC cir cuits)  ISUPIC(maximum measured) = 14 mA

ISUPREG(for externals) = 40 mA  ISUPREG(for IC circuits) = 40 mA  14 mA = 26 mA

Remark: Note that to maintain full functionality, SUPREG must remain above the

undervoltage protection level (10.3 V). High external current loads can lead to problems

during start-up.

Application note Rev. 1 — 28 December 2010 23 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.6 Value of the capacitors on SUPIC, SUPREG and SUPHS

Some practical examples are provided in Section 12.

6.6.1 Value of the capacitor on SUPIC

6.6.1.1 General

It is generally advisable to use two types of capacitor on SUPIC. An SMD ceramic type,

with a smaller value located close to the IC, and an electrolytic type providing the major

part of the capacitance.

6.6.1.2 Start-up

When the supply is initially provided by an HV source before being handled by an auxiliary

winding, a larger capacitor is needed on SUPIC. The capacitor value should be large

enough to handle the start-up before the auxiliary winding takes over the supply of SUPIC.

Example:

This example provides an estimation and not an exact calculation.

ISUPIC(start-up) = 10 mA

VSUPIC(start-up) = 22 V  15 V = 7 V

tVaux>15V = 70 ms

(1)

6.6.1.3 Normal operation

For normal operation, th e main purpose of the ca pacito rs on SUPIC is to keep the current

load variations (e.g. gate drive currents) local.

6.6.1.4 Burst mode operation

When burst mode operation is applied, the supply construction often uses an auxiliary

winding and start-up from the HV source. While in the burst mode there are long periods

during which the auxiliary winding is not able to charge the SUPIC because there is no

HBC switching (time between two bursts). Therefore, the capacitor value on SUPIC

should be large enough to keep the voltage above 15 V to prevent activating the SUPIC

under-voltage stop level.

Example:

This example provides an estimation and not an exact calculation.

ISUPIC(between 2 bursts) = 4 mA

VSUPIC(burst) = Vaux burst  15 V = 19 V  15 V = 4 V

t between 2 bursts = 25 ms

(2)

CSUPIC ISUPIC start-up

tVaux

15 V

VSUPIC start-up



------------------------------------------ 10 mA 70 ms

7 V

---------------

100 F==

CSUPIC ISUPIC between 2 bursts

tbetween 2 bursts



VSUPIC burst



----------------------------------------- 4 mA 25 ms

4 V

---------------

25 F==

Application note Rev. 1 — 28 December 2010 24 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

6.6.2 Value of the capacitor on SUPREG

To support charging of SUPREG during an HV source start, the capacitor on SUPREG

should not be larger than the ca pacitor on SUPIC. T his is to prevent a severe voltage dro p

on SUPIC due to the charge of SUPREG. If SUPIC is supplied by an external (standby)

source, this is not important.

SUPREG is the supply for the curr ent of the gate drivers. Keeping curr ent peaks loca l can

be achieved using an SMD ceramic capacitor which is supported by an electrolytic

capacitor. This is necessary to provide sufficient capacitance to prevent voltage drop

during high current loads. The value of the capacitor on SUPREG should be much larger

than the total capacitance of the MOSFETs that need to be driven (including the load and

capacitor on SUPHS that is in parallel with the bootstrap construction), to prevent

significant voltage drop.

When considering the internal voltage r egulator , the value of the cap acitance on SUPREG

should be 1 F to ensure basic regulation properties. Often a much larger value is used

for the reasons mentioned previously.

6.6.3 Value of the capacitor for SUPHS

To support charging the gate of the high side MOSFET, the SUPHS capacitor should be

much larger than the gate capacitance. This prevents a significant voltage drop on

SUPHS by the gate char ge. Whe n burst mod e is applied , SUPHS is d isch arged by 37 A

during the time between two bursts by the quiescent current of the internal circuit.

6.6.4 Relationship between the capacitors on SUPIC, SUPREG and SUPHS

It can be generally stated that:

• CSUPIC > CSUPREG > CSUPHS

•In a system that uses burst mode operation, the capacitor values need to be larger

than in a system without burst mode operation

Application note Rev. 1 — 28 December 2010 25 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

7. MOSFET drivers GATELS and GATEHS

The TEA1613T provides 2 outputs for driving external high voltage power MOSFETs:

•GATELS for driving the low side of the HBC MOSFET

•GATEHS for driving the high side of the HBC MOSFET

7.1 GATELS and GATEHS

Both drivers have identical driving capabilities for the gate of an external high-voltage

power MOSFET. The low-side driver is referenced to pin PGND and is supplied from

SUPREG. The high-side driver is floating, referenced to HB, the connection to the

midpoint of the external half-bridge. The high-side driver is supplied by a capacitor on

SUPHS that is supplied by an external bootstrap function by SUPREG. The capacitor on

SUPHS is charged by the bootstrap diode when the low-side MOSFET is on.

Both MOSFET drivers have a strong current source capability and an extra strong current

sink capability. In general, operation of the HBC it is not critical to be able to quickly switch

on the external MOSFET, as the HB node automatically swings to the correct state after

switch off. Fast switch off however, is important to limit switching losses and prevent

delays especially at high frequency.

7.2 Supply voltage and power consumption

For a description of the supply voltages and power consumption by the MOSFET drivers

see Section 6.5.3 and Section 6.5.5.

Fig 12. GATELS and GATEHS drivers

001aal437

SUPHS

GATEHS

GATELS

SUPREG

VBOOST

TEA1613

Application note Rev. 1 — 28 December 2010 26 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

7.3 General details regarding MOSFET drivers

Switch on

The time to switch on is dependent upon:

•the supply voltage for the internal driver

•the characteristics of the internal driver

•the gate capacitance to be charged

•the gate thresho l d vo ltage for the MOSFET to switch on

•the external circuit to the gate

Switch off

The time to switch off is dependent upon:

•the characte rist ic of the internal driver

•the gate capacitance to be discharge d

•the voltage on the gate just bef ore discharge

•the gate thresho l d vo ltage for the MOSFET to switch off

•the external circuit to the gate

Because the timing for switching off the MOSFET is more critical than switching it on, the

internal driver can sink more current than it can sour ce. At higher frequen cies and/or short

on-time, timing becomes more critical for correct switching. Sometimes a compromise

must be made between fast switching and EMI effects. A gate circuit between the driver

output and the gate can be used to optimize the switching behavior.

Switching the MOSFETs on and off by the drivers can be approximated by alternating

charge and discharge of a (gate-source) capacitance of the MOSFET through a resistor

(RDS-ON of the internal driver MOSFET).

Fig 13. Examples of gate circuits

001aal438

GATE

Application note Rev. 1 — 28 December 2010 27 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

7.4 Specifications

The main function of the internal MOSFET drivers is to source current and sink current to

switch the external MOSFET switch on and off.

The amount of sink and source current required is specified to show the capability of the

internal driver.

The simplified model in Figure 14 demonstrates that the values of the charge current and

discharge current are strongly dependant upon the conditions of the supply voltage and

gate voltag e. The value of the source current is highest when the supply voltage is highest

and the gate voltage 0 V. The value of the sink cu rrent is highe st when the gate volt age is

highest.

The supply voltage provided by SUPREG for GATELS is constant at 10.9 V. The supply

voltage for GATEHS is lower and depends on the operating conditions

(see Section 6.5.4).

Fig 14. Simplified mo de l of a MOSFET drive

001aal435

EXTERNAL

GATE CIRCUIT

SUPREG

RDS-ON

Cgs Vgs

Idischarge

Icharge

RDS-ON

TEA1613

Table 2. TEA1613T driver specifications

Symbol Parameter Conditions Min Typ Max Unit

HBC high-side and low-side driver (pins GATEHS and GATELS)

Isource(drv) driver source curren t high-side; VGATEHS  VHB = 4 V - 310 - mA

low-side; VGATELS  VPGND = 4 V - 310 - mA

Isink(drv) driver sink current high-side; VGATEHS  VHB = 4 V - 560 - mA

high-side; V GATEHS  VHB = 11 V - 1.9 - A

low-side; VGATELS  VPGND = 2 V - 560 - mA

low-side; VGATELS  VPGND = 11 V - 1.9 - A

Application note Rev. 1 — 28 December 2010 28 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8. HBC functions

8.1 SNSBOOST undervoltage or brownout protection level

To prevent the HBC from operating at very low boost input voltages, the voltage on the

SNSBOOST pin is sensed continuously.

After th e volt age o n this pin drops below VUVP(SNSBOOST) = 1.6 V, the switching of the

HBC is stopped as soon as the low-side MOSFET is on. The start level is determined by

an internal hysteresis current source of 3 A in combination with the resistance values of

the external divider. The boost voltage for starting is higher than the boost voltage for

stopping. For starting, an additional internally fixed hysteresis of 50 mV is added to the

comparator level: 1.6 V + 0.05 V = 1.65 V.

8.1.1 Start and stop voltage without series resistance

The boost voltage at which the converter starts:

(3)

The boost voltage at which the converter stops:

(4)

Example:

R1 = 9800 k

R2 = 47 k

Rs = 0 k

(5)

Fig 15. SNSBOOST function

001aal439

TEA1613

SPIKE

FILTER

boost Uv

50 mV

16 V

3 μA

5.8 V

boost

VBoost start

R11.65 V

---------------- 3 A+





1.65+ V=

VBoost stopR11.60 V

----------------





1.60+ V=

VBoost start

9800 k1.65 V

47 k

---------------- 3 A+





1.65 V +375 V==

Application note Rev. 1 — 28 December 2010 29 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

(6)

8.1.2 Start and stop voltage with series resistance

When introducing a series resistance (Rs) in the connection of SNSBOOST, the start

voltage can be increased independently.

(7)

Example:

R1 = 9800 k

R2 = 47 k

Rs = 22 k

(8)

8.1.3 SNSBOOST and compensation SNSBURST

The choices made for designing th e brownout function af fect the design of th e burst-mode

presetting on SNSBURST. If the burst mode is implemented, mainly the choice for the

VBoost(stop) level has an effect on the (amount of) compensation current in SNSBURST.

For information relating to combining both functions, see Section 9.5.2 “Advanced desig n

of SNSBURST circuit”.

8.2 HBC switch control

The internal control for the MOSFET drivers, determines when the MOSFETs are

switched on and off. It uses several inputs from the following functions:

•An internal divider is used to provide the alternating switching of high-side and

low-side MOSFET for every oscillator cycle.

•The adaptive non-overlap (see Section 8.3) sensing on HB determines the switch-on

moment.

•The oscillator (see Section 8.4) determines th e switch-off mo ment.

•Several protection and enable fu nctions determine if the resonant converter is allowed

to switch.

VBoost stop9800 k1.60 V

47 k

----------------





1.60 V +335 V==

VBoost start new(,)R11.65 V Rs3 A+

---------------------------------------------------- 3 A+





1.65 V Rs3 A++=

VBoost start new

9800=1.65 22 3+47

-------------------------------------3+





1.65 22 3 ++389 V=

Application note Rev. 1 — 28 December 2010 30 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.3 HBC adaptive non-overlap

8.3.1 Inductive mode (normal operation)

The high efficiency of a resonant converter is the result of Zero-Voltage Switching (ZVS)

of the power MOSFETs, also called soft-switching. To allow soft-switching, a small

non-overlap time (also called dead time) is required between the on-time of the high-side

MOSFET and low-side MOSFET. During this non-overlap time, the primary resonant

current (dis)charges the capacitance of the half-bridge between ground and boost

voltage. After the (dis)charge, the body diode of the MOSFET starts conducting and

because the voltage acro ss th e MO SF ET is zero, there are no switching losses.

This mode of operation is called inductive mode because the switching frequency is

above the resonance frequency and the resonant tank has an inductive impedance.

The time required for the transition of the HB depends on the amplitude of the resonant

current at the mom en t of switch ing . Th e re is a (complex) relationship between the

amplitude, the frequency, the boost voltage and the output voltage. Ideally the IC should

switch on the MOSFET as soon as the transition of the HB has reached its end value. To

prevent a swing back of the HB voltage, it should not wait longer , especially at high output

load.

The adaptive non-o verla p function o f the TEA1613T pr ovides an automatic measu rement

and control function that decides when to switch on. As it uses actual measurement

inputs, the control adapts for operation changes in time.

Because of this adaptive non-overlap function, it is not necessary to preset a fixed

non-overlap time, which always is a compromise between different operating conditions.

The adaptive non-overlap function senses the slope at HB after one MOSFET has been

switched-off. Normally the slope at the HB starts directly. Once the transition of the HB

node is complete, the slope ends. This is detected by the adaptive non-overlap sensing

Fig 16. Inductive mode HBC switching

GateLs

GateHs

TrHbc

fmin

boost

001aal440

Application note Rev. 1 — 28 December 2010 31 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

and the other MOSFET is switched-on. In this way the non -overlap time is automatically

adjusted to the best value providing the lowest switching loss, even if the HB transition

cannot be fully completed.

The non-overla p time depends on the HB slope, but has an upper and lower time limit. An

integrated minim um non-o verlap time (1 60 ns) prevent s a ccident a l cross conduction in all

conditions. The maximum non-overlap time is limited to the charging time of the oscillator .

If the HB slope takes more time than the charging of the oscillator (25 % of HB switching

period) the MOSFET is forced to switch on. In this case the MOSFET is not soft-switching.

This limitation of the maximum non-overlap time ensures that at very high switching

frequency the on-time of the MOSFET is at least 25 % of the HB switching period.

8.3.2 Capacitive mode

During error conditions (e.g. output short-circuit, load pulse too high) or special start-up

conditions, the switching freque ncy can become lower than the resonance frequen cy. The

resonant tank then has a capacitive impedance. In capa citive mode the HB slope doesn’t

start after the MOSFET has switched off. It is not preferred to just switch on the other

MOSFET. The lack of soft-switching increases dissipation in the MOSFETs. The

conducting body diode in the MOSFET at the switching moment can damage the device

very quickly.

Fig 17. Adaptive non-o v erla p switching during norma l op era t in g co nditions

fast HB slope

Vboost

GateLs

GateHs

0slow HB slope incomplete HB slope t

001aal441

Application note Rev. 1 — 28 December 2010 32 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The adaptive non-overlap system of the TEA1613T always waits until the slope at the

half-bridge node starts. It guarantees safe/best switching of the MOSFETs in all

circumstances. In capacitive mode, it can take half the resonance pe rio d bef ore the

resonant current changes back to the correct polarity and star ts charging the half-bridge

node. To allow this relatively long waiting time, the oscillator remains in its slow charging

current mode until the half-bridge slope starts (see also Section 8.4.2 and Figure 22).

The MOSFET is forced to switch-on when the half-bridge slope doesn’t start at all and the

slowed-down oscillator reaches the high level.

To bring the converter from capacitive mode to inductive operation again, the oscillation

frequency is increased by the capacitive mode regulation function.

8.3.3 Capacitive Mode Regulation (CMR)

The harmful switching in capacitive mode is prevented by the ada ptive non-overlap

function. However, to end the capacitive mode operation and go back to inductive mode

operation, an extra action is executed which results in the Capacitive Mode Regulation.

Capacitive mode is detected when the HB slope doesn’t start shortly (690 ns) after the

MOSFET is switched-off. When the capacitive mode is detected, the switching frequency

is quickly increased. This is realized by discharging SSHBC/EN with a high curr ent

(1800 A) from the moment tno-slope = 690 ns has passed before the half-b rid ge sl op e

start s. The result ant frequency increase regulates the HBC back to the threshold between

capacitive and inductive mode.

Fig 18. Capacitive mode HBC switching

001aal442

delayed

oscillator

delayed switch-on

during capacitive mode

no HB slope

wrong polarity

GateHs

GateLs 0

Vboost

ITrHbc

Cfmin

Application note Rev. 1 — 28 December 2010 33 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

CMR of the TEA1613T can be recognized by the typical slowing of the oscillator in

combination with the discharging of SSHBC/EN.

Fig 19. Capacitive/inductive HBC operating frequencies

001aal443

load independent point

(series resonance)

@ Vimax

@ Qmax

@ Qnom @ Qmin

@ Vinom

@ Vimin

Mmin

Mnom

Mmax

resistive

inductivecapactive

fl fr fmax f

M = Vi

a·Vo

Note: Oscilloscope traces contain normal time-base (top) and zoomed view (bottom)

Fig 20. Typical protection and regulation behavior in capacitive mode (during bad start-up)

001aal444

Typical behavior at capacitive

mode protection/regulation Frequency increase by capacitive

mode protection/regulation

(notice voltage drop on SSHBC/EN)

HBHB

SNSCURHBC

SSHBC/EN

Voutput

CFMIN

SSHBC/EN

Voutput

Application note Rev. 1 — 28 December 2010 34 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.4 HBC oscillator

The slope controlled oscillator determines the switching frequency of the half-bridge. The

oscillator generates a triangular waveform at the external capacitor Cfmin.

8.4.1 Presets

Two extern al com p on e nts determin e th e fre q ue n cy rang e:

•Capacitor at CFMIN: This sets the minimum frequency in combination with an

internally trimmed current source.

•Resistor at RFMAX: This sets the frequency range and, in combination with Cfmin, the

maximum frequency.

The oscillator frequency depends on the charge and discharge current of the capacitor on

CFMIN. This (dis)charge current consists of a fixed part which determines th e minimum

frequency, and a variable p art which depends on the value of the resistor on RFMAX and

the voltage at pin RFMAX.

•The voltage on RFMAX is 0 V when the oscillator frequency is minimum.

•The voltage on RFMAX is 2.5 V when the oscillator frequency is maximum.

•The value of the resistor on RFMAX determin es the relationship between VRFMAX and

the frequency. It also determines the maximum frequency when VRFMAX = 2.5 V.

The maximum frequency of the oscillator is independent of the settings on CFMIN and

RFMAX and is limited internally to a minimum of 500 kHz. Figure 21 visualizes the

relationship between VRFMAX, RFMAX, Cfmin and fHB.

8.4.2 Operational control

During operation, the oscillator is controlled by the state of the half-bridge node HB. To

achieve this, an internal slope detection circuit monitors the voltage on HB.

The charge current of the oscillator is initially set to a low value of 30 A. After the start of

the half-bridge slope has been detected, the charge current is increased to the normal

value that corresponds to the working frequency at that moment. The working frequency

is controlled by feedback on SNSFB. Normally, the half-bridge slope starts directly after

the switch-off of the MOSFET, the time with the low oscillator current (30 A) being

negligible.

Fig 21. Frequency relationships

fHB,limit

fmax,B

Vfmax VRFMAX

Curve Cfmin Rfmax

A high high

B low low

C low too low

fmax,A

fmin,

B and C

fmin,A

fHB

001aal445

Application note Rev. 1 — 28 December 2010 35 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The similarity when switching GATELS and GATEHS is that the oscillator signal

determines the moment of switching of f. The mome nt of switching on is determined by the

HB sensing circuit.

As the moment of switching on is determined by the HB sensing (and therefore not fixed ),

the time betwee n swit chin g one MO SFET off and the other one on, is adaptive

non-overlap time (or dead time). This non-overlap time has no influence on the oscillator

signal.

The frequency control by oscillator frequency consists of determining the time between

two moments of switching off (including a small period during which the oscillator current

is only 30 A).

8.4.3 CFMIN and RFMAX

This section expla ins the method of calculating the va lues for the capacitor on CFMIN and

the resistor on RFMAX.

8.4.3.1 Minimum frequency setting for CFMIN

(9)

(10)

(11)

(12)

Fig 22. Timing overview of the oscillator and HBC drive

GateLs

GateHs

30 μA-period

ITrHbc

Cfmin t

Vboost

001aal446

foscillator 2f

=

tch earg tdisch earg toscillator

----------------------



Voscillator Vhigh CFMIN

Vlow CFMIN

3 V1 V 2 V=–=–=

Ioscillator min 150 A=

Application note Rev. 1 — 28 December 2010 36 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

(13)

Example:

Given fHB(min) = 57 kHz

(14)

8.4.3.2 Maximum frequency setting for RFMAX

(15)

(16)

(17)

Analog to the situation with Ioscillator(min):

(18)

(19)

(20)

(21)

Example:

Requirement - fHB(max) = 180 kHz and CFMIN = 330 pF

(22)

(23)

Remark: Note that the average multiplication factor is 4.7. There is a small deviation in

value depending on other parameters and presetting conditions. Practical verification of

the result is advised.

CFMIN Ioscillator min

22fHB min

Voscillator



------------------------------------------------------------------------ 150 A

HB min



----------------------------

CFMIN 150 A

2257 kHz2

--------------------------------------------- 0.00015

456000

------------------- 329 pF===

Ioscillator max4.7 note

IRFMAX max

Ioscillator min

IRFMAX max Vfmax

RFMAX

---------------------

RFMAX Vfmax

IRFMAX max

------------------------------ 2.5 V

IRFMAX max

------------------------------

fHB max Ioscillator max

4CFMINVoscillator



--------------------------------------------------------------- 4.7 IRFMAX max

Ioscillator min

+

4CFMIN2

------------------------------------------------------------------------------------

IRFMAX max 8 CFMINfHB max

Ioscillator min

–

4.7

------------------------------------------------------------------------------------------------

IRFMAX max 8CFMINfHB max

150 A–

4.7

--------------------------------------------------------------------------------

RFMAX 2.5 V

IRFMAX max

------------------------------ 11.75 V

8 CFMINfHB max

150 A–

--------------------------------------------------------------------------------

IRFMAX max 8 330 pF180 kHz 150 A–4.7

------------------------------------------------------------------------------475 A 150 A–

4.7

------------------------------------------------69.15 A===

RFMAX 2.5 V

69.15 A

-----------------------36 k==

Application note Rev. 1 — 28 December 2010 37 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.4.4 RFMAX and High Frequency Protection (HFP)

Normally the converter does not operate continuously at the preset maximum frequency.

This maximum frequency is only used for a short time during soft-start or temporary

fault/overload conditions.

When the operating frequency remains at, or close to, maximum frequency for a longer

period, a fault condition is assumed and a protection activated.

For this, the HFP senses the voltage at pin RFMAX. This voltage indicates the actual

operating frequency. When the frequency is higher than approximately 75 % of the

frequency range (RFMAX = 1.83 V), the protection timer is started.

Be aware that during normal regulation the maximum frequency is limited to only 60 % of

the presen t ra ng e and VRFMAX is a maximum of 1.5 V.

8.5 HBC feedback (SNSFB)

A typical power supply application contains mains insulation in the HBC. On the

secondary (mains insulated) side, the output voltage is compared to a reference and

amplified. The TEA1613T is normally placed on the primary side. The output of the error

amplifier is transferred to the primary side via an optocoupler. The output of the

optocoupler on the primary side can be connected directly to SNSFB.

The SNSFB pin supplies the optocoupler from an internal voltage source of 8.4 V via an

internal series resistor of 1.5 k. The internal series resistance also allows spike filtering

by an external capacitor at the pin.

To ensure sufficien t bias current for proper wor king of the optocoupler, the feedback input

has a threshold current of 0.66 mA at which the frequency is minimum. The maximum

frequency controlled by SNSFB is reached at 2.2 mA. Notice that this is only

approximately 60 % of the total preset frequency range. The remaining upper part of the

present frequency range can only be reached by control of SSHBC/EN in case of

soft-start or protection.

Fig 23. Typical basic SNSFB application

001aal447

V+

8.4 V

3.2 V

SNSFB

VOUT

CONTROL

TEA1613

1.5 kΩ

Application note Rev. 1 — 28 December 2010 38 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.5.1 HBC Open Loop Protection (OLP)

The resonant controller of the TEA1613T contains an Open-Loop Protection (OLP). This

protection monitors the voltage on SNSFB. When it exceeds 7.7 V, the protection timer is

started.

In normal operating conditions, the optocoupler current is between 0.66 mA and 2.2 mA

which pulls down the voltage at pin SNSFB. If an error occurs in the feedback loop, the

current can become less than 260 A which leads to an open loop protection .

Burst mode and open loop protection

To implement a burst mode, a resistor divider is connected between SNSFB and ground.

The impedance of this resistor divider should be significantly higher than 30 k to keep

the Open Loop Protection function. If the lower resistance value is lower, the voltage is

lower than the threshold voltage of 7.7 V. This disables open loop error detection.

Fig 24. SNSFB V-I characteristics

(1) VBOOST = 310 V DC

(2) VBOOST = 350 V DC

(3) VBOOST = 390 V DC

Fig 25. SNSFB voltage to output power characteristics examples

0ISNSFB

Vopen = 8.4 V

0.66 mA

= Ifmin

VRFMAX

2.2 mA

= Ifmax

VSSHBC = 8 V

260 μA

= IOLP

VOLP = 7.7 V

Vfmin = 6.4 V

Vfmax = 4.1 V

Vclamp,fmax = 3.2 V

VSNSFB

8 mA

= Iclamp,max

001aal448

2.5 V = Vfmax

1.5 V = 0.6 × Vfmax

(W)

0 250200100 15050

001aal449

5.4

5.6

5.2

5.8

6.0

SNSFB

(V)

5.0

(1)

(2)

(3)

Application note Rev. 1 — 28 December 2010 39 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.6 SSHBC/EN soft-start and enable

The SSHBC/EN pin provides the following three functions:

•Enables the IC (> 2.2 V)

•It performs an HBC frequency sweep during soft-start from 3.2 V to 8 V

•It provides frequency control during protection

Seven internal current sources operate the frequency control depending on the required

action i.e.

•Soft-start + Over-Current Protection: high/low charge (160 A/40 A) + high/low

discharge (160 A/40 A)

•Capacitive Mode Regulation: high/low discharge (1800 A/440 A)

•General: bias discharge (5 A)

8.6.1 Switching on and off using an external control function

The SSHBC/EN can be used to switch the converters on and off using an external control

function.

This function is often driven by a microcontroller from the secondary side of the

optocoupler. By doing this, the main power supply [HBC and PFC (when supplied by an

auxiliary of HBC)] can be switched off for Standby mode and on for normal operation. In

such a concept a separate standby supply is needed to supply the microcontroller

functions during the standby.

The TEA1613T also offers the possibility to switch on/off using the SNSBURST function.

This function is inte nd ed for bur st- m od e ope ratio n wh er e the du ra tio n of the on - an d

off-states are short.

Fig 26. SSHBC/EN: overview of sources, clamps and levels

001aal450

SSHBC/EN 19 1360 μA440 μA120 μA40 μA

120 μA40 μA

5 μA

high CMR

disable

low CMR high SoSt low SoSt bias

TEA1613

2.2 V ENABLE HBC

COMP

FREQUENCY

CONTROL

8 V

3.2 V

42 μA

3.0 V

8.4 V

Application note Rev. 1 — 28 December 2010 40 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.6.1.1 Switching on and off using SSHBC/EN

When a voltage is present at pin SUPHV or at pin SUPIC, a current of 42 A from the

SSHBC/EN pin charges the external capacitor. If the pin is not pulled-down, this current

initially lifts the voltage to 3.0 V. Since this is above the enable level (2.2 V), the IC is

enabled.

The IC can be disabled by pulling down the SSHBC/EN pin below 2.2 V. The HBC

continues until the low-side stro ke is active. The pull-down current must be larg er than the

current capability from the internal soft-start clamp: i.e. 42 A.

8.6.1.2 Hold and continue

The SNSBURST function can b e used to st art and stop the HBC. This method is intended

for burst-mode operation to switch off the converters for only a short time. It is possible to

either operate only the HBC in burst-mode or both HBC + PFC simultaneously (by use of

the SNSOUT/PFCON signal). The possibilities are similar to SSHBC/EN with the main

difference being that HBC continues without soft-start. For more details on burst mode

operation, see Section 9.1.

8.6.2 Soft-start HBC

The soft-start function for the resonant converter is provided by SSHBC/EN.

The relationship between switching fre quency and output current/p ower is not const ant. It

depends strongly on output voltage and boost voltage and the relationship can be

complex. To ensure that the resonant converter starts or re-starts with safe currents, the

TEA1613T has a soft-start function.

The soft-start function forces a start at high frequency so that currents are acceptable in

all conditions. It slowly decreases the frequency until the output voltage regulation has

taken over the frequency control. The limitation of the output current during start-up also

limits the output voltage rise and prevents an overshoot.

During soft-start, and in parallel with the soft-start frequency sweep, the SNSCURHBC

function monitors the prim ary curre nt and ca n a ctivate regu lation in case of a ( temp ora ry)

overpower situ a tion .

The soft-start uses the voltage at pin SSHBC/EN. The timing (duration) of the soft-start

event is set by an external capacitor on SSHBC/EN.

As the SSHBC/EN is also used as an input enab le, the soft-st art functionality is above the

enable related voltage levels (see Figure 27).

Application note Rev. 1 — 28 December 2010 41 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.6.2.1 Soft-start voltage levels

At start-up, the SSHBC/EN voltage is low which corresponds to the maximum frequency.

During the soft-start procedure, the exte rn al capacitor is charged, the SSHBC/EN voltage

rises and the frequency decreases. The contribution of the soft-start function ends when

SSHBC/EN is above 8 V.

The SSHBC/EN voltage is clamped at 8.4 V and remains at that level during normal

operation.

When the voltage on SSHBC/EN is reduced during pr otection or r egulation, the volt ag e is

clamped at 3.0 V. This is to provide a quick response so that the operat ing fr eq uency ca n

be reduced again. Below 3.2 V the discharge current is reduced to 5 A.

8.6.2.2 SSHBC/EN charge and discharge

During initial start-up, the soft-start external capacitor on SSHBC/EN is only charged to

obtain a decreasing frequency sweep from maximum to operating frequency.

Besides the function to soft-st art, SSHBC/EN is also used for regulation purpo ses such as

over-current reg ulation. Therefore the vo ltage on th e capacitor on SSHBC/EN can var y by

charging and discharging it by internal current sources.

For example: in case of over-current regulation, a continuous alter na tio n be twe e n

charging and discharging of the SSHBC/EN capacitor occurs. In this way the SSHBC/EN

voltage can be regulated, thereby overruling the signal on the feedback input SNSFB.

The (dis)charge current can have a high value 160 A or a low value 40 A. The

two-speed soft-st art sweep of the TEA1613T allo ws a combination of a short st art-up time

of the resonant converter and stable regulation loops such as overcurrent regulation.

In some cases there can be a situation when overcurrent regulation is activated during the

soft-start sequence. This results in a feedback controlled or corrected soft-start.

The fast (dis)charge speed is used for the upper frequency range where VSSHBC/EN is

below 5.6 V. In the upper frequency range the current and power in the converter do not

react strongly to fast frequency variations.

Fig 27. Operating frequencies related to SSHBC/EN voltage

SSHBC

fmax(ss)

= 2.5 V

RFMAX

min

max

03.2 V = V

fmax(SSHBC)

8 V = V

fmin(SSHBC)

8.4 V = V

clamp(SSHBC)

3.0 V = V

pu(EN)

SNSFB

< 0.66 mA (not yet regulating)

0.66 mA < I

SNSFB

< 2.2 mA (regulating)

RFMAX

001aal451

Application note Rev. 1 — 28 December 2010 42 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The slow (dis)charge speed is used for the lower frequency range where VSSHBC/EN is

above 5.6 V. In the lower frequency range the current in the converter reacts strongly to

frequency variations.

Burst mode

The soft-start capacitor is neither charged nor discharged during the no-operation time in

burst mode operation. The soft-start voltage does not change during this time.

8.6.2.3 S NSFB , SSHBC/EN and so ft-start reset - operating frequency cont rol

The operating frequen cy can be controlled by the SNSFB and SSHBC/EN simult aneously .

SSHBC/EN is dominant to provide protection and soft-start capability. In addition, there is

an internal soft-start reset mechanism that overrules both SNSFB and SSHBC/EN control

inputs and immediately sets the frequency to maximum.

8.6.2.4 Soft-start reset

Some protection functions require a fast correction of the operating frequency to the

maximum value, but it is not needed to stop switching. The overcurrent protection is an

example (se e Table 3).

When this protection is activated, the control input of the oscillator is disconnected

internally from the soft-start capacitor at pin SSHBC/EN and the switching frequency is

immediately set to maximum. In most cases, the change to the maximum switching

Fig 28. Over Current Regulatio n (OCR) d uring start-up

500 mVtyp

−500 mVtyp

VSNSCURHBC

160 μAtyp

40 μAtyp

−40 μAtyp

−160 μAtyp

ISSHBC/EN

VSSHBC/EN

8 Vtyp

5.6 Vtyp

3.2 Vtyp

Vregulate

Fast soft-start sweep (charge and discharge) Slow soft-start sweep (charge and discharge)

001aal452

Application note Rev. 1 — 28 December 2010 43 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

frequency restores safe switching operation. Once the voltage at pi n SSHBC/EN has

reached 3.2 V, the control input of the oscillator is connected to the pin again and the

normal soft-start sweep follows. Figure 29 shows the soft-start re set and the two-speed

frequency down wa rd sw ee p.

The soft -start rese t is also used to ensure a safe st art-up at maximum frequency when the

HBC is enabled by SSHBC/EN or after a rest a rt. The sof t-st ar t reset is not used when the

operation is stopped for burst mode.

8.7 Overcurrent protection and regulation HBC

Measurement of the primary resonant current indicates the level of output power that is

being generated by the converter. In case of a fault or output overload condition, this

current often increases considerably. By monitoring this current and then taking the

appropriate action, the converter can remain operational.

The resonant controller of the TEA1613T has two functions when in an over-current

condition:

•OverCurrent Regulation (OCR) slowly increases the frequency and the protection

timer is started

•OverCurrent Protection (OCP) steps immediately to maximum frequency

A boost voltage compensation function is included to reduce the variation in the preset

protection lev el of th e re sona nt current.

Fig 29. Soft-start reset and two-speed sof t-start

Protection

3.2 Vtyp

VSSHBC/EN

8 Vtyp

fmin

fHB

fmax

off

fmax

forced fast

sweep slow sweep regulationregulation

5.6 Vtyp

001aal453

Application note Rev. 1 — 28 December 2010 44 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.7.1 HBC overcurrent regulation

The lowest comparator levels of 0.5 V at the SNSCURHBC pin belong to the

Over-Current Regulation (OCR) level. There is a comparator for both the positive and

negative polarity. If either level is exceeded, the frequency is increased slowly. This is

accomplished by discharging the soft-start capacitor on the SSHBC/EN pin. Every time

the OCR level is exceeded, the state is latched until the next stroke and the sof t-start

discharge current is enabled. When both the positive and negative OCR levels are

exceeded, the soft-start discharge current flows continuously. In this way the operating

frequency is slowly increased until the resonant current value just reaches the value

permitted by th e pr es et.

The behavior during OCR can be observed on the SSHBC/EN pin as a resultant

regulation voltage.

When an OCR situation is present for a long time, a serious fault condition is assumed.

During OCR the protection timer is activated. The charging of the protection timer is active

approximately a half period cycle after the 0.5 V level is exceeded. If the detection levels

are continuously exceeded, the timer is charged continuously. However, if the detection

levels are only sometimes excee ded, the timer is charged accordingly. The restart st ate is

activated when RCPROT reaches the protection level of 4 V.

Fig 30. OCP and regulatio n HBC

001aal454

BOOST

COMPENSATION

CONTROL

VSNSBOOST

HBC operational

Iboost-compensation

± Iboost-compensation

VBOOST

over current protection 1 V

SNSCURHBC

1.8 V VSNSBOOST

0 μA

170 μA

2.5 V 2.63 V

COMP

Rcc

1 kΩ

TEA1613

over current protection −1 V

COMP

over current regulation 0.5 V

COMP

over current regulation −0.5 V

COMP

Application note Rev. 1 — 28 December 2010 45 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Start-up

The OverCurrent Regula tion is very effective for limiting the output cur rent during st art-up.

A smaller soft-start capacitor can be chosen which allows faster start-up. The small

soft-start capacitor may sometimes result in an excessive output current but the OCR

function can slow down the frequency sweep to keep the output current within the limits.

8.7.2 HBC overcurrent protection

In most cases the OverCurrent Regulation is able to keep the current below the set

maximum values. During certain error conditions however, the OCR might not be fast

enough to limit the current. The OverCurrent Protection (OCP) is implemented to protect

against these error conditions.

The internal OCP level is set to 1 V for SNSCURHBC. This is significantly higher than

the OCR level of 0.5 V. When the OCP level is reached the fr equency immediately jump s

to the maximum via a soft-start reset procedure, followed by a normal sweep down.

The maximum frequency value for soft-start must be chosen to be able to limit the output

power in these con d ition s su fficiently.

The behavior during OCP can be observed on the SSHBC/EN pin as a new soft-start.

Depending on the (over)load or fault condition during this new soft-start, OCR or OCP can

be activated again.

8.7.3 SNSCURHBC boost voltage compensation

The primary current, also called resonant current, is sensed via pin SNSCURHBC. It

senses the momentary voltage across an external current sense resistor. The use of the

momentary current signal allows a fast OCP and simplifies the stability of the OCR. The

OCR and OCP comparators compare the SNSCURHBC voltage to the maximum positive

and negative values.

For the same output p ower , the primary current is higher when the boost volt age is low. To

reduce the depende ncy of the protected output current level fo r the boost volta ge, a boost

compensation is included. The boost compensation sources and sinks a current from the

SNSCURHBC pin. This current creates a voltage drop across the series resistor Rcc. A

typical value for this resistor is 1 k.

The amplitude of the current depends linearly on the boost voltage. At nominal boost

voltage the current is zero and the voltage across the current sense resistor is also

present at the SNSCURHBC pin. At the boost start level SNSBOOST = 1.8 V and the

current is a maximum of 170 A. The direction of the current, sink or source, depends on

the active gate signal. The voltage drop created across Rcc reduces the voltage

amplitude at the p in, r esulting in a h i gher effective current protection level. Th e a mount o f

compensation is set by the value of Rcc.

Application note Rev. 1 — 28 December 2010 46 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

8.7.4 Current measurement circuits

8.7.5 SNSCURHBC layout

Because the SNSCURHBC must be able to accurately sense the measurement signal

cycle-by-cycle at higher frequencies, it is susceptible to disturbances. To prevent

disturbances on this input, the series resistor Rcc should be placed close to the IC to

reduce the length of the track that can pick up distur bing signals. As the impedance of the

measurement resistor is normally low, the length of signal track between Rcc and the

measurement resistor is not critical regarding disturbance.

Fig 31. SNSCURHBC: resonant current measurement configurations

001aal455

VBOOST

SNSCURHBC Ires

Rcc

1 kΩ

VBOOST

SNSCURHBC

Ires

0.02 Ires

Rcc

C = 1 nF C = 49 nF

1 kΩ

Application note Rev. 1 — 28 December 2010 47 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9. Burst mode operation

Burst mode operation can be used to improve the efficiency at low output loads.

By temporarily interrupting the switching, losses during the idle time are minimized.

Because the average power needed for the output is very low, it is easy for the converter

to deliver it during a short time of conversion which is a burst.

The burst mode operation of the TEA1613T is based on interrupting the switching while

maintaining regulation. Using an internal comparator, the regulation voltage can be

monitored to determine when to stop switching and when to continue. When restarting

after an interruption, no sof t-start is applied as the system is still in regulation (close to the

regular working point). The timing of switching on and off is determined by the

regulation-loop of the system (n ormally by t he o utput voltage). This deliberately creates a

small ripple on the output voltage during burst mode.

9.1 Burst mode implementation

Burst mode can be Implemented by a resistance divider from SNSFB to ground.

The comparator input monitors the regulation voltage SNSFB to a preset burst voltage

value by RBURST1 and RBURST2. When the HBC output power is low, the regulation voltage

decreases. When the regulation voltage reaches VBURST = 3.5 V, the switching stops, no

energy is converted and the output voltage drops. Following this, the regulation voltage

increases again. As soon as the regulation voltage reaches VBURST + 100 mV, the

switching resumes.

When the delivered power, during a burst, is larger than needed for the output, the

regulation volt age SNSFB quickly decreases again, stopping th e switching at VBURST. The

time needed for the regulation voltage to reach VBURST, mainly depends on the output

voltage and its load.

When the HBC output load increases to high levels, normal opera tion is resumed again as

the regulation voltage do es not reac h th e VBURST level.

Fig 32. Principle of burs t mode operat ion with SNSFB and comparator le vels

BURST

+ 100 mV

BURST

SNSBURST

(= ratio of SNSFB)

normal operation normal operationbursthold hold burst

001aal456

Application note Rev. 1 — 28 December 2010 48 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.2 PFC burst mode operation control by SNSOUT/PFCON

The PFC can be made to burst simult aneously with the HBC in burst mode. By doing this,

the converters operate for a limited time, followed by a time of no-operation. Burst mode

operation increases the efficiency in low-load conditions.

The SNSOUT/PFCON provides an on/off switching signal that can be used to stop and

start the PFC. This signal switches between the voltage level for output voltage monitoring

(2.35 V < VSNSOUT/PFCON < 3.5 V) and ground. An internal switch makes this voltage low

when the HBC is put on hold by the SNSBURST function.

The behavior and interfacing circuit of this system for synchronous burst mode depends

on the properties of the PFC-control circuit.

Fig 33. Burst mode application

001aal457

3.2 V 8 V

1.5

kΩ

SNSFB

SNSBURST

RBURST1

RBURST2

TEA1613

CONTROL

HOLDHBC 3.5 V

0.1 V

compensation of burst

voltage level by boost voltage

SNSBOOST

SPIKE

FILTER

1.7

SNSBOOST [V]

Icmp

[μA]

2.5

Application note Rev. 1 — 28 December 2010 49 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.3 Advantages of burst mode in HBC

The main reason for applying burst mode in a resonant converter is to improve the

efficiency at low output power by reducing the power losses.

The graphs in Figure 34 and Figure 35 show the principle improvements in a 250 W

resonant converter including (non-bursting) PFC.

Fig 34. Improved efficiency by HBC burst mode in a 250 W converter

Fig 35. Reduced losses by HBC burst mode in a 250 W converter

Po (W)

0 504020 3010

001aal458

100

efficiency

(%)

with burst mode

normal mode

Po (W)

0 15105

001aal459

(W)

with burst mode

normal mode

Application note Rev. 1 — 28 December 2010 50 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.4 Advantages of burst mode for HBC and PFC simultaneously

The TEA1613T provides a b urst mode system that simultaneously switches the HBC and

PFC. In this way, during the burst pe riod, the power is transfe rred directly from the inp ut to

the output. The HBC de te rm in es the repetition time of the burst and the PFC follows. In

the burst period, the PFC operates in normal regulation.

Power consumption is further re duced by PFC bursting. Examples of r esults obtained are

shown in Figure 36, Figure 37 and Figure 38.

Fig 36. Increased efficienc y at low output power in burst HBC and PFC (90 W adapter)

Fig 37. Remaining 90 W adapter losses in burst mode

Po (W)

0 1008040 6020

001aal460

100

efficiency

(%)

Po (W)

0 1.00.80.4 0.60.2

001aal461

1.0

1.5

0.5

2.0

2.5

(W)

Application note Rev. 1 — 28 December 2010 51 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.5 Choice of burst level and divider impedance

The power level at which burst mode is activated is set by a resistor divider on SNSFB.

The burst mode (VBURST = 3.5 V) is activated by the internal comparator on SNSBURST

at the SNSFB voltage level which can be chosen experimentally.

9.5.1 Basic design of an SNSBURST circuit

The SNSFB voltage level at which the converter enters burst mode can be chosen by a

resistor divider. This voltage value can be adapted to correspond with the internal preset

level of 3.5 V on the SNSBURST comparator.

Fig 38. Simultaneous HBC and PFC burst mode operation (and output voltage ripple)

001aal462

VDRAIN.PFC [100 V/div]

VOUTPUT [100 mVAC/div]

HB [100 V/div]

Fig 39. Designi ng the burst mode leve l us in g two resistor value s

019aaa358

3.2 V 8 V

1.5

kΩ

SNSFB

SNSBURST

RBURST1

RBURST2

RSBURST

TEA1613

CONTROL

HOLDHBC 3.5 V

0.1 V

compensation of burst

voltage level by boost voltage

SNSBOOST

SPIKE

FILTER

1.7

SNSBOOST [V]

Icmp

[μA]

2.5

Application note Rev. 1 — 28 December 2010 52 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The optimum level for burst mode can be determined experimentally as demonstrated in

the following example.

Example:

The required burst level frequency fHB(burst) = 90 kHz which corresponds to

SNSFB = 5.4 V.

For the basic presetting of the burst level, the internal compensation function can be

neglected.

(24)

This can be provided by the following values:

RBURST1 = 36 k,

RBURST2 = 68 k.

9.5.2 Advanced design of SNSBURST circuit

Tolerance on the value of the converters input voltage (boost voltage) can have a

considerable ef fect on the perform ance in burst mo de. The SNSBURST function provides

a possibility to compensate the preset burst level for variations in the boost voltage.

The impedance of the resistor divider determines the amount of comp e ns at ion . Th e

higher the impedance, the stronger the compensation is.

Remarks:

•Note that a very high impedance is more susceptible to disturbance

•The impedance should be hi gher than 20 k to maint ain normal regulation proper ties

on SNSFB and higher than 90 k to prevent disabling the OLP function on SNSFB

•The general advice is to use a total impedance (RBURST1 + RBURST2) of 100 k or

higher

The compensation is obt ained by an internal current source whose curr ent value depends

on the SNSBOOST voltage. This current flows into the SNSBURST pin and gives a

voltage offset, depending on the resistance value of the (external) divider.

Because the SNSBOOST voltage determines the value of the compensation current, the

design of this function provides the nominal calculation value according to the relationship

shown in Figure 40.

3.5 V5.4 VRBURST2

RBURST1 RBURST2

-------------------------------------------------





=

Fig 40. Co mpensation current on SNSBURST

001aal464

1.7

SNSBOOST [V]

Icmp

[μA]

2.5

Application note Rev. 1 — 28 December 2010 53 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The amount of compensation needed to obtain a more constant performance, can be

determined during a few pr actical trials. This should give an indicatio n of the target fo r the

total impedance of the divider.

Example:

Nominal SNSBOOST voltage is 2.5 V with Icmp = 1 A.

The required burst frequency fHB(burst) = 90 kHz which corresponds to SNSFB = 5.4 V.

Best compensation performance found with RBURST1 is approximately 91 k.

(25)

(26)

RBURST2 = 176 k

To obtain a better overview of th e re lat ion sh ip be twe e n SNSBO OS T an d SNSBU RST,

regarding the compensation design, the calculation sheet can used. The sheet provides

more details and the possibility to visualize the result of value variation.

In the calculation sheet, an indicator is calculated on the amount of boost compensation

that is obtained for a certain situation. The indicator gives the change in

burst fr e qu en cy pre se t (abov e wh ich fr eq ue n cy leve l, th e re gu lat ion en ter s bu rs t mo de )

due to the change in boost voltage.

For the given example this indicator amounts to: 72 Hz/V

9.5.3 Advanced design of SNSBURST circuit using a series resistor

VSNSFB 3.5 V RBURST1 Icmp RBURST1 3.5 V

RBURST2

---------------------

++5.4 V==

RBURST1 1 A3.5 V

RBURST2

---------------------





1.9 V=

Fig 41. Designi ng the burst mode leve l us in g a series resistor

019aaa358

3.2 V 8 V

1.5

kΩ

SNSFB

SNSBURST

RBURST1

RBURST2

RSBURST

TEA1613

CONTROL

HOLDHBC 3.5 V

0.1 V

compensation of burst

voltage level by boost voltage

SNSBOOST

SPIKE

FILTER

1.7

SNSBOOST [V]

Icmp

[μA]

2.5

Application note Rev. 1 — 28 December 2010 54 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

An alternative to the basic circuit construction given in Section 9.5.2 is a construction with

an additional series resistance in the connection of SNSBURST (RSBURST).

This construction allows lower impedance values to be used for the resistor divider while

obtaining the same b ehavior for b oost volt age compen sation. The lo wer impe dance has a

positive effect on disturbance pickup, benefiting PCB-layout design. The series resistor

can be placed directly near the SNSBURST pin, thereby minimizing the high-impedance

track.

Example:

Nominal SNSBOOST voltage is 2.5 V with Icmp = 1 A.

The required burst frequency fHB(burst) = 90 kHz which corresponds to SNSFB = 5.4 V.

Impedance t arge t for R BURST1 = 22 k and the result should be th e same as th e exa mple

in Section 9.5.2.

VSNSFB =

(27)

(28)

Choose the value of RSBURST to obtain the same com p en sa tio n as in ex am p le

Section 9.5.2 (indicator gave 72 Hz/V). Because the re lationships are complex, the

calculation tool can be used to vary the RSBURST value to reach this indicator value.

RSBURST = 46 k

RBURST2 = 43 k

Note that for the same compensation (as in the example in Section 9.5.2) the impedance

of the network is much lower.

To obtain a better overview of the relationship between SNSBOOST and SNSBURST and

the effect on impedance of the resistors, regarding the compensation design, the

calculation sheet can used.

9.5.4 Other aspects regarding SNSBURST

Aspects tha t influence choices regarding the d esign of the SNSBURST circuit with respect

to burst mode are:

•Voltage on SNSBOOST at nominal input voltage VBOOST

•SNSFB voltage regulation levels in combin ation with the preset frequency range by

RFMAX and CFMIN

•Dynamic behavior of the regulation during burst mode and during normal operation

(large load variations)

3.5 V RSBURST Icmp RBURST1 Icmp RBURST1

+3.5 V RSBURST Icmp

+

RBURST2

----------------------------------------------------------

++ 5.4 V =

3.5 V RSBURST 1 A22 k1 A22 k

RBURST2

---------------------

+3.5 V RSBURST 1 A+ ++5.4 V =

Application note Rev. 1 — 28 December 2010 55 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.6 Output power - operating frequency characteristics

As can be concluded from Figure 42, the design choice, for a certain SNSFB voltage at

which bursting starts, is critical. With this kind of characteristic there is a risk that, due to

spread, the system can either remain in burst mode or never reach burst-mode operation

at all. The dimensioning of the LLC can be made more suitable for burst mode. The

standard approach is to design the system in such a way that it cannot regulate to

no-load, even at the highest frequency. During the lowest loads, the required frequency

for regulation mu st be co m e infinite. Because the characteristic is mu ch steeper for low

output power, a voltage level can then be chosen easily to make sure that burst mode is

activated at the lowest load and that the remaining load conditions operates in normal

mode. The burst mode now enables the system to operate at no-load.

Fig 42. Typical SNSFB voltage-to-output power characteristic of a converter without

burst mode functional ity

(W)

0 250200100 15050

001aal465

5.4

5.6

5.2

5.8

6.0

SNSFB

(V)

5.0

Fig 43. Example of SNSFB and frequency as functions of output power characteristics (normal mode) adapted

for easy implementation of burst mode comparator level detection

Po (W)

0 1008040 6020

4.8

5.6

6.2

SNSFB

(V)

4.0

Po (W)

0 1008040 6020

001aal466

120

160

200

(kHz)

Application note Rev. 1 — 28 December 2010 56 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.7 Lower SUPHS in burst

During idle time SUPHS is not charged.

During normal operation, each time the half-bridge node HB is switched to ground level,

the SUPHS capacitor is charged by the boots trap function of the external diode between

SUPHS and SUPREG. In burst mode there are p eriods of non-switching, and th erefore no

charging of SUPHS. During this time, the circuit supplied by SUPHS slowly discharges the

supply voltage capacitor. At the moment a new burst starts, the SUPHS voltage is lower

than during normal operation. During the first switching cycles, the SUPHS is re-charged

to its normal level. It is important that, during these first re-charge cycles, SUPREG does

not drop below the protection level of 10.3 V.

9.8 Audible noise

Because the burst mode is normally used when the output power is low, the converted

energy does not contribute much to generate audible noise. The magnetization curre nt

however is still present during low loads and is the dominant energy during burst mode.

Switching on and off the converter sequences continuously at a certain speed and

duration can lead to audible noise. The main mechanism for producing noise is the

interruption of magnetization current sequences leading to a mechanical force. This is

especially the case on the core of the resonant transformer wh ic h starts acting as a

loudspeaker.

When burst mode is applie d at higher ou tput power cond itions, the converted ene rgy also

contributes and leads to an increased chance of audible noise.

9.8.1 Measurements in the resonant transformer construction

To prevent problems with audible noise under specific conditions, it is necessary to adapt

the mechanical transformer construction to allow for this.

One possibility is to adhere the core parts to each other using a material with damping

(vibration abso rbing) properties. A combination can be made with the air gap construction.

Other vibration damping measures can also help when audible noise is a critical issue for

a product.

(1) Left-hand transformer with glue to reduce audible noise

(2) Right-hand transformer has standard construction

Fig 44. Transformer construction

001aal467

Application note Rev. 1 — 28 December 2010 57 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.8.2 Burst power dependent noise level

The amount of audible noise is strongly related to the amount of energy in each burst. At

low output power, the amount of energy is mainly determ ined by the magnetization current

of the resonant converter. The amount of transferred energy is low. To avoid problems

with audible noise, the burst mode should only be used at low power (a few watts output

power). When the transition level between normal mode and burst mode is chosen at a

higher output power, the level of audible noise is larger.

Overshoot on feedback voltage

When the output load is increa se d, the system reverts to normal operat ion. The tr an sition

from burst mode to normal mode is based on the feedback voltage. In certain burst

conditions the feedback voltage can overshoot, keeping the system in burst mode at

higher output po we r level s than inten ded. As th e po we r leve l in th is situation is larg er, the

amount of noise is also larger.

9.9 PFC converter and resonant converter simultaneous bursting

When in burst mode, it is beneficial to stop the PFC operation during the time that the

resonant converter is not switching. In most cases this saves extra energy consumption

by reducing switching losses from the PFC converter.

To control the external PFC, the signal from pin SNSOUT/PFCON can be used.

The behavior of the total system (PFC and resonant) in burst mode may differ from the

situation when only the resonant converter oper ates in burst mode. Although this may

result in good perform a nc e, th er e ar e a nu m be r of inter a ctio ns .

9.9.1 PFC start delay

Depending on the PFC control system there is a certain delay in starting conversion in

burst mode. This de la y is the tim e between SNSOUT/PFCON becoming high and the

PFC starting to switch. This results in a shorter power conver sion time for the

PFC-converter compared to the resonant converter.

9.9.2 PFC output voltage variations

When bursting the PFC converter, the resonant control system determines the timing.

This may result in a situ ation that the PFC cann ot maint ain a const ant ou tput volt age. The

time during which th e PFC can conve rt power is limited by the HBC ope ra tion a nd can be

too short. The result is a lower output voltage or a varying output voltage. This also has

consequences for the re sonant converter as it s input voltage is not the same. The wor king

conditions change towards a new balance.

The resonant converter must be able to remain operational during these conditions.

It is important to check that the resonant controller has not been stopped because the

input voltage provided by SNSBOOST is too low. This may cause an unacceptable

voltage decrease in the output of the resonant converter.

9.9.3 Switching between burst and normal operation

Interaction between the PFC converter an d resonant converter in the burst mode can lead

to a situation whereby the system alternates between burst mode and normal mode for

certain output power conditions.

Application note Rev. 1 — 28 December 2010 58 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

9.9.4 Audible noise during mode transition

Because of the above mentioned interactions, a stable situation can occur during the

following operating modes, alternating in time:

•Resonant burst with short burst time without PFC burst (time too short to start)

•Resonant burst with long burst time and PFC burst

•Normal operation for resonant and PFC bursts

Transitions between modes and variations within a certain mode have a corresponding

effect on audible noise.

9.10 Design guidelines for burst mode operation

Design for a stable PFC (nominal) output voltage during burst mode. When the PFC is

operating in simultaneous burst mode, the issues mentioned in Section 9.9 are important.

Best efficiency is achieved when the number of cycles for each burst is kept to a minim um

(only a few cycles).

Best efficiency is achieved by resistively tuning the comparator circuit to preset the

SNSFB burst level and hysteresis.

System and component tolerances play a significant role in performance variations d uring

production.

The regulation feedback loop can be optimized for normal mode and any additional

filtering can be done in the comparator circuit see Section 9.5.3. However, this should be

used moderately so that control of the situation can be maintained during burst mode

operation.

9.11 Enable/disable burst mode

In microcontroller operated applications such as TV, a clear separation is made between

normal operation and standby operation. To avoid the reso nant conver te r going into bu rst

during short periods of low load during normal operation, an enable/disable function can

be added. This can be implemented by an extra enable/disable switch function in the

comparator circuit.

9.12 Hold HBC and PFC

By switching the SNSBURST input below 3.5 V, the switching of HBC and PFC (by

SNSOUT/PFCON) can be stopped immediately. Releasing the pin voltage resumes the

operation (without soft-start) on the regulation point of that moment. For certain external

protection pr oc ed ur e s, this hold-function can be useful.

9.13 Unused burst mode

By connecting SNSBURST to a fixed voltage higher than 3.5 V (but below the limiting

value of +12 V), the burst mode function is not activated. For example, SNSBURST can

be connected to SUPREG.

Application note Rev. 1 — 28 December 2010 59 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10. Protection functions

Most protection functions are di scussed in the sections of the systems of which they are a

part. In the overview Table 3, links to the corresponding place s in this document are given.

In the following paragraphs the remaining, more independent, protection functions are

discussed.

10.1 Protection overview

10.2 IC protection

10.2.1 OverTemperature Protection (OTP)

The TEA1613T contains an accurate internal OverTemperature Protection (OTP). When

the junction temperature exceeds the overtemperature level of 140 C, the IC goes to the

thermal hold state. The thermal hold state is left as soon as the temperature has dropped

by 10 C.

The circuit resumes operation with a complete restart including a soft-start.

10.2.2 Latched protection

Only an OVP detection on SNSOUT/PFCON, leads to a latched shutdown protection

state. To initiate this, the voltage on SNSOUT/PFCON must exceed 3.5 V.

Resetting a latched protection shutdown state

When a latched protection shutdown state has occurred this state is reset by one of the

following actions:

•SUPIC drops below 7 V and SUPHV is lower than 7 V

•SSHBC/EN is pulled below 2.2 V (enable level)

Table 3. Overview of protection functions with links

Part Symbol Protection Action Link

IC UVP-SUPIC undervoltage protection SUPIC IC disable 6.2.2

IC UVP-SUPREG undervoltage protection SUPREG IC disable 6.5

IC UVP supplies undervoltage protection supplies IC disable and reset 6.2.2

IC SPC-SUPIC short-circuit protection SUPIC low HV start-up current 6.2.2

IC OVP output overvoltage protection output IC shutdown 10.3.1

IC UVP output undervoltage protection output IC restart after protection time 10.3.2

IC OTP overtemperature protection IC disable 10.2.1

HBC UVP-boost undervoltage protection boost HBC disable 8.1

HBC OLP-HBC open-loop protection HBC IC restart after protection time 8.5.1

HBC HFP-HBC high fre quency protection HBC IC restart after protection time 8.4.4

HBC OCR-HBC overcurrent regulation HBC HBC increase frequency

IC restart after protection time 8.7.1

HBC OCP-HBC overcurrent protection HBC HBC step to maximum frequency 8.7.2

HBC CMR capacitive mode regulation HBC increase frequency 8.3.2

HBC ANO adaptive non-overlap HBC prevent hazardous switching 8.3.1

Application note Rev. 1 — 28 December 2010 60 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

A possible reset by external control (for example microcontroller) is available using the

SSHBC/EN function.

10.3 SNSOUT/PFCON protection

10.3.1 OverVoltage Protection (OVP) output

The TEA1613T has overvoltage protection intended for monitoring the HBC output

voltage. It is one of the functions that is combined on the SNSOUT/PFCON pin.

10.3.1.1 Auxiliary winding

When dealing with a mains insulate d converter, the HBC output voltage ca n be measured

via the auxiliary winding of the resonant transformer. To accurately measure the

secondary voltage of the primary circuit auxiliary winding, a special transformer

construction is needed.

To facilitate correct working, it is important that this winding has a good coupling with the

secondary winding(s) and a minimum coupling with the primary winding. In this way a

good representation is obtained of the output voltage situation. For more details refer to

Section 6.3.3.1 and Figure 6.

To meet the mains insulation requirement s, triple insulated wire can be used.

10.3.1.2 Principle of operation

The voltage is sensed at the SNSOUT/PFCON pin via an external rectifie r an d re sist ive

divider. Overvoltage is detected when the SNSOUT/PFCON voltage exceeds 3.5 V. After

detecting OVP the TEA1613T goes to the latched protection shutdown state.

10.3.1.3 Connecting external measurement circuits

When latched protection is needed for other detection circuits, it can be added on

SNSOUT/PFCON by means of a series diode. For example: external overtemperature

protection.

Fig 45. SNSOUT protection

001aal468

100 μA

1.5 V

SNSOUT/PFCON

SUPREG

Vaux

TEA1613

OVP

latched shutdown 3.5 V

COMP

UVP

protection timer 2.35 V

COMP

Application note Rev. 1 — 28 December 2010 61 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10.3.2 UnderVoltage Protection (UVP) output

The TEA1613T has undervoltage protection intended for monitoring the HBC output

voltage. It is one of the functions that is combined on the SNSOUT/PFCON pin.

10.3.2.1 Auxiliary winding

When dealing with a mains insulate d converter, the HBC output voltage ca n be measured

via the auxiliary winding of the resonant transformer. To accurately measure the

secondary voltage of the primary circuit auxiliary winding, a special transformer

construction is needed.

To facilitate correct working, it is important that this winding has a good coupling with the

secondary winding(s) and a minimum coupling with the primary winding. This is to obtain

a good representation of the output voltage situation. For more details refer to

Section 6.3.3.1 and Figure 6.

To meet the mains insulation requirement s, triple insulated wire can be used.

10.3.2.2 Principle of operation

The voltage is sensed at the SNSOUT/PFCON pin via an external rectifie r an d re sist or

divider . Undervoltage is detected when the SNSOUT/PFCON voltage drops below 2.35 V.

When detecting UVP the TEA1613T starts the protection timer by charging it with 100 A.

When the undervoltage state remains until the timer reaches the protection level, the

controller stops and is then re-started by the restart timer.

At start-up, the SNSOUT/PFCON voltage normally starts at a level lower than 2.35 V. To

prevent undesired protection during start-up, the timer setting must allow sufficient time

for start-up to charge the SNSOUT/PFCON voltage to a value above 2.35 V.

In applications where the TEA1613T is supplied from an auxiliary winding (to SUPIC), the

SUPIC monitoring can also activate a protection when an error condition resul ts in a drop

of the output voltage (see Section 6.2.2).

10.3.2.3 Connecting external measurement circuits

When re-start protection is required for another detection circuit, it can be added to

SNSOUT/PFCON by means of a series diode. An example of external temperature

protection is given in Figure 45.

10.3.3 OVP and UVP combinations

10.3.3.1 Circuit configurations

The following list contains examples of configurations for which certa in functionality on the

SNSOUT/PFCON pin is disabled .

•OVP functional and UVP disabled (refer to Section 10.3.3.2)

•UVP functional and OVP disabled (refer to Section 10.3.3.3)

•Both OVP and UVP disabled (refer to Section 10.3.3.4)

Note that in the examples given in the referenced sections, the PFCON signal can still be

generated for burst mode operation.

Application note Rev. 1 — 28 December 2010 62 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10.3.3.2 OVP functionality and UVP disabled

In some applications it may be required to prevent the activation of the UVP on

SNSOUT/PFCON. To achieve this, it is necessary to disable UVP. This can be realized by

adding a circuit that prevents the voltage on SNSOUT from dropping below 2.35 V.

Practical example

The volt age on SNSOUT/PFCON can be prevent ed from droppin g below a preset vo ltag e

by externally adding a lo w impedance resistor divider , with a fixed vo ltage, and connecting

it to SNSOUT/PFCON via a diode. This simple circuit is not very accurate but it does

provide the basic capability to disable the UVP function of SNSOUT/PFCON. Note that

higher voltages on SNSOUT/PFCON are blocked by the diode so that the OVP is still

functional.

10.3.3.3 UVP functionality and OVP disabled

In some applications it may be required to prevent the activation of the OVP on

SNSOUT/PFCON. To achieve this, it is necessary to disable OVP. This can be realized by

adding a circuit that prevents the voltage on SNSOUT/PFCON from exceeding 3.5 V.

Practical example

The voltag e on SNSOUT/PFCON can be pr evented fro m exceeding the pres et volt age by

externally adding a low impedance resistor divider, with a fixed voltage, and connecting it

to SNSOUT/PFCON via a diode denoted by (1) in Figure 47. This simple circuit is not very

accurate but it does provide the basic capability to disable the OVP function of

SNSOUT/PFCON. Note that lower voltages on SNSOUT/PFCON are blocked by the

diode so that the UVP is still functional.

Another possibility is to add a Zener diode function on SNSOUT/PFCON to limit the

voltage on this pin denoted by (2) in Figure 47.

Fig 46. Example of disablin g the UVP function of SNSOUT/PFCON

001aal469

100 μA

1.5 V

SNSOUT/PFCON

SUPREG = 10.9 V

8.2 kΩ

3.3 kΩ

1N4148

Vaux

TEA1613

OVP

latched shutdown 3.5 V

COMP

UVP

protection timer 2.35 V

COMP

Application note Rev. 1 — 28 December 2010 63 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10.3.3.4 Both OVP and UVP disabled

When neither OVP or UVP functionality is required, a fixed voltage between 2.35 V and

3.5 V can be applied to SNSOUT. This can be obtained from a resistor divider that is

referenced to the SUPREG.

10.3.3.5 UVP during burst mode operation

When the system is in burst mode operation, the undervoltage protection is not active

while switching is off. This is to prevent incorrect protection du ring this interval. As soon as

switching is resumed, the UVP protection becomes active again.

Fig 47. Example of disabling the OVP func tion of SNSOUT/PFCON

001aal470

100 μA

1.5 V

SNSOUT/PFCON

SUPREG = 10.9 V

8.2 kΩ

2.7 kΩ

1N4148

(1)

(2)

Vaux

TEA1613

OVP

latched shutdown 3.5 V

COMP

UVP

protection timer 2.35 V

COMP

Fig 48. Example of disabling both the UVP and the OVP functions of SNSOUT/ P FCON

001aal471

100 μA

1.5 V

SNSOUT/PFCON

SUPREG = 10.9 V

91 kΩ

33 kΩ

OVP

latched shutdown 3.5 V

COMP

UVP

protection timer 2.35 V

COMP

TEA1613

Application note Rev. 1 — 28 December 2010 64 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10.4 Protection timer

The TEA1613T has a programmable timer that is used for the timing of several forms of

protection. The timer is basically used in two ways:

•As a protection timer - the time that an error exists before the system stops operation

•As a restart timer - the time between stopping and restarting operation

The values for both types of timer can be independently preset by an external re sistor and

capacitor connected to RCPROT.

10.4.1 Block diagram of the RCPROT function

10.4.1.1 RCPROT working as protection timer

Figure 50 demonstrates the operation of the protection timer. When an error condition

occurs, a fixed current of 100 A flows from the RCPROT pin and charges the external

capacitor. Due to the external resistor, the voltage rises expon entially. The protection time

Fig 49. Block diagra m of the RCPRO T fun c tion

001aal472

RCPROT

2 mA 100 μA

CONTROL

COMP 4 V

0.5 V

TEA1613

COMP

Fig 50. RCPRO T protection timer operation

passed

none

present

short

error long

error repetitive

error

4 V

100 μA

IRCPROT

Error

VRCPROT

Protection time

001aal473

Application note Rev. 1 — 28 December 2010 65 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

is passed when the upper switching level of 4 V has been reached. At that moment, the

appropriate protective action is executed, the current source is stopped and RCPROT is

discharged by the external resistor.

In the case that the err or co nditio n e nds before 4 V has b ee n rea ched, the curre nt source

is stopped and the pin discharges through the external resistor and no further action is

taken.

If the error conditio n is per m an ent, the system fluctuates between stopping

(RCPROT = 4 V) and restarting (RCPROT = 0.5 V). This is sometimes referred to as a

hiccup mode.

The protection timer is activated by one of the following :

•overcurren t re gu lation SN SCUR HBC

•high frequency pr ot ec tio n RF MAX

•open loop protection SNSFB

•undervoltage protection SNSOUT/PFCON

Protection can be forcibly activa te d (in cludin g restart) by increasing the RCPROT voltage

to above 4 V (but not higher than +12 V) using an external circuit.

10.4.2 RCPROT working as a restart timer

During certain error cond itio ns , it may be de sira b le to te mp o rarily dis ab le th e IC. This is

especially useful when an error can over-heat components. A temporary disable allows

power supply components to cool down, after which the IC must automatically restart. The

time to restart is determined by the restart timer.

Normally, the capacitor is discharged to 0 V. When an error occurs, C prot is charged and it

operates as a protection timer until it reaches the upper switching level of 4 V. After this,

the RCPROT pin becomes high ohmic and the external resistor discharges the external

capacitor . The restart time is exceeded when the lower switching level of 0.5 V is reached.

At that moment, the IC is restarted and the RCPROT pin is further discharged.

Fig 51. RCPROT operating as a restart timer

passed

0 V

0.5 V

yes

long

error

4 V

error

001aal064

VRCPROT

restart time

Application note Rev. 1 — 28 December 2010 66 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

10.4.3 Dimensioning the timer function

The required restart time trestart determines the time constant tRCPROT made by th e values

of R and C.

(29)

With this time constant and the required protection time tprotection, the value of R and C can

be calculated as follows:

(30)

(31)

Example:

trestart = 500 ms;

tprotection = 30 ms;

tRCPROT = 240 ms;

R = 341 k;

C = 705 nF.

tRCPROT t–restart

1n Vlow RCPROT

Vhigh RCPROT

-----------------------------------



------------------------------------------------t–restart

1n 0.5

-------



--------------------0.48 trestart

===

RVhigh RCPROT

Islow RCPROT

tprotection

tRCPROT

------------------------

–

–

-------------------------------------------------------------------------------4 V

100 A1e

tprotection

tRCPROT

------------------------

–

–

---------------------------------------------------------------

CtRCPROT

--------------------

Application note Rev. 1 — 28 December 2010 67 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

11. Miscellaneous advice and tips

11.1 PCB layout

11.1.1 Grounding

SGND + PGND must be connected directly under the IC (in ground plane if possible) to

avoid false signal detection by driver current distur bance (see Figure 54).

A star grounding construction provides the lowest risk of mu tual converter disturbance or

signal detection disturbance. In this system, the centr al star point can be chosen at the

VBOOST capacitor ground.

Large currents should be avoided on grounding tracks that are intended for signal

measurement.

11.1.2 Large current loops

Fig 52. Ground stru cture and current loops in an application with PFC

001aal474

TEA1613

mains

voltage

PFC

Vboost

HBC

PGND GATELS

Application note Rev. 1 — 28 December 2010 68 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

11.1.3 Ground layout example

11.1.4 Miscellaneous

Connecting SNSCURHBC pin 15

Place a series resistor in the SNSCURHBC connection as close as possible to pin 15.

This is import ant fo r avoid ing distu rbance pi ckup. Also avoid capacitive coupling between

the connection to pin 15 and the HB track (to pin 13) that contains high dV/dt signals.

CFMIN pin 17 (and RFMAX pin 18)

Connect the oscillator capacitor on CFMIN from pin 17 to SGND pin 16 with short tracks to

prevent pickup of disturbances by an external field. Although less critical, a similar

construction can be used for RFMAX.

Fig 53. Ground layout example with star point at the boost capacitor

001aal475

Application note Rev. 1 — 28 December 2010 69 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

SNSBURST (pin 3)

If a high-impedance value is chosen for the resistor divider on SNSBURST, the

connecting tracks of the resistors should be kept short to avoid disturbance (refer to

Section 9.5.2 and Section 9.5.3).

11.2 Starting/debugging partial circuits

When starting a newly built application for the first time or when an error is observed

during operation, it is possible to activate parts of the circuit step by step. This enables

errors to be located more easily and an evaluation to be performed under conditions that

restrict influences from other circuit parts.

The following list provides a step-by-step sequence for debugging:

1. IC only, with protection disabled

2. HBC with protection disabled and variable DC input voltage

3. HBC with protection enabled

The best approach is to check the HBC converter first with external supplies for SUPIC

and VBOOST.

Fig 54. PCB layout connecting SGND, PGND, CFMIN, RFMAX and SNSCURHBC

001aal476

CFMINRFMAX Rcc C

SUPHS

1 SNSOUT/PFCON

2 SNSFB

3 SNSBURST

4 SNSBOOST

5 SUPIC

7 SUPEG

8 GATELS

TEA1613

9 NC

10 SUPHV

RCPROT 20

SSHBC/EN 19

CFMIN 17

RFMAX 18

SNSCURHB 15

NC 14

HB 13

SUPHS 12

GATEHS 11

CFMINRFMAX Rcc C

SUPHS

1 SNSOUT/PFCON

2 SNSFB

3 SNSBURST

4 SNSBOOST

5 SUPIC

7 SUPEG

8 GATELS

TEA1613

9 NC

10 SUPHV

RCPROT 20

SSHBC/EN 19

CFMIN 17

RFMAX 18

SNSCURHB 15

NC 14

HB 13

SUPHS 12

GATEHS 11

CFMINRFMAX Rcc C

SUPHS

1 SNSOUT/PFCON

2 SNSFB

3 SNSBURST

4 SNSBOOST

5 SUPIC

7 SUPEG

8 GATELS

TEA1613

9 NC

10 SUPHV

RCPROT 20

SSHBC/EN 19

CFMIN 17

RFMAX 18

SNSCURHB 15

NC 14

HB 13

SUPHS 12

GATEHS 11

1 SNSOUT/PFCON

2 SNSFB

3 SNSBURST

7 SUPREG

8 GATELS

TEA1613

9 NC

10 SUPHV

RCPROT 20

SSHBC/EN 19

RFMAX 18

NC 14

HB 13

SUPHS 12

GATEHS 11

6 PGND

SGND 16

4 SNSBOOST

5 SUPIC

CFMIN 17

SNSCURHB 15

Application note Rev. 1 — 28 December 2010 70 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

11.2.1 HBC only

A proposal for the setup (temporary additions to the existing application to force

operation) and the sequence for disabling/enabling the different functions is given in

Figure 55. A moderate (current) load can be applied to the converters output to ascert ain

the correct functioning.

Start:

1. 25 V external supply on SUPIC by series diode

2. 3 V on SNSBOOST to enable

3. RCPROT to ground to disable protection timer

4. SNSCURHBC to ground to disable OCP

–step A: increase the HBC input voltage (VBOOST)

–step B: enable SNSCURHBC

–step C: enable RCPROT

Be aware that a latching, overvoltage detection on SNSOUT (>3.5 V), can still prevent

operation.

CFMIN, GATELS, GATEHS and HB can be monitored to continuously assess the

functioning of the converter/controller.

Practical tip: When an external PFC function is disabled, VBOOST can often be applied by

simply applying a DC or AC voltage to the mains input connections.

Check the regulation by increasing the input voltage VBOOST for the following situations:

1. Initially at VBOOST = 0 V, the running frequency is low with a short on-time and a long

off-time. This is due to the HB detection not working properly at low voltage and the

internal slope detection (HB) not detecting a proper (fast) slope.

2. Increasing the value of VBOOST, at a certain input voltage the HB detection works

correctly and th e fre q uency to drive maximum power, is minimal. If the HB slope

remains slow, the output current is probably low. Increasing the output current

probably results in proper HB switching.

3. When the VBOOST input voltage ha s reached a level closer to the nominal working

voltage, the correct output voltage is reached (depending on the output load), and

regulation starts working. This results in increasing the frequency with increasing the

input voltage until the nominal working voltage of VBOOST is set.

4. When the basic functioning of the HBC is working well including SNSFB regulation,

protections can be added one by one. Proper functioning or a need for change can be

evaluated.

5. When a self-supplying application is used, the external supply voltage can be

removed as soon as the system works well at nominal VBOOST voltage. The system

should now be able to start with the internal high voltage start-up supply and an

auxiliary winding can take over the SUPIC supply.

Remark: If, during debugging or starting, a protection has been activated, it may be

necessary to switch the SUPIC supply off and on to reset a latched protection state.

Application note Rev. 1 — 28 December 2010 71 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 55. Start-up and debugg in g ste p-by-step

Vext = 25 VDC

Vext = 3 VDC

Vext = 0 VDC

external

SUPIC

supply

enable

operation by

SNSBOOST

disable

protection

timer

disable

over current

sensing

apply non-

protection

sense voltage

(if needed)

SNSOUT/PFCON 120

RCPROT

TEA1613

SNSFB 219

SSHBC/EN

SNSBURST 318

RFMAX

SNSBOOST 417

CFMIN

SUPIC 516

SGND

PGND 615 SNSCURHBC

SUPREG 714

n.c.

GATELS 813

n.c. 912

SUPHS

SUPHV 10 11 GATEHS

Vext = 25 VDC

Vext = 3 VDC

external

SUPIC

supply

enable

operation by

SNSBOOST

disable

protection

timer

disable

over current

sensing

apply non-

protection

sense voltage

(if needed)

SNSOUT/PFCON 120

RCPROT

TEA1613

SNSFB 219

SSHBC/EN

SNSBURST 318

RFMAX

SNSBOOST 417

CFMIN

SUPIC 516

SGND

PGND 615 SNSCURHBC

SUPREG 714

n.c.

GATELS 813

n.c. 912

SUPHS

SUPHV 10 11 GATEHS

Vext nominal

enable

over current

sensing

enable

protection

timer

Vext = 25 VDC

Vext = 3 VDC

external

SUPIC

supply

enable

operation by

SNSBOOST

disable

protection

timer

apply non-

protection

sense voltage

(if needed)

SNSOUT/PFCON 120

RCPROT

TEA1613

SNSFB 219

SSHBC/EN

SNSBURST 318

RFMAX

SNSBOOST 417

CFMIN

SUPIC 516

SGND

PGND 615 SNSCURHBC

SUPREG 714

n.c.

GATELS 813

n.c. 912

SUPHS

SUPHV 10 11 GATEHS

Vext = 25 VDC

Vext = 3 VDC

external

SUPIC

supply

enable

operation by

SNSBOOST

apply non-

protection

sense voltage

(if needed)

SNSOUT/PFCON 120

RCPROT

TEA1613

SNSFB 219

SSHBC/EN

SNSBURST 318

RFMAX

SNSBOOST 417

CFMIN

SUPIC 516

SGND

PGND 615 SNSCURHBC

SUPREG 714

n.c.

GATELS 813

n.c. 912

SUPHS

SUPHV 10 11 GATEHS

Vext nominal

enable

over current

sensing

Vext nominal

001aal477

Application note Rev. 1 — 28 December 2010 72 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

The following list provides an association between pins and the protection st ates for which

they are being monitored:

•SSHBC/EN: When the TEA1613T lowers the voltage to this pin, it indicates a

protection with correction to high frequency. This is often caused by OCR/OCP.

•RFMAX: The voltage level on RFMAX indicates the oscillator frequency, which may

cause a high freq uen cy pr ote ct i on whe n th e voltage level is high er tha n 1. 8 V.

•CFMIN: No proper detection of HB- slope or a possible cap acitive mod e detection can

be observed by a (partially) slow oscillator signal.

•PGND and SGND: If the TEA1613T detects HB operation while there is zero input

voltage, it indicates that the connection between these pins, directly at the IC, is not

present. Gate currents lead to false HB slope detection.

•SNSCURHBC: Any disturbances on this pin (voltage spikes) can lead to an increase

of frequency while the original measurement voltage/signal is ok.

•SNSOUT/PFCON: The voltage on this pin should be betw ee n 2. 35 V and 3. 5 V for

normal operation. To avoid protection, a voltage can be forced on it. But often it is

related (by a resistor divider) to the SUPIC and is cor rect when SUPIC is supplied

externally.

•RCPROT: Several protection functions can charge the timer.

Fig 56. Typical signals during a sep arate HBC start-up for an increase in Vboost

Vboost = 100 V

HB slope is too slow for proper

detection -> High frequency

running

Increase output current -> HB slope

is fast enough for proper detection

-> Low frequency running by

"normal" SNSFB regulation

Vboost = 0 V

Vboost = 300 V

Vboost = 40 V Vboost = 60 V

GATEHS

GATELS

CFMIN

GATEHS

GATELS

CFMIN

GATEHS

GATELS

CFMIN

Vboost = 100 V

Vboost = 395 VVboost = 350 V

001aal478

Application note Rev. 1 — 28 December 2010 73 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

12. Application examples and topologies

12.1 Example of IC evaluation and test setup

An example of a test/evaluation setup is provide d in Figure 57. This setu p can b e used to:

•check if an IC is still functional (not defective)

•evaluate specific IC function(s ) or pin properties with limited interference from the tota l

system

Fig 57. Example of a ba sic IC test setup on a single low voltage supply (24 V)

019aaa264

SUPIC

EXT. SUPPLY

SNSOUT/PFCON

ON/OFF

SNSFB

SNSBURST

SNSBOOST

SUPIC

PGND

SUPREG

GATELS

180 kΩ

0 Ω

2 kΩ

10 kΩ

4.7 kΩ

200 Ω

620 kΩ

24 kΩ

300 kΩ

82 kΩ

47 kΩ

1 kΩ10 kΩ

4.7 nF 1 F

47 nF

470 pF

24 kΩ

all off

330 kΩ

100 μF

4.7 μF

470 nF

TEA1613

SUPHV

RCPROT

SSHBC/EN

RFMAX

CFMIN

SGND

SNSCURHBC

NC n.c.

SUPHS

GATEHS

SUPIC

11n.c.

15 nF

100 μF

330 nF

470 pF

1 F

100 μH

1 Ω

BYV27-400 04N60C3

04N60C3

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Application note Rev. 1 — 28 December 2010 74 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

12.2 Example of a 250 W LCD-TV application

Fig 58. Example of a 250 W LCD-TV application (part 1)

019aaa265

CN101

Isense

Icomp

GND

Freq

Vsense

Vcc

Gate

VCC_PF

Vcomp

C102

2.2 nF L101 L102

2 mH 9 mH

C103

0.22 μFC111

0.47 μF

C113

0.47 μFC105

0.1 μFC109

220 pF

C110

220 μF

420 V

R108

33 kΩ

C106

1 μF

C104

1 nF

C112

0.47 μF

R103

110 Ω

R105

0.33 Ω

1 W

R106

0.33 Ω

1 W

R107

0.33 Ω

1 W

R115

3.9 MΩ

D104

1N4007 IC101

ICE1PCS02

R116

3.9 MΩ

BD101

GBU806

R101

2 MΩ

R102

2 MΩ

FUSE F101

6.3AT

C101

2.2 nF

R104

120 kΩ

R114

20 kΩ

R113

820 kΩ

R112

750 kΩ

R110

10 kΩ

C108

0.1 μFC107

47 μFZD101

20 V

R120

47 Ω

R109

10 Ω

D103

1N4148

L103

800 μHD102

BYC10-600

Q101

SPW21N50C3

D101

1N5408

VBUS

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Application note Rev. 1 — 28 December 2010 75 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 59. Example of a 250 W LCD-TV application (part 2)

019aaa268

SUPHS

n.c.

SUPREG

VBUS

395 V

SNSBOOST

24V_8A

SNSCURHB

C312

330 nF

C301

100 pF

C302

100 pF

R356

51 Ω

D355

1N4148 Q301

12N50C3

Q302

12N50C3

R357

100 kΩ

R132

4.7 MΩ

R135

62 kΩ

R133

4.7 MΩ

R134

51 kΩ

R355

10 Ω

R352

51 Ω

D351

1N4148

D365

BAS316

R353

100 kΩ

R310

8.2 Ω

R361

51 kΩ

R362

n.m.*

R351

10 Ω

C326

560 nF

C328

10 nF

C308

680 nF

C306

680 nF C304

220 μF

R366

39 kΩ

C300

10 μF

C321

10 nF C365

150 nF

C310

47 nF

C345

2.2 nF

C313

1000 μFC314

1000 μFC315

1000 μF

L301

0.9 μH

C316

1000 μFC317

1000 μFC318

n.m.

C309

1 nF

C322

2.2 μFIC301

TEA1613

R302

150 kΩ

C305

330 pF

R301

1 kΩ

R303

47 kΩ

D312

UF4007

GATEHS

SNSCURHBC

SGND

CFMIN

RFMAX

SSHBC/EN

RCPROT

n.c.

GATELS

SUPREG

SUPHV

PGND

SUPIC

SUPREG

SNSBOOST

34:4:2:2:2:2

SNSCURHB

34T

T301

LP3925

SUPIC

SNSBOOST

SNSBURST

SNSFB

SNSOUT

PFCON

R304

R358

R360

R361

R362

0 Ω

47 kΩ

n.m.

51 kΩ

n.m.

47 kΩ

n.m.

24 kΩ

51 kΩ

1 MΩ

Mode Normal Burst

R358

47 kΩ

R365

270 kΩ

D303

SBL2060CT

D306

SBL2040CT

D304

SBL2060CT

IC302

LTV817B-S

D305

SBL2040CT

R304

0 Ω

R360

n.m.* C319

1000 μFC320

1000 μF

12V_4A

L302

0.9 μH

R320

2.7 kΩ

R323

2.7 kΩ

IC303

TL431

C323

47 nF

R317

1.8 kΩ

R314

82 kΩ

R313

10 kΩ

R316

200 kΩ

C325

2.2 nF

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Application note Rev. 1 — 28 December 2010 76 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 60. Example of a 250 W LCD-TV application (part 3)

019aaa267

D201

1N4007

D202

1N4148

ZD201

30 V

C206

1.5 nF R206

100 Ω

D204

SBL1040CT

T201

C201

2.2 nF

C215

220 pF

C202

47 μF

C209

470 μF

C213

47 nF

C401

2.2 nF

IC203

TL341

C212

22 nF

R213

5.1 kΩ

R215

1.5 kΩ

R216

R118

n.m.

VCC_STBY

SUPIC

VCC_STBY

VBUS

IC202

LTV817B-S R218

47 kΩ

R219

47 kΩ

C210

470 μF

L201

0.9 μH

C211

470 μF

5V_2A

R201

510 kΩ

R203

4.7 Ω

R237

12 kΩ

C206

10 nF

R206

5.1 kΩ

R217

1 Ω

R204

75 kΩ

IC201

TEA1623P

Drain

n.c.

Source

Aux

Vcc

GND

REG

IC302

LTV817B-S

VCC_PFC

VCC_STBY

+5 V

SUPIC

Q318

BC807-40

Q341

BC817-40

R346

1.5 kΩ

R347

150 Ω

SW301

STBY

R318

1.5 kΩ

R319

82 Ω

R343

1.5 kΩ

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Application note Rev. 1 — 28 December 2010 77 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 61. Overview of the functions in the circuit diagram of the TEA1613T application

019aaa266

SUPHS

n.c.

SUPREG

VBUS

395 V

SNSBOOST

24V_8A

SNSCURHB

EN softstart

time

preset

oscillator

and

frequency

range preset

optional compensation

of OCR+OCP for input

voltage variations

bootstrap

function for

high side

driver supply

optional circuit to limit

gate drive current

optional circuit to limit

gate drive current

preset of

RC-timer

C312

330 nF

C301

100 pF

C302

100 pF

R356

51 Ω

D355

1N4148 Q301

12N50C3

Q302

12N50C3

R357

100 kΩ

R132

4.7 MΩ

R135

62 kΩ

R133

4.7 MΩ

R134

51 kΩ

R355

10 Ω

R352

51 Ω

D351

1N4148

D365

BAS316

R353

100 kΩ

R310

8.2 Ω

R361

51 kΩ

R362

n.m.*

R351

10 Ω

C326

560 nF

C328

10 nF

C308

680 nF

C306

680 nF C304

220 μF

R366

39 kΩ

C300

10 μF

C321

10 nF C365

150 nF

C310

47 nF

C345

2.2 nF

C313

1000 μFC314

1000 μFC315

1000 μF

L301

0.9 μH

C316

1000 μFC317

1000 μFC318

n.m.

C309

1 nF

C322

2.2 μFIC301

TEA1613

R302

150 kΩ

C305

330 pF

R301

1 kΩ

R303

47 kΩ

D312

UF4007

GATEHS

SNSCURHBC

SGND

CFMIN

RFMAX

SSHBC/EN

RCPROT

n.c.

GATELS

SUPREG

SUPHV

PGND

SUPIC

SUPREG

SNSBOOST

34:4:2:2:2:2

SNSCURHB

34T

T301

LP3925

SUPIC

SNSBOOST

SNSBURST

SNSFB

filtering disturbance

burst mode

configuration

primary

current

sensing:

OCR/OCP

coils to reduce

output ripple

input voltage sensing

''brown out''

optional

capacitors to

smoothen

transitions

measuring output

voltage on OVP and UVP output voltage sensing and regulation

with a typical TL431 and optocoupler

contruction

SNSOUT

PFCON

R304

R358

R360

R361

R362

0 Ω

47 kΩ

n.m.

51 kΩ

n.m.

47 kΩ

n.m.

24 kΩ

51 kΩ

1 MΩ

Mode Normal Burst

R358

47 kΩ

R365

270 kΩ

D303

SBL2060CT

D306

SBL2040CT

D304

SBL2060CT

IC302

LTV817B-S

D305

SBL2040CT

R304

0 Ω

R360

n.m.*

C319

1000 μFC320

1000 μF

12V_4A

L302

0.9 μH

R320

2.7 kΩ

R323

2.7 kΩ

IC303

TL431

C323

47 nF

R317

1.8 kΩ

R314

82 kΩ

R313

10 kΩ

R316

200 kΩ

C325

2.2 nF

Application note Rev. 1 — 28 December 2010 78 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

13. Abbreviations

Table 4. Abbreviations

Acronym Description

ADT Adaptive Dead Time

BCD Bip olar CMOS DMOS

CMR Capacitive Mode Regulation

EMC ElectroMagnetic Compatibility

EMI ElectroMagnetic Interference (or Immunity)

HB Half-Bridge

HBC Ha lfBridge Converter (or Controller)

HFP High-Frequency Protection

HV High Voltage

IC Integrated Circuit

LCD Liquid Crystal Display

LLC Resonant converter (Lm + Lr + Cr in series)

NTC Negative Temperature Coefficient

OCP OverCurrent Protection

OCR OverCurrent Regulation

OLP Open Loop Protection

OTP OverTemperature Protection

OVP OverVoltage Protection

PCB Printed-Circuit Board

PFC Power Factor Converter/Controller

PWM Pulse-Width Modulation

SCP Short-Circuit Protection

SOI Silicon-On-Insulator

UVP UnderVoltage Protection

Application note Rev. 1 — 28 December 2010 79 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

14. Legal information

14.1 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

14.2 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ ag gregate and cumulative l iability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semicondu ctors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suit able for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modificat i on.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors pr oducts, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with t heir

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for th e customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

Evaluation products — This product is provided on an “as is” and “with all

faults” basis for eval uation purposes only. NXP Semiconductors, its affiliates

and their supplie rs expressly disclaim all warrant ies, whether express, impl ied

or statutory, including but not limited to the implied warranties of

non-infringement, mercha ntability and fitness for a particular purpose. The

entire risk as to the quality, or arising out of the use or performance, of this

product remains with customer.

In no event shall NXP Semiconductors, it s aff iliates or thei r suppliers be liable

to customer for any special, indirect, consequ ential, punitive or incidental

damages (including without li mit ation d amages for l oss of bu siness, bu siness

interruption, loss of use , loss of data or information, and the like) arising out

the use of or inability to use the product, whet her or not based on tort

(including negligence), st rict liability, breach of contract, breach of warrant y or

any other theory, even if advised of the possibility of such damages.

Notwithstanding any damages that customer might incur for any reason

whatsoever (including without limitation, all damages referenced above and

all direct or general damages), the entire liability of NXP Semiconductors, its

affiliates and their suppliers and customer’s exclusive remedy for all of the

foregoing shall be limited to actual damages incurred by customer base d on

reasonable reliance up to the greater of the amount actually paid by customer

for the product o r five dollars (U S$5.00). The for egoing limita tions, exclusions

and disclaimers shall apply to the maximum extent permitt ed by applicable

law, even if any remedy fails of its essential purpose.

14.3 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

Application note Rev. 1 — 28 December 2010 80 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

15. Tables

Table 1. Pinning overview . . . . . . . . . . . . . . . . . . . . . . . .6

Table 2. TEA1613T driver specifications . . . . . . . . . . . .27 Table 3. Overview of protection functions with links . . . 59

Table 4. Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 78

16. Figures

Fig 1. Basic application diagram TE A1613T . . . . . . . . . .9

Fig 2. TEA1613T with application block diagram

(part 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Fig 3. TEA1613T with application block diagram

(part 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Fig 4. Basic overview internal IC supplies . . . . . . . . . . .12

Fig 5. Block diagram: SUPIC and SUPREG start-up

with SUPHV and auxiliary supply. . . . . . . . . . . . .14

Fig 6. Auxiliary winding on primary side (left) and

secondary side (right) . . . . . . . . . . . . . . . . . . . . .15

Fig 7. Position the auxiliary winding for good output

coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Fig 8. Typical SUPREG voltage characteristics

for load and temperature . . . . . . . . . . . . . . . . . . .18

Fig 9. Block diagram of internal SUPREG regulator . . .19

Fig 10. Simplified model of MOSFET drive . . . . . . . . . . .19

Fig 11. Typical application of SUPHS . . . . . . . . . . . . . . .21

Fig 12. GATELS and GATEHS drivers. . . . . . . . . . . . . . .25

Fig 13. Examples of gate circuits . . . . . . . . . . . . . . . . . .26

Fig 14. Simplified model of a MOSFET drive. . . . . . . . . .2 7

Fig 15. SNSBOOST function. . . . . . . . . . . . . . . . . . . . . .28

Fig 16. Inductive mode HBC switching . . . . . . . . . . . . . .30

Fig 17. Adaptive non-overlap switching during

normal operating conditions. . . . . . . . . . . . . . . . .31

Fig 18. Capacitive mode HBC switching . . . . . . . . . . . . .32

Fig 19. Capacitive/inductive HBC operating

frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Fig 20. Typical protection and regulation behavior in

capacitive mode (during bad start-up) . . . . . . . . .33

Fig 21. Frequency relationships. . . . . . . . . . . . . . . . . . . .34

Fig 22. Timing overview of the oscillator and

HBC drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

Fig 23. Typical basic SNSFB application. . . . . . . . . . . . .37

Fig 24. SNSFB V-I characteristics . . . . . . . . . . . . . . . . . .38

Fig 25. SNSFB voltage to output power characteristics

examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38

Fig 26. SSHBC/EN: overview of sources, clamps and

levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

Fig 27. Operating frequencies related to SSHBC/EN

voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

Fig 28. OverCurrent Regulation (OCR) during

start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

Fig 29. Soft-start reset and two-speed soft-start . . . . . . .43

Fig 30. OCP and regulation HBC. . . . . . . . . . . . . . . . . . .44

Fig 31. SNSCURHBC: resonant current

measurement configurations . . . . . . . . . . . . . . . .46

Fig 32. Principle of burst mode operation with

SNSFB and comparator levels. . . . . . . . . . . . . . .4 7

Fig 33. Burst mode application . . . . . . . . . . . . . . . . . . . .48

Fig 34. Improved efficiency by HBC burst mode in

a 250 W converter. . . . . . . . . . . . . . . . . . . . . . . . 49

Fig 35. Reduced losse s by HBC burst mode in

a 250 W converter. . . . . . . . . . . . . . . . . . . . . . . . 49

Fig 36. Increased efficiency at low output power in

burst HBC and PFC (90 W adapter) . . . . . . . . . . 50

Fig 37. Remaining 90 W ada pter losses in burst

mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Fig 38. Simultaneous HBC and PFC burst mode

operation (and output voltage ripple) . . . . . . . . . 51

Fig 39. Designing th e burst mode level using

two resistor values . . . . . . . . . . . . . . . . . . . . . . . 51

Fig 40. Compensation current on SNSBURST . . . . . . . . 52

Fig 41. Designing th e burst mode level using a series

resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Fig 42. Typi cal SNSFB voltage-to-output power

characteristic of a converter without burst mode

functionality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Fig 43. Example of SNSFB and frequency as functi ons

of output power characteristics (normal mode)

adapted for easy implementation of burst

mode comparator level detection . . . . . . . . . . . . 55

Fig 44. Transformer construction . . . . . . . . . . . . . . . . . . 56

Fig 45. SNSOUT protection . . . . . . . . . . . . . . . . . . . . . . 60

Fig 46. Example of disabling the UVP function of

SNSOUT/PFCON . . . . . . . . . . . . . . . . . . . . . . . . 62

Fig 47. Example of disabling the OVP function of

SNSOUT/PFCON . . . . . . . . . . . . . . . . . . . . . . . . 63

Fig 48. Example of disabling both the UVP and the

OVP functions of SNSOUT/PFCON . . . . . . . . . . 63

Fig 49. Block diagram of the RCPROT function . . . . . . . 64

Fig 50. RCPROT protection timer operation. . . . . . . . . . 64

Fig 51. RCPROT operating as a restart timer. . . . . . . . . 65

Fig 52. Ground structure and curren t loo ps in

an application with PFC . . . . . . . . . . . . . . . . . . . 67

Fig 53. Ground layout example with star point

at the boost capacitor . . . . . . . . . . . . . . . . . . . . . 68

Fig 54. PCB layout connecting SGN D, PGND, CFMIN,

RFMAX and SNSCURHBC. . . . . . . . . . . . . . . . . 69

Fig 55. Start-up and debugging ste p-by-step . . . . . . . . . 71

Fig 56. Typical signals during a separate HBC

start-up for an increase in Vboost . . . . . . . . . . . . . 72

Fig 57. Example of a basic IC test setup on a single

low voltage supply (24 V) . . . . . . . . . . . . . . . . . . 73

Fig 58. Example of a 250 W LCD-TV applica tion

(part 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Fig 59. Example of a 250 W LCD-TV applica tion

(part 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Fig 60. Example of a 250 W LCD-TV applica tion

(part 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Application note Rev. 1 — 28 December 2010 81 of 82

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

Fig 61. Overview of the functions in the circuit diagram

of the TEA1613T application . . . . . . . . . . . . . . . .77

17. Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Scope and setup of this document . . . . . . . . . . 3

1.2 Related documents. . . . . . . . . . . . . . . . . . . . . . 3

2 TEA1613T highlights and features. . . . . . . . . . 4

2.1 Resonant conversion . . . . . . . . . . . . . . . . . . . . 4

2.2 General features. . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Resonant half-bridge controller features. . . . . . 5

2.4 Protection features . . . . . . . . . . . . . . . . . . . . . . 5

2.5 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.6 Typical areas of application . . . . . . . . . . . . . . . 5

3 Pin overview with functional description . . . . 6

4 Application diagram . . . . . . . . . . . . . . . . . . . . . 9

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Supply functions . . . . . . . . . . . . . . . . . . . . . . . 12

6.1 Basic supply system overview . . . . . . . . . . . . 12

6.1.1 TEA1613T supplies . . . . . . . . . . . . . . . . . . . . 12

6.1.2 Supply monitoring and protection. . . . . . . . . . 12

6.2 SUPIC - the low voltage IC supply . . . . . . . . . 13

6.2.1 SUPIC start-up . . . . . . . . . . . . . . . . . . . . . . . . 13

6.2.2 SUPIC stop, UVP and short-circuit

protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6.2.3 SUPIC current consumption. . . . . . . . . . . . . . 13

6.3 SUPIC supply using HBC transformer auxiliary

winding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6.3.1 Start-up by SUPHV. . . . . . . . . . . . . . . . . . . . . 14

6.3.2 Block diagram for SUPIC start-up. . . . . . . . . . 14

6.3.3 Auxiliary winding on the HBC transformer . . . 15

6.3.3.1 SUPIC and SNSOUT/PFCON by auxiliary

winding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6.3.3.2 Auxiliary supply voltage variations by output

current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.3.3.3 Voltage variations by auxiliary winding

position: primary side component. . . . . . . . . . 16

6.3.4 Difference between UVP on SNSOUT/PFCON

and SNSCURHBC OCP/OCR . . . . . . . . . . . . 17

6.4 SUPIC supply by external voltage . . . . . . . . . 17

6.4.1 Start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.4.2 Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.5 SUPREG . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.5.1 Block diagram of SUPREG regulator . . . . . . . 19

6.5.2 SUPREG during start-up . . . . . . . . . . . . . . . . 19

6.5.3 Supply voltage for the output drivers:

SUPREG . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.5.4 Supply voltage for the output drivers:

SUPHS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.5.4.1 Initial charging of SUPHS. . . . . . . . . . . . . . . . 20

6.5.4.2 Current load on SUPHS . . . . . . . . . . . . . . . . . 20

6.5.4.3 Lower voltage on SUPHS. . . . . . . . . . . . . . . . 21

6.5.5 SUPREG power consumed by MOSFET

drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.5.6 SUPREG supply voltage for other circuits . . . 22

6.6 Value of the cap a citors on SUPIC, SUPREG

and SUPHS . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.6.1 Value of the capacitor on SUPIC . . . . . . . . . . 23

6.6.1.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.6.1.2 Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.6.1.3 Normal operation . . . . . . . . . . . . . . . . . . . . . . 23

6.6.1.4 Burst mode operation. . . . . . . . . . . . . . . . . . . 23

6.6.2 Value of the capacitor on SUPREG. . . . . . . . 24

6.6.3 Value of the capacitor for SUPHS . . . . . . . . . 24

6.6.4 Relationship between the capacitors on

SUPIC, SUPREG and SUPHS . . . . . . . . . . . 24

7 MOSFET drivers GATELS and GATEHS . . . . 25

7.1 GATELS and GATEHS. . . . . . . . . . . . . . . . . . 25

7.2 Supply voltage and power consumption . . . . 25

7.3 General details regarding MOSFET drivers. . 26

7.4 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . 27

8 HBC functions. . . . . . . . . . . . . . . . . . . . . . . . . 28

8.1 SNSBOOST undervoltage or brownout

protection level. . . . . . . . . . . . . . . . . . . . . . . . 28

8.1.1 Start and stop voltage without series

resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.1.2 Start and stop voltage with series

resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.1.3 SNSBOOST and compensation

SNSBURST . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.2 HBC switch control. . . . . . . . . . . . . . . . . . . . . 29

8.3 HBC adaptive non-overlap. . . . . . . . . . . . . . . 30

8.3.1 Inductive mode (normal operation) . . . . . . . . 30

8.3.2 Capacitive mode . . . . . . . . . . . . . . . . . . . . . . 31

8.3.3 Capacitive Mode Regulation (CMR) . . . . . . . 32

8.4 HBC oscillator . . . . . . . . . . . . . . . . . . . . . . . . 34

8.4.1 Presets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

8.4.2 Operational control. . . . . . . . . . . . . . . . . . . . . 34

8.4.3 CFMIN and RFMAX. . . . . . . . . . . . . . . . . . . . 35

8.4.3.1 Minimum frequency setting for CFMIN . . . . . 35

8.4.3.2 Maximum frequency setting for RFMAX . . . . 36

8.4.4 RFMAX and Hig h Fre q ue n cy Protection

(HFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

8.5 HBC feedback (SNSFB) . . . . . . . . . . . . . . . . 37

8.5.1 HBC Open Loop Protection (OLP). . . . . . . . . 38

8.6 SSHBC/EN soft-start and enable. . . . . . . . . . 39

8.6.1 Switching on and off using an external

control function. . . . . . . . . . . . . . . . . . . . . . . . 39

8.6.1.1 Switching on and off using SSHBC/EN . . . . . 40

8.6.1.2 Hold and continue . . . . . . . . . . . . . . . . . . . . . 40

8.6.2 Soft-start HBC . . . . . . . . . . . . . . . . . . . . . . . . 40

8.6.2.1 Soft-start voltage levels . . . . . . . . . . . . . . . . . 41

8.6.2.2 SSHBC/EN charge and discharge. . . . . . . . . 41

8.6.2.3 SNSFB, SSHBC/EN and soft-start reset -

operating frequency control . . . . . . . . . . . . . . 42

8.6.2.4 Soft-start reset . . . . . . . . . . . . . . . . . . . . . . . . 42

8.7 Overcurrent protection and regulation HBC. . 43

NXP Semiconductors AN10907

TEA1613T resonant power supply control IC

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 28 December 2010

Document identifier: AN10907

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

8.7.1 HBC overcurrent regulation . . . . . . . . . . . . . . 44

8.7.2 HBC overcurrent protection . . . . . . . . . . . . . . 45

8.7.3 SNSCURHBC boost voltage compensation. . 45

8.7.4 Current measurement circuits. . . . . . . . . . . . . 46

8.7.5 SNSCURHBC layout . . . . . . . . . . . . . . . . . . . 46

9 Burst mode operation . . . . . . . . . . . . . . . . . . . 47

9.1 Burst mode implementation . . . . . . . . . . . . . . 47

9.2 PFC burst mode operation control by

SNSOUT/PFCON. . . . . . . . . . . . . . . . . . . . . . 48

9.3 Advantages of burst mode in HBC . . . . . . . . . 49

9.4 Advantages of burst mode for HBC and PFC

simultaneously . . . . . . . . . . . . . . . . . . . . . . . . 50

9.5 Choice of burst level and divider impedan ce . 51

9.5.1 Basic design of an SNSBURST circuit . . . . . . 51

9.5.2 Advanced design of SNSBURST circuit. . . . . 52

9.5.3 Advanced design of SNSBURST circuit

using a series resistor. . . . . . . . . . . . . . . . . . . 53

9.5.4 Other aspects regarding SNSBURST. . . . . . . 54

9.6 Output power - operating frequency

characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 55

9.7 Lower SUPHS in burst . . . . . . . . . . . . . . . . . . 56

9.8 Audible noise . . . . . . . . . . . . . . . . . . . . . . . . . 56

9.8.1 Measurements in the resonant transformer

construction . . . . . . . . . . . . . . . . . . . . . . . . . . 56

9.8.2 Burst power dependent noise level . . . . . . . . 57

9.9 PFC converter and resonant converter

simultaneous bursting. . . . . . . . . . . . . . . . . . . 57

9.9.1 PFC start delay. . . . . . . . . . . . . . . . . . . . . . . . 57

9.9.2 PFC output voltage variations. . . . . . . . . . . . . 57

9.9.3 Switching betwee n burst and normal

operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

9.9.4 Audible noise during mode transition . . . . . . . 58

9.10 Design guidelines for burst mode operation. . 58

9.11 Enable/disable burst mode. . . . . . . . . . . . . . . 58

9.12 Hold HBC and PFC . . . . . . . . . . . . . . . . . . . . 58

9.13 Unused burst mode . . . . . . . . . . . . . . . . . . . . 58

10 Protection functions . . . . . . . . . . . . . . . . . . . . 59

10.1 Protection overview . . . . . . . . . . . . . . . . . . . . 59

10.2 IC protection. . . . . . . . . . . . . . . . . . . . . . . . . . 59

10.2.1 OverTemperature Protection (OTP) . . . . . . . . 59

10.2.2 Latched protection . . . . . . . . . . . . . . . . . . . . . 59

10.3 SNSOUT/PFCON protection . . . . . . . . . . . . . 60

10.3.1 OverVoltage Protection (OVP) output. . . . . . . 60

10.3.1.1 Auxiliary winding. . . . . . . . . . . . . . . . . . . . . . . 60

10.3.1.2 Principle of operation . . . . . . . . . . . . . . . . . . . 60

10.3.1.3 Connecting external measurement circuits. . . 60

10.3.2 UnderV oltage Protection (UVP) output. . . . . . 61

10.3.2.1 Auxiliary winding. . . . . . . . . . . . . . . . . . . . . . . 61

10.3.2.2 Principle of operation . . . . . . . . . . . . . . . . . . . 61

10.3.2.3 Connecting external measurement circuits. . . 61

10.3.3 OVP and UVP combinations . . . . . . . . . . . . . 61

10.3.3.1 Circuit configurations . . . . . . . . . . . . . . . . . . . 61

10.3.3.2 OVP functionality and UVP disabled . . . . . . . 62

10.3.3.3 UVP functionality and OVP disabled . . . . . . . 62

10.3.3.4 Both OVP and UVP disabled. . . . . . . . . . . . . 63

10.3.3.5 UVP during burst mode operation . . . . . . . . . 63

10.4 Protection timer . . . . . . . . . . . . . . . . . . . . . . . 64

10.4.1 Block diagram of the RCPROT function . . . . 64

10.4.1.1 RCPROT working as protection timer . . . . . . 64

10.4.2 RCPROT working as a restart timer. . . . . . . . 65

10.4.3 Dimensioning the timer function. . . . . . . . . . . 66

11 Miscellaneous advice and tips. . . . . . . . . . . . 67

11.1 PCB layout. . . . . . . . . . . . . . . . . . . . . . . . . . . 67

11.1.1 Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

11.1.2 Large current loops . . . . . . . . . . . . . . . . . . . . 67

11.1.3 Ground layout example . . . . . . . . . . . . . . . . . 68

11.1.4 Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . 68

11.2 Starting/debugging partial circuits . . . . . . . . . 69

11.2.1 HBC only . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

12 Application examples and topologies . . . . . . 73

12.1 Example of IC evaluation and test setup . . . . 73

12.2 Example of a 250 W LCD-TV application . . . 74

13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 78

14 Legal information . . . . . . . . . . . . . . . . . . . . . . 79

14.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

14.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 79

14.3 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 79

15 Ta bles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

16 Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

17 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82