Product Brief – JN5139
IEEE802.15.4 and ZigBee Wireless Microcontrollers
© Jennic Ltd 2008 – www.jennic.com JN5139-PB v1.22 Page 1 of 2
Features: Transceiver
2.4GHz IEEE802.15.4 compliant
128-bit AES security processor
MAC accelerator with packet
formatting, CRCs, address check,
auto-acks, timers
Integrated power management
and sleep oscillator for low power
On-
chip power regulation for 2.2V
to 3.6V battery operation
Deep sleep current 0.2µA
Sleep current with active sleep
timer 1.3µA
Needs minimum of external
components (< US$1 cost)
Rx current 34mA
Tx current 34mA
Receiver sensitivity -97dBm
Transmit power +3dBm
Features: Microcontroller
32-bit RISC processor sustains
16MIPs with low power
192kB ROM stores system code,
including protocol stack
96kB RAM stores system data
and optionally bootloaded
program code
48-byte OTP eFuse, stores MAC
ID on-chip, offers AES based
code encryption feature
4-input 12-bit ADC, 2 11-bit
DACs, 2 comparators
2 Application timer/counters,
3 system timers
2 UARTs (one for debug)
SPI port with 5 selects
2-wire serial interface
Up to 21 GPIO
Industrial temperature range
(-40°C to +85°C)
8x8mm 56-lead QFN
-free and RoHS compliant
Overview
The JN5139 is a low power, low cost wireless microcontroller suitable for
IEEE802.15.4 and ZigBee applications. The device integrates a 32-bit RISC
processor, with a fully compliant 2.4GHz IEEE802.15.4 transceiver, 192kB of ROM,
96kB of RAM, and a rich mixture of analogue and digital peripherals.
The cost sensitive ROM/RAM architecture supports the storage of system
software, including protocol stacks, routing tables and application code/data. An
external flash memory is used to store application code that is bootloaded into
internal RAM and executed at runtime.
The device integrates hardware MAC and AES encryption accelerators, power
saving and timed sleep modes, and mechanisms for security key and program
code encryption. These features all make for a highly efficient, low power, single
chip wireless microcontroller for battery-powered applications.
Block Diagram
Benefits
Single chip integrates transceiver
and microcontroller for wireless
sensor networks
Cost sensitive ROM/RAM
architecture, meets needs for
volume application
System BOM is low in component
count and cost
Hardware MAC ensures low
power consumption and low
processor overhead
Extensive user peripherals
Pin compatible with JN5121 for
easy migration
Applications
Robust and secure low power
wireless applications
Wireless sensor networks,
particularly IEEE802.15.4 and
ZigBee systems
Home and commercial building
automation
Remote Controls
Toys and gaming peripherals
Industrial systems
Telemetry and utilities
(e.g. AMR)
Optional
32-bit
RISC CPU
Timers
UARTs
12-bit ADC,
comparators
11-bit DACs,
temp sensor
2-wire serial
SPI
RAM
8kB - 96kB
128-bit AES
Encryption
Accelerator
2.4GHz
Radio
ROM
192kB
Power
Management
XTAL
O-QPSK
Modem
IEEE802.15.4
MAC
Accelerator
Bootloader
Flash
48-byte
OTP eFuse