AMIS-30600 LIN Transceiver Data Sheet
1.0 Key Features
LIN-Bus Transceiver
LIN compliant to specification rev. 1.3 and rev. 2.0
I2T high voltage technology
Bus voltage ± 40V
Transmission rate up to 20 kBaud
SOIC-150-8 Package
Protection
Thermal shutdown
Indefinite short circuit protection to supply and ground
Load dump protection (45V)
Power Saving
Operating voltage = 4.75 to 5.25V
Power down supply current < 50µA
EMS Compatibility
Integrated filter and hysteresis for receiver
EMI Compatibility
Integrated slope control for transmitter
Slope control dependant from Vbat to enable maximum capacitive-load
2.0 General Description
The single-wire transceiver AMIS-30600 is a monolithic integrated circuit in a SOIC-8 package. It works as an interface between
the protocol controller and the ph ysical bus.
The AMIS-30600 is es pecially suitable to drive the bus line in LIN systems in autom otive and industrial applications. Further it can
be used in standard ISO9141 systems.
In order to reduce the c urrent consumption the AMIS-3 0600 offers a stand-by m ode. A wake-up caus ed by a message o n the bus
pulls the INH-output high until the device is switched to normal operation mode.
The transceiver is implem ented in I2T 100 technology enabling b oth high-voltage analo g circuitry and digital functi onality to co-exis t
on the same chip.
The AMIS-30600 provides an ultra-safe solution to today’s automotive in-vehicle networking (IVN) requirements by providing
unlimited short circuit protection in the event of a fault condition.
3.0 Ordering Information
Table 1: Ordering Code
Marketing Name Package Temp. Range
AMIS30600AGA SOIC 150 8 150 4 -40°C…125°C
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AMIS-30600 LIN Transceiver Data Sheet
4.0 Block Diagram
LIN
AMIS-30600
GND
RxD
VBB
5
6
4
INH
2
State
&
Wake-up
Control
Thermal
shutdown
VCC
8
1
PC20050113.3
TxD
7
VCC
COMP
Slope
Control
Filter
EN
3
30 k
10 k40 k
Figure 1: Block Diagram
5.0 Typical Application
5.1 Application Schematic
PC20050113.5
AMIS-
30600
LIN
GND
RxD
TxD
2
1
3
4
5
6
78
VCC
LIN
controller
VBAT IN OUT
VCC
Master Node
1 nF 1 k
EN
GND
2
5V-reg
VBB INH
GND
100 nF
AMIS-
30600
LIN
GND
RxD
TxD
2
1
3
4
5
6
78
VCC
LIN
controller
VBAT IN OUT
VCC
Slave Node
EN
GND
2
5V-reg
VBB INH
GND
100 nF
KL30
KL31
LIN-BUS
10 µF10 µF
Figure 2: Application Diagram
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AMIS-30600 LIN Transceiver Data Sheet
5.2 Pin Description
5.2.1 Pin Out (top view)
5
6
7
8
1
2
3
4
RxD
TxD
INH
GND
EN
LIN
VBB
VCC
AMIS-
30600
PC20041204.3
Figure 3: Pin Configuration
5.2.2 Pin Description
Table 2: Pinout
Pin Name Description
1 RxD Receive data output; low in dominant state
2 EN Enable input; transceiver in normal operation mode when high
3 VCC 5V supply input
4 TxD Transmit data input; low in dominant state; internal 40 K pull-up
5 GND Ground
6 LIN LIN bus output/input; low in dominant state; internal 30 K pull-up
7 VBB Battery supply input
8 INH Inhibit output; to control a voltage regulator; becomes high when wake-up via LIN bus occurs
5.3 Application Information
Normal Mode
EN INH Vcc
High High On
Sleep Mode
EN INH Vcc
Low Floating Off
Start Up
Pow e r Up
EN Æ Low
EN Æ High
EN Æ High
(Vcc Æ On)
Power-up
Wake-up
t > twake
PC20050113.1
Stand-By Mode
EN INH Vcc
Low High On
Figure 4: State Diagram
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AMIS-30600 LIN Transceiver Data Sheet
For fail safe reasons the AMIS-30600 already has an internal pull up resistor of 30k implemented. To achieve the required
timings for the dominant to recessive transition of the bus signal an additi onal external termination resistor of 1k is requir ed. It is
recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in
case of an unpowered node, it is recommended to place a diode in series to the external pull up. For small systems (low bus
capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see
Figure 2, Typical Application Diagram).
The AMIS-30600 has a slope which depen ds of the s upply Vbat. T his impl ementation guarantees big gest slop e-time under al l load
conditions. The rising sl ope ha s to be slower then the external RC-time-co nstant, otherwise the slope will be term inat ed b y the RC-
time-constant and no longer by the internal slope-control. This would effect the symmetry of the bus-signal and would limit the
maximum allowed bus-speed.
A capacitor of 10µF at the supply voltage input VB buffers the input voltage. In com binati on with the r equired rev erse polarit y di ode
this prevents the device from detecting power down conditions in case of negative transients on the supply line.
In order to reduce the current consumption, the AMIS-30 600 offers a sleep oper atio n mo de. T his mode is selecte d by s witching th e
enable input EN low (see Figure 4, State Diagram).
In the sleep mode a voltage regulator can be controlled via the INH output in order to minimize the current consumption of the
whole application. A wake-up caused by a message on the communication bus automatically enables the voltage regulator by
switching the INH output high. In case the voltage regulator control input is not connected to INH output or the micro-controller is
active respectively, the AMIS-30600 can be set in norma l operation mode without a wake-up via the communication bus.
6.0 Electrical Characteristics
6.1 Absolute Maximum Ratings
Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.
Table 4: Absolute Maximum Ratings
Symbol Parameter Conditions Min. Max. Unit
VCC Supply voltage -0.3 +7 V
VBB Battery supply voltage -0.3 +40 V
VLIN DC voltage at pin LIN 0 < VCC < 5.50V; note 1 -40 +40 V
VINH DC voltage at pin INH 0 < VCC < 5.50V -0.3 VBB + 0.3 V
VTxD DC voltage at pin TxD 0 < VCC < 5.50V -0.3 VCC + 0.3 V
VRxD DC voltage at pin RxD 0 < VCC < 5.50V -0.3 VCC + 0.3 V
VEN DC voltage at pin EN 0 < VCC < 5.50V -0.3 VCC + 0.3 V
Vesd(LIN) Electrostatic discharge voltage at LIN pin Note 2 -4 +4 kV
Vesd Electrostatic discharge voltage at all other pins Note 2 -4 +4 kV
Vtran(LIN) Transient voltage at pin LIN Note 3 -150 +150 V
Vtran(VBB) Transient voltage at pin VBB Note 4 -150 +150 V
Tamb Ambient temperature -40 +150 °C
Notes:
1. 80V version available, contact sales for details.
2. Standardized human body model system ESD pulses in accordance to IEC 1000.4.2.
3. Applied transient waveforms in accordance with “ISO 7637 parts 1 & 3” capacitive coupled test pulses 1 (-100V),
2 (+100V), 3a (-150V), and 3b (+150V). See Figure 8.
4. Applied transient waveforms in accordance with “ISO 7637 parts 1 & 3” direct coupled t est pulses 1 (- 100V), 2 (+75V) ,
3a (-150V), 3b (+150V), and 5 (+80V). See Figure 8.
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AMIS-30600 LIN Transceiver Data Sheet
6.2 Operating Range
Table 5: Operating Range
Symbol Parameter Min. Typ. Max. Unit
VCC Supply voltage 4.75 +5.25 V
VBB Battery supply voltage 7.3 +18 V
Tjunc Maximum junction temperature -40 +150 °C
Tjsd Thermal shutdown temperature +150 +170 +190 °C
Rthj-a Thermal resistance junction to ambient 185 °C/W
6.3 DC Electrical Characteristics
VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125°C; RL = 500 unless specified otherwise. All voltages with
respect to ground; positive current flowing into pin; unless other wise specified.
Table 6: DC Characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit
Supply (pin VCC and pin VBB)
ICC 5V supply current Dominant; VTxD =0V
Recessive; VTxD =VCC
400
250 700
500 µA
µA
IBB Battery supply current Dominant; VTxD =0V
Recessive; VTxD =VCC 1
100 1.5
200 mA
µA
IBB Battery supply current Sleep mode; VINH = 0V 35 55 µA
ICC 5V supply current Sleep mode; VINH = 0V 0.25 1 µA
Transmitter Data Input (pin TxD)
VIH High-level input voltage Output recessive 0.7 x VCC - VCC V
VIL Low-level input voltage Output dominant 0 - 0.3 x VCC V
RTxD,pu Pull-up resistor to Vcc 24 60 k
Receiver Data Output (pin RxD)
VOH High-level output voltage IRXD = -10mA 0.8 x VCC V
CC V
VOL Low-level output voltage IRXD = 5mA 0 0.2 x VCC V
Enable Input (pin EN)
VEN,on High-level input voltage Normal mode 0.7 x VCC - VCC V
VEN,off Low-level input voltage Low power mode 0 - 0.3 x VCC V
REN,pd Pull-down resistor to GND 6 10 15 k
Inhibit Output (pin INH)
VINH,d High-level voltage drop: VINH,d = VBB - VINH IINH = - 0.15mA 0.5 1.0 V
IINH,lk Leakage current Sleep mode; VINH = 0V -5.0 - 5.0 µA
Bus Line (pin LIN)
Vbus,rec Recessive bus voltage at pin LIN VTxD =VCC 0.9 x VBB - VBB V
Vbus,dom Dominant output voltage at pin LIN VTxD = 0V
VTxD = 0V; Ibus = 40mA 0 - 0.15 x VBB
1.4 V
V
Ibus,sc Bus short circuit current Vbus,short = 18V 40 85 130 mA
Ibus,lk Bus leakage current VCC=VBB=0V; Vbus=8V
VCC=VBB=0V; Vbus=20V -400
-200
5
20 µA
Rbus Bus pull-up resistance VTxD = 0V 20 30 47 k
Vbus,rd Receiver threshold: recessive to dominant 0.4 x VBB 0.48 x VBB 0.6 x VBB V
Vbus,dr Receiver threshold: dominant to recessive 0.4 x VBB 0.52 x VBB 0.6 x VBB V
Vq Receiver hysteresis Vbus,hys=Vbus,rec-Vbus,dom 0.05 x VBB 0.04 x VBB 0.175 x VBB V
VWAKE Wake-up threshold voltage 0.4 x VBB 0.6 x VBB V
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AMIS-30600 LIN Transceiver Data Sheet
6.4 AC Electrical Characteristics
VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125°C; RL = 500 unless specified otherwise.
Load for slope definitions (typical loads) = [L1] 1nF 1k / [L2] 6.8nF 600 / [L3] 10nF 500.
Table 7: AC Characteristics According to LIN V1.3
Symbol Parameter Conditions Min. Typ. Max. Unit
Dynamic Transceiver Characteristics According to LIN v1.3
t _slope_F Slope time falling edge See Figure 6 4 - 24 µs
t _slope_R Slope time rising edge See Figure 6 4 - 24 µs
t _slope _Sym Slope time symmetry t _slope_F - t _slope_R -8 - +8 µs
T_rec_F Propagation delay Bus dominant
to RxD = low; note 1 See Figure 5, 6 2 6 µs
T_rec_R Propagation delay Bus recessive
to RxD = high; note 1 See Figure 5, 6 2 6 µs
tWAKE Wake-up delay time 30 100 200 µs
Notes:
1. Not measured on ATE.
VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125°C; RL = 500 unless specified otherwise.
Load for slope definitions (typical loads) = [L1] 1nF 1k / [L2] 6.8nF 600 / [L3] 10nF 500.
Table 8: AC Characteristics According to LIN V2.0
Symbol Parameter Conditions Min. Typ. Max. Unit
Dynamic Receiver Charac teristics according to LIN v2.0
trx_pdr Propagation delay bus dominant
to RxD = low; note 1 See Figure 7 6 µs
trx_pdf Propagation delay Bus recessive
to RxD = high; note 1 See Figure 7 6 µs
trx_sym Symmetry of receiver propagation delay trx_pdr - trx_pdf -2 - +2 µs
Dynamic Transmitter Characteristics accordin g to LIN v2.0
D1 Duty cycle 1 = tBus_rec(min)/(2 x tBit);
See Figure 7
THRec(max)= 0.744 x Vbat;
THDom(max)= 0.581 x Vbat;
Vbat = 7.0V ... 18V; tBit= 50µs 0.396 0.5
D1 Duty cycle 1 = tBus_rec(min)/(2 x tBit);
See Figure 7
THRec(max)= 0.744 x Vbat;
THDom(max)= 0.581 x Vbat;
Vbat = 7.0V; tBit= 50µs;
tamb = -40°C
0.366 0.5
D2 Duty cycle 2 = tBus_rec(max)/(2 x tBit);
See Figure 7
THRec(min)= 0.284 x Vbat;
THDom(min)= 0.422 x Vbat;
Vbat = 7.6V ... 18V; tBit= 50µs; 0.5 0.581
Notes:
1. Not measured on ATE.
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AMIS-30600 LIN Transceiver Data Sheet
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AMIS-
30600
VBB
GND
5
7
LIN
INH
6
3
PC20041207.1
EN
2
RxD 1
TxD 4
100 nF
Vbat
20 pF
3
+5 V 100 nF RL
CL1 nF
CL
10 nF
6.8 nF
1 k
Load RL
L1
L2
L3 600
500
Figure 5: Test Circuit for Timing Characteristics
PC20041206.1
T_slope_F T_slope_R
LIN
t
60%
40%
60%
40%
PC20041204.1
PC20041206.2
LIN
50%
t
RxD T_rec_RT_rec_F
t
50% 50%
Figure 6: Timing Diagram for AC Characteristics According to LIN 1.3
AMI Semiconductor – Rev. 2.0, Apr. 2005
AMIS-30600 LIN Transceiver Data Sheet
tBUS_dom(min)
LIN
t
PC20041206.3
THRec(max)
THRec(min)
THDom(max)
THDom(min)
tBUS_dom(max)
tBUS_rec(max)
tBUS_rec(min)
50%
tBIT tBIT
50%
trx_pdf
trx_pdr
Thresholds
receiver 1
Thresholds
receiver 2
RxD
TxD
( receiver 2)
t
t
Figure 7: Timing Diagram for AC Characteristics According to LIN 2.0
AMIS-
30600
VBB
GND
5
7
LIN
INH
6
3
PC20050113.2
EN 2
RxD 1
TxD 41 nF
100 nF
+13.5 V
20 pF
1 nF
Transient
Generator
3
+5.25 V
100 nF 1 k
VCC
Figure 8: Test Circuit for Transient Measurements
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AMIS-30600 LIN Transceiver Data Sheet
7.0 Package Outline
SOIC-8: Plastic small outline; 8 leads; body width 150 mil; JEDEC: MS-012. AMIS reference: SOIC150 8 150 G
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AMIS-30600 LIN Transceiver Data Sheet
8.0 Soldering
8.1 Introduction to Soldering Surface Mount Packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in the AMIS
“Data Handbook IC26; Integrated Circu it Packages” (document order number 9398 652 90011).
There is no soldering method that is ideal for all surface mount IC packages . Wave soldering is not always suitable for surface
mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used.
8.2 Re-flow Soldering
Re-flow soldering requires sol der paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-
circuit board by screen printing, stencilling or pressure-syringe dispe nsin g before p ackage placement. Several methods exist for
reflowing; for example, infrared/convection h eating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical re-flow peak temperatures range from 215 to 250°C. T he top-surface temperature of the packages sho uld preferably be
kept below 230°C.
8.3 Wave Soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high
component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-
wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observe d for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth
laminar wave.
For packages with leads on two sides and a pitch (e):
o Larger than or equal to 1.27mm, the footprint longitudinal axis is preferred to be parall el to the transport direction
of the printed-circuit board;
o Smaller than 1.27mm, the footprint longitudi nal axis must be parallel to the transport direction of the printed-
circuit board. The footprint must incorporate solder thieves at the downstream end.
For packages with leads on four sides, the footprint must be placed at a 45º angle to the transport direction of the printed-
circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied b y
screen printing, pin transfer or syringe dispensing. T he package can be soldered after the adhesive is cured.
Typical dwell time is four seconds at 250°C. A mildly-activat ed flux will eliminate the nee d for removal of corrosive residues in most
applications.
8.4 Manual Soldering
Fix the component by first solderi ng two diagonally-o pposite end leads. Use a lo w voltage (24V or less) soldering iron applied to
the flat part of the lead. Contact time must be limited to 10 seconds at up to 300°C.
When using a dedicated tool, all other leads can be soldered in one op eration within two to five seconds bet ween 270 and 320°C.
Table 9: Soldering Process Soldering Method
Package Wave Reflow(1)
BGA, SQFP Not suitable Suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS Not suitable (2) Suitable
PLCC (3) , SO, SOJ Suitable Suitable
LQFP, QFP, TQFP Not recommended (3)(4) Suitable
SSOP, TSSOP, VSO Not recommended (5) Suitable
Notes:
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size
of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For
details, refer to the drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods.”
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and
as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder
thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8mm; it is defini tely not suitable for packages with a
pitch (e) equal to or smaller than 0.65mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65mm; it is definitely not suitable for packages with a
pitch (e) equal to or smaller than 0.5mm.
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AMIS-30600 LIN Transceiver Data Sheet
9.0 Company or Product Inquiries
For more information about AMI Semiconductor, our technology and our product, visit our website at: http://www.amis.com
North America
Tel: +1.208.233.4690
Fax: +1.208.234.6795
Europe
Tel: +32 (0) 55.33.22.11
Fax: +32 (0) 55.31.81.12
Devices sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no warranty, express,
statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMIS
makes no warranty of merchantability or fitness for any purposes. AMIS reserves the right to discontinue production and change specifications and prices at an
y
time and without notice. AMI Semiconductor's products are intended for use in commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not
recommended without additional processing by AMIS for such applications. Copyright ©2005 AMI Semiconductor, Inc.
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