AMIS-30600 LIN Transceiver Data Sheet 1.0 Key Features LIN-Bus Transceiver * LIN compliant to specification rev. 1.3 and rev. 2.0 * I2T high voltage technology * Bus voltage 40V * Transmission rate up to 20 kBaud * SOIC-150-8 Package Protection * Thermal shutdown * Indefinite short circuit protection to supply and ground * Load dump protection (45V) Power Saving * Operating voltage = 4.75 to 5.25V * Power down supply current < 50A EMS Compatibility * Integrated filter and hysteresis for receiver EMI Compatibility * Integrated slope control for transmitter * Slope control dependant from Vbat to enable maximum capacitive-load 2.0 General Description The single-wire transceiver AMIS-30600 is a monolithic integrated circuit in a SOIC-8 package. It works as an interface between the protocol controller and the physical bus. The AMIS-30600 is especially suitable to drive the bus line in LIN systems in automotive and industrial applications. Further it can be used in standard ISO9141 systems. In order to reduce the current consumption the AMIS-30600 offers a stand-by mode. A wake-up caused by a message on the bus pulls the INH-output high until the device is switched to normal operation mode. The transceiver is implemented in I2T100 technology enabling both high-voltage analog circuitry and digital functionality to co-exist on the same chip. The AMIS-30600 provides an ultra-safe solution to today's automotive in-vehicle networking (IVN) requirements by providing unlimited short circuit protection in the event of a fault condition. 3.0 Ordering Information Table 1: Ordering Code Marketing Name Package Temp. Range AMIS30600AGA SOIC 150 8 150 4 -40C...125C AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 1 AMIS-30600 LIN Transceiver Data Sheet 4.0 Block Diagram 8 VBB 3 7 State & Wake-up Control INH Thermal shutdown 10 k 30 k 2 EN VCC 1 RxD COMP VCC 40 k 4 TxD 6 LIN Filter AMIS-30600 Slope Control 5 GND PC20050113.3 Figure 1: Block Diagram 5.0 Typical Application 5.1 Application Schematic Master Node IN VBAT 5V-reg 10 F 8 1 k 7 1 nF GND 7 4 2 5 8 1 LIN controller LIN 6 AMIS30600 EN 4 2 2 GND GND GND VCC VCC 3 RxD TxD OUT 100 nF 3 AMIS30600 5V-reg VBB INH VCC VCC 1 6 IN 10 F 100 nF VBB INH LIN Slave Node VBAT OUT 5 RxD TxD LIN controller EN 2 GND GND KL30 LIN-BUS PC20050113.5 KL31 Figure 2: Application Diagram AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 2 AMIS-30600 LIN Transceiver Data Sheet 5.2 Pin Description 5.2.1 Pin Out (top view) 1 EN 2 VCC 3 TxD 4 AMIS30600 RxD 8 INH 7 VBB 6 LIN 5 GND PC20041204.3 Figure 3: Pin Configuration 5.2.2 Pin Description Table 2: Pinout Pin Name Description 1 RxD Receive data output; low in dominant state 2 EN Enable input; transceiver in normal operation mode when high 3 VCC 5V supply input 4 TxD Transmit data input; low in dominant state; internal 40 K pull-up 5 GND Ground 6 LIN LIN bus output/input; low in dominant state; internal 30 K pull-up 7 VBB Battery supply input 8 INH Inhibit output; to control a voltage regulator; becomes high when wake-up via LIN bus occurs 5.3 Application Information Start Up Power Up Normal Mode EN INH Vcc High High On Power-up EN AE High Stand-By Mode EN AE Low EN AE High (Vcc AE On) Sleep Mode EN Low INH Vcc Floating Off Figure 4: State Diagram AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 3 EN INH Vcc Low High On Wake-up t > twake PC20050113.1 AMIS-30600 LIN Transceiver Data Sheet For fail safe reasons the AMIS-30600 already has an internal pull up resistor of 30k implemented. To achieve the required timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1k is required. It is recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in case of an unpowered node, it is recommended to place a diode in series to the external pull up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see Figure 2, Typical Application Diagram). The AMIS-30600 has a slope which depends of the supply Vbat. This implementation guarantees biggest slope-time under all load conditions. The rising slope has to be slower then the external RC-time-constant, otherwise the slope will be terminated by the RCtime-constant and no longer by the internal slope-control. This would effect the symmetry of the bus-signal and would limit the maximum allowed bus-speed. A capacitor of 10F at the supply voltage input VB buffers the input voltage. In combination with the required reverse polarity diode this prevents the device from detecting power down conditions in case of negative transients on the supply line. In order to reduce the current consumption, the AMIS-30600 offers a sleep operation mode. This mode is selected by switching the enable input EN low (see Figure 4, State Diagram). In the sleep mode a voltage regulator can be controlled via the INH output in order to minimize the current consumption of the whole application. A wake-up caused by a message on the communication bus automatically enables the voltage regulator by switching the INH output high. In case the voltage regulator control input is not connected to INH output or the micro-controller is active respectively, the AMIS-30600 can be set in normal operation mode without a wake-up via the communication bus. 6.0 Electrical Characteristics 6.1 Absolute Maximum Ratings Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Table 4: Absolute Maximum Ratings Symbol Parameter Conditions Min. Max. Unit VCC Supply voltage -0.3 +7 V VBB Battery supply voltage -0.3 +40 V VLIN DC voltage at pin LIN 0 < VCC < 5.50V; note 1 -40 +40 V VINH DC voltage at pin INH 0 < VCC < 5.50V -0.3 VBB + 0.3 V VTxD DC voltage at pin TxD 0 < VCC < 5.50V -0.3 VCC + 0.3 V VRxD DC voltage at pin RxD 0 < VCC < 5.50V -0.3 VCC + 0.3 V VEN DC voltage at pin EN 0 < VCC < 5.50V -0.3 VCC + 0.3 V Vesd(LIN) Electrostatic discharge voltage at LIN pin Note 2 -4 +4 kV Vesd Electrostatic discharge voltage at all other pins Note 2 -4 +4 kV Vtran(LIN) Transient voltage at pin LIN Note 3 -150 +150 V Vtran(VBB) Transient voltage at pin VBB Note 4 -150 +150 V Tamb Ambient temperature -40 +150 C Notes: 1. 2. 3. 4. 80V version available, contact sales for details. Standardized human body model system ESD pulses in accordance to IEC 1000.4.2. Applied transient waveforms in accordance with "ISO 7637 parts 1 & 3" capacitive coupled test pulses 1 (-100V), 2 (+100V), 3a (-150V), and 3b (+150V). See Figure 8. Applied transient waveforms in accordance with "ISO 7637 parts 1 & 3" direct coupled test pulses 1 (-100V), 2 (+75V), 3a (-150V), 3b (+150V), and 5 (+80V). See Figure 8. AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 4 AMIS-30600 LIN Transceiver Data Sheet 6.2 Operating Range Table 5: Operating Range Symbol Parameter Max. Unit VCC Supply voltage Min. 4.75 Typ. +5.25 V VBB Battery supply voltage 7.3 +18 V Tjunc Maximum junction temperature -40 +150 C Tjsd Thermal shutdown temperature +150 Rthj-a Thermal resistance junction to ambient +170 +190 185 C C/W 6.3 DC Electrical Characteristics VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125C; RL = 500 unless specified otherwise. All voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Table 6: DC Characteristics Symbol Parameter Conditions Min. Typ. Max. Unit 400 250 1 100 35 700 500 1.5 200 55 A A mA A A 0.25 1 A 0.7 x VCC - VCC V 0 - Supply (pin VCC and pin VBB) ICC 5V supply current IBB Battery supply current IBB Battery supply current Dominant; VTxD =0V Recessive; VTxD =VCC Dominant; VTxD =0V Recessive; VTxD =VCC Sleep mode; VINH = 0V ICC 5V supply current Sleep mode; VINH = 0V Transmitter Data Input (pin TxD) VIH High-level input voltage Output recessive VIL Low-level input voltage Output dominant RTxD,pu Pull-up resistor to Vcc 0.3 x VCC V 24 60 k 0.8 x VCC VCC V 0 0.2 x VCC V Receiver Data Output (pin RxD) VOH High-level output voltage IRXD = -10mA VOL Low-level output voltage IRXD = 5mA Enable Input (pin EN) VEN,on High-level input voltage Normal mode VEN,off Low-level input voltage Low power mode REN,pd Pull-down resistor to GND 0.7 x VCC - VCC V 0 - 0.3 x VCC V 6 10 15 k Inhibit Output (pin INH) VINH,d High-level voltage drop: VINH,d = VBB - VINH IINH = - 0.15mA 0.5 1.0 V IINH,lk Leakage current Sleep mode; VINH = 0V -5.0 - 5.0 A VTxD =VCC VTxD = 0V VTxD = 0V; Ibus = 40mA Vbus,short = 18V VCC=VBB=0V; Vbus=8V VCC=VBB=0V; Vbus=20V VTxD = 0V 0.9 x VBB - 0 - 40 -400 VBB 0.15 x VBB 1.4 130 V V V mA Bus Line (pin LIN) Vbus,rec Recessive bus voltage at pin LIN Vbus,dom Dominant output voltage at pin LIN Ibus,sc Bus short circuit current Ibus,lk Bus leakage current Rbus Bus pull-up resistance Vbus,rd Receiver threshold: recessive to dominant Vbus,dr Receiver threshold: dominant to recessive Vq Receiver hysteresis VWAKE Wake-up threshold voltage AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com Vbus,hys=Vbus,rec-Vbus,dom 20 85 -200 5 30 0.4 x VBB 0.48 x VBB 0.4 x VBB 0.52 x VBB 0.6 x VBB V 0.05 x VBB 0.04 x VBB 0.175 x VBB V 0.6 x VBB V 0.4 x VBB 5 A 20 47 k 0.6 x VBB V AMIS-30600 LIN Transceiver Data Sheet 6.4 AC Electrical Characteristics VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125C; RL = 500 unless specified otherwise. Load for slope definitions (typical loads) = [L1] 1nF 1k / [L2] 6.8nF 600 / [L3] 10nF 500. Table 7: AC Characteristics According to LIN V1.3 Symbol Parameter Conditions Min. Typ. Max. Unit Dynamic Transceiver Characteristics According to LIN v1.3 t _slope_F Slope time falling edge See Figure 6 4 - 24 s t _slope_R Slope time rising edge See Figure 6 4 - 24 s t _slope _Sym Slope time symmetry Propagation delay Bus dominant to RxD = low; note 1 Propagation delay Bus recessive to RxD = high; note 1 Wake-up delay time t _slope_F - t _slope_R -8 - +8 s See Figure 5, 6 2 6 s See Figure 5, 6 2 6 s 100 200 s T_rec_F T_rec_R tWAKE Notes: 1. 30 Not measured on ATE. VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125C; RL = 500 unless specified otherwise. Load for slope definitions (typical loads) = [L1] 1nF 1k / [L2] 6.8nF 600 / [L3] 10nF 500. Table 8: AC Characteristics According to LIN V2.0 Symbol Parameter Dynamic Receiver Characteristics according to LIN v2.0 Propagation delay bus dominant trx_pdr to RxD = low; note 1 Propagation delay Bus recessive trx_pdf to RxD = high; note 1 trx_sym Symmetry of receiver propagation delay Conditions Max. Unit See Figure 7 6 s See Figure 7 6 s +2 s trx_pdr - trx_pdf Min. -2 Typ. - Dynamic Transmitter Characteristics according to LIN v2.0 D1 Duty cycle 1 = tBus_rec(min)/(2 x tBit); See Figure 7 D1 Duty cycle 1 = tBus_rec(min)/(2 x tBit); See Figure 7 D2 Duty cycle 2 = tBus_rec(max)/(2 x tBit); See Figure 7 Notes: 1. THRec(max)= 0.744 x Vbat; THDom(max)= 0.581 x Vbat; Vbat = 7.0V ... 18V; tBit= 50s THRec(max)= 0.744 x Vbat; THDom(max)= 0.581 x Vbat; Vbat = 7.0V; tBit= 50s; tamb = -40C THRec(min)= 0.284 x Vbat; THDom(min)= 0.422 x Vbat; Vbat = 7.6V ... 18V; tBit= 50s; Not measured on ATE. AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 6 0.396 0.5 0.366 0.5 0.5 0.581 AMIS-30600 LIN Transceiver Data Sheet Vbat VBB 100 nF 7 +5 V RL 3 100 nF AMIS30600 4 TxD 6 3 INH RxD 1 CL 5 2 20 pF LIN Load RL CL L1 1 k 1 nF L2 600 6.8 nF L3 500 10 nF GND EN PC20041207.1 Figure 5: Test Circuit for Timing Characteristics LIN 50% t RxD T_rec_F T_rec_R 50% 50% t LIN PC20041206.1 60% 60% PC20041204.1 40% 40% t T_slope_F T_slope_R PC20041206.2 Figure 6: Timing Diagram for AC Characteristics According to LIN 1.3 AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 7 AMIS-30600 LIN Transceiver TxD Data Sheet tBIT tBIT 50% t tBUS_dom(max) LIN tBUS_rec(min) THRec(max) THDom(max) Thresholds receiver 1 THRec(min) THDom(min) Thresholds receiver 2 t tBUS_dom(min) RxD tBUS_rec(max) ( receiver 2) 50% trx_pdr trx_pdf t PC20041206.3 Figure 7: Timing Diagram for AC Characteristics According to LIN 2.0 +13.5 V VBB 100 nF VCC +5.25 V 7 3 1 k 100 nF TxD 4 EN AMIS30600 6 LIN 1 nF 1 nF 3 2 1 INH 5 GND RxD 20 pF PC20050113.2 Figure 8: Test Circuit for Transient Measurements AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 8 Transient Generator AMIS-30600 LIN Transceiver Data Sheet 7.0 Package Outline SOIC-8: Plastic small outline; 8 leads; body width 150 mil; JEDEC: MS-012. AMIS reference: SOIC150 8 150 G AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 9 AMIS-30600 LIN Transceiver Data Sheet 8.0 Soldering 8.1 Introduction to Soldering Surface Mount Packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in the AMIS "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 8.2 Re-flow Soldering Re-flow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printedcircuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical re-flow peak temperatures range from 215 to 250C. The top-surface temperature of the packages should preferably be kept below 230C. 8.3 Wave Soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the doublewave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): o Larger than or equal to 1.27mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; o Smaller than 1.27mm, the footprint longitudinal axis must be parallel to the transport direction of the printedcircuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printedcircuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is four seconds at 250C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 8.4 Manual Soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300C. When using a dedicated tool, all other leads can be soldered in one operation within two to five seconds between 270 and 320C. Table 9: Soldering Process Package Soldering Method Wave Reflow(1) BGA, SQFP Not suitable Suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS Not suitable (2) Suitable PLCC (3) , SO, SOJ Suitable Suitable LQFP, QFP, TQFP Not recommended (3)(4) Suitable SSOP, TSSOP, VSO Not recommended (5) Suitable Notes: 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods." 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5mm. AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 10 AMIS-30600 LIN Transceiver Data Sheet 9.0 Company or Product Inquiries For more information about AMI Semiconductor, our technology and our product, visit our website at: http://www.amis.com North America Tel: +1.208.233.4690 Fax: +1.208.234.6795 Europe Tel: +32 (0) 55.33.22.11 Fax: +32 (0) 55.31.81.12 Devices sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMIS makes no warranty of merchantability or fitness for any purposes. AMIS reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI Semiconductor's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMIS for such applications. Copyright (c)2005 AMI Semiconductor, Inc. AMI Semiconductor - Rev. 2.0, Apr. 2005 www.amis.com 11