Battery Pack
PACK–
PACK+
SDA
SCL
TS
REG25
VPWR
HDQ
SRP
Vss
HDQ
SDA
SCL
PACKP
CHG
DSG
SRN
VBAT
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
bq27741-G1 Single-Cell Li-Ion Battery Fuel Gauge with Integrated Protection
1 Features 3 Description
The Texas Instruments bq27741-G1 Li-Ion battery
1 Battery Fuel Gauge and Protector for 1-Series Li- fuel gauge is a microcontroller peripheral that
Ion Applications provides fuel gauging for single-cell Li-Ion battery
Microcontroller Peripheral Provides: packs. The device requires little system
Accurate Battery Fuel Gauging Supports up to microcontroller firmware development for accurate
battery fuel gauging. The fuel gauge resides within
14,500 mAh the battery pack or on the system’s main board with
External and Internal Temperature Sensors for an embedded battery (non-removable). The fuel
Battery Temperature Reporting gauge provides hardware-based over- and
Precision 16-Bit High-Side Coulomb Counter undervoltage, overcurrent in charge or discharge, and
with High-Side Low-Value Sense Resistor short-circuit protections.
(5 mto 20 m)The fuel gauge uses the patented Impedance
Lifetime and Current Data Logging Track™ algorithm for fuel gauging, and provides
information such as remaining battery capacity
64 Bytes of Non-Volatile Scratch Pad Flash (mAh), state-of-charge (%), run-time to empty
SHA-1/HMAC Authentication (minimum), battery voltage (mV), and temperature
Battery Fuel Gauging Based on Patented (°C), as well as recording vital parameters throughout
Impedance Track™ Technology the lifetime of the battery.
Models Battery Discharge Curve for Accurate The device comes in a 15-ball BGA package
Time-To-Empty Predictions (2.776 mm × 1.96 mm) that is ideal for space-
Automatically Adjusts for Aging, Self- constrained applications.
Discharge, and Temperature- and Rate- Device Information(1)
Induced Effects on Battery PART NUMBER PACKAGE BODY SIZE (NOM)
Advanced Fuel Gauging Features bq27741-G1 YZF (15) 2.78 mm × 1.96 mm
Internal Short Detection (1) For all available packages, see the orderable addendum at
Tab Disconnection Detection the end of the data sheet.
Safety and Protection:
Over- and Undervoltage Protection with Low- Simplified Schematic
Power Mode
Overcharging and Discharging Current
Protection
Overtemperature Protection
Short-Circuit Protection
Low-Voltage Notification
Voltage Doubler to Support High-Side
N-Channel FET Protection
HDQ and I2C Interface Formats for
Communication with Host System
Small 15-Ball NanoFree™ (BGA) Packaging
2 Applications
Smartphones
PDAs
Digital Still and Video Cameras
Handheld Terminals
MP3 or Multimedia Players
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Table of Contents
7.19 Data Flash Memory Characteristics........................ 9
1 Features.................................................................. 17.20 I2C-Compatible Interface Timing Characteristics.... 9
2 Applications ........................................................... 17.21 HDQ Communication Timing Characteristics ......... 9
3 Description............................................................. 17.22 Typical Characteristics.......................................... 11
4 Revision History..................................................... 28 Detailed Description............................................ 12
5 Device Comparison Table..................................... 38.1 Overview................................................................. 12
6 Pin Configuration and Functions......................... 38.2 Functional Block Diagram....................................... 12
7 Specifications......................................................... 48.3 Feature Description................................................. 13
7.1 Absolute Maximum Ratings ...................................... 48.4 Device Functional Modes........................................ 16
7.2 ESD Ratings.............................................................. 49 Application and Implementation ........................ 22
7.3 Recommended Operating Conditions....................... 59.1 Application Information .......................................... 22
7.4 Thermal Information.................................................. 59.2 Typical Applications ................................................ 22
7.5 Power-On Reset........................................................ 610 Power Supply Recommendations ..................... 29
7.6 2.5-V LDO Regulator ............................................... 610.1 Power Supply Decoupling..................................... 29
7.7 Charger Attachment and Removal Detection ........... 611 Layout................................................................... 29
7.8 Voltage Doubler ........................................................ 611.1 Layout Guidelines ................................................. 29
7.9 Overvoltage Protection (OVP) .................................. 611.2 Layout Example .................................................... 31
7.10 Undervoltage Protection (UVP)............................... 712 Device and Documentation Support................. 32
7.11 Overcurrent in Discharge (OCD)............................. 712.1 Device Support...................................................... 32
7.12 Overcurrent in Charge (OCC)................................. 712.2 Documentation Support ........................................ 32
7.13 Short-Circuit in Discharge (SCD)............................ 712.3 Community Resources.......................................... 32
7.14 Low-Voltage Charging............................................. 812.4 Trademarks........................................................... 32
7.15 Internal Temperature Sensor Characteristics......... 812.5 Electrostatic Discharge Caution............................ 32
7.16 Internal Clock Oscillators ........................................ 812.6 Glossary................................................................ 32
7.17 Integrating ADC (Coulomb Counter)
Characteristics ........................................................... 813 Mechanical, Packaging, and Orderable
7.18 ADC (Temperature and Cell Voltage) Information ........................................................... 32
Characteristics ........................................................... 8
4 Revision History
Changes from Revision B (April 2015) to Revision C Page
Changed Pin Configuration and Functions ............................................................................................................................ 3
Changed Absolute Maximum Ratings.................................................................................................................................... 4
Changed Recommended Operating Conditions .................................................................................................................... 5
Changed Functional Block Diagram..................................................................................................................................... 12
Deleted UNDERTEMPERATURE FAULT Mode ................................................................................................................. 21
Added Community Resources.............................................................................................................................................. 32
2Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
(TOP VIEW) (BOTTOM VIEW)
A1
A2
A3
B1
B2
C1
C2
C3
B3
D1
D2
D3
E1
E3
A1
A2
A3
B1
B2
C1
C2
C3 B3
D1
D2
D3
E1
E2
E3
E2
BOTTOM VIEW
SRP
CHG
DSG
SRN
NC
VPWR
BAT
SDA PACKP
RC2
VSS
HDQ
SCL
TS
REG25
3
2
1
ABCDE
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
5 Device Comparison Table
PRODUCTION FIRMWARE VERSION COMMUNICATION FORMAT
PART NO.(1)
bq27741YZFR-G1 1.08 I2C, HDQ(1)
bq27741YZFT-G1
(1) bq27741-G1 is shipped in the I2C mode.
6 Pin Configuration and Functions
YZF Package
15-Pin DSBGA
Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
BAT C2 IA Cell-voltage measurement input. ADC input
CHG A2 O External high-side N-channel charge FET driver
DSG A3 O External high-side N-channel discharge FET driver
HDQ D2 IO HDQ serial communications line. Open-drain
PACKP B3 IA Pack voltage measurement input for protector operation
NC B2 IO Not used. Reserved for future GPIO. Recommended to connect to GND.
RC2 D3 IO General purpose IO. Push-pull output
REG25 E1 P Regulator output and bq27741-G1 processor power. Decouple with 1-µF ceramic capacitor to VSS.
SCL E3 IO Slave I2C serial communications clock input line for communication with system. Use with 10-kΩ
pullup resistor (typical).
SDA C3 IO Slave I2C serial communications data line for communication with system. Open-drain I/O. Use with
10-kΩpullup resistor (typical).
SRN B1 IA Analog input pin connected to the internal coulomb counter where SRN is nearest the CELL+
connection. Connect to sense resistor.
SRP A1 IA Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK+
connection. Connect to sense resistor.
VPWR C1 P Power input. Decouple with 0.1-µF ceramic capacitor to VSS.
VSS D1 P Device ground
TS E2 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input
(1) IO = Digital input-output, IA = Analog input, P = Power connection, O = Output
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Table 1. Default Configuration
OVERVOLTAGE UNDERVOLTAGE OVERCURRENT IN OVERCURRENT IN SHORT CIRCUIT IN
PROTECTION (VOVP) PROTECTION (VUVP) DISCHARGE (VOCD) CHARGE (VOCC) DISCHARGE (Vscd)
4.390 V 2.407 V 34.4 mV 20 mV 74.6 mV
OVERVOLTAGE UNDERVOLTAGE OVERCURRENT IN SHORT CIRCUIT IN
OVERCURRENT IN
PROTECTION DELAY PROTECTION DELAY DISCHARGE DELAY DISCHARGE DELAY
CHARGE DELAY (tOCC)
(tOVP) (tUVP) (tOCD) (tscd)
1 s 31.25 ms 31.25 ms 7.8125 ms 312.5 µs
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VVPWR Power input –0.3 5.5 V
VREG25 Supply voltage –0.3 2.75 V
PACKP input pin –0.3 5.5 V
VPACKP PACK+ input when external 2-kΩresistor is in series with PACKP input pin (see (1)) –0.3 28 V
VOUT Voltage output pins (DSG, CHG) –0.3 10 V
VIOD1 Push-pull IO pins (RC2) –0.3 2.75 V
VIOD2 Open-drain IO pins (SDA, SCL, HDQ, NC) –0.3 5.5 V
VBAT BAT input pin –0.3 5.5 V
VIInput voltage to all other pins (SRP, SRN) –0.3 5.5 V
VTS Input voltage for TS –0.3 2.75 V
TAOperating free-air temperature –40 85 °C
TFFunctional temperature –40 100 °C
TSTG Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
7.3 Recommended Operating Conditions
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITION MIN NOM MAX UNIT
No operating restrictions 2.8 5
VVPWR Supply voltage V
No FLASH writes 2.45 2.8
External input capacitor for internal
CVPWR 0.1 µF
Nominal capacitor values specified.
LDO between VPWR and VSS Recommend a 5% ceramic X5R
External output capacitor for type capacitor located close to the
CREG25 internal LDO between REG25 and 0.47 1 µF
device.
VSS Fuel gauge in NORMAL mode.
Normal operating mode
ICC ILOAD >Sleep Current with charge 167 µA
current(1)(2) (VPWR) pumps on (FETs on)
Fuel gauge in SLEEP+ mode.
ISLP SLEEP mode current(1)(2) (VPWR) ILOAD <Sleep Current with charge 88 µA
pumps on (FETs on)
Fuel gauge in SLEEP mode.
FULLSLEEP mode current(1)(2)
IFULLSLP ILOAD <Sleep Current with charge 40 µA
(VPWR) pumps on (FETs on)
Fuel gauge in SHUTDOWN mode.
UVP tripped with fuel gauge and
protector turned off (FETs off) 0.1 0.2 µA
Shutdown mode current(1)(2)
ISHUTDOWN VVPWR = 2.5 V
(VPWR) TA= 25°C
TA= –40°C to 85°C 0.5 µA
Output voltage low (SCL, SDA,
VOL IOL = 1 mA 0.4 V
HDQ, NC, RC2)
Output voltage high (SDA, SCL, External pullup resistor connected
VOH(OD) VREG25 0.5 V
HDQ, NC, RC2) to VREG25
Input voltage low (SDA, SCL,
VIL –0.3 0.6 V
HDQ, NC)
Input voltage high (SDA, SCL,
VIH(OD) 1.2 5.5 V
HDQ, NC)
VA1 Input voltage range (TS) VSS 0.125 2 V
VA2 Input voltage range (BAT) VSS 0.125 5 V
VVPWR VVPWR +
VA3 Input voltage range (SRP, SRN) V
0.125 0.125
Ilkg Input leakage current (I/O pins) 0.3 µA
tPUCD Power-up communication delay 250 ms
(1) All currents are specified as charge pump on (FETs on).
(2) All currents are continuous average over 5-second period.
7.4 Thermal Information bq27741-G1
THERMAL METRIC(1) YZF [DSBGA] UNIT
15 PINS
RθJA Junction-to-ambient thermal resistance 70
RθJC(top) Junction-to-case (top) thermal resistance 17
RθJB Junction-to-board thermal resistance 20 °C/W
ψJT Junction-to-top characterization parameter 1
ψJB Junction-to-board characterization parameter 18
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
7.5 Power-On Reset
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIT+ Increasing battery voltage input at VREG25 2.09 2.20 2.31 V
VHYS Power-on reset hysteresis 115 mV
7.6 2.5-V LDO Regulator(1)
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
2.8 V VVPWR 4.5 V, 2.3 2.5 2.6 V
IOUT(1) 16 mA TA= –40°C to
VREG25 Regulator output voltage 2.45 V VVPWR < 2.8 V (low 85°C
battery), 2.3 V
IOUT(1) 3 mA TA= –40°C to
ISHORT (2) Short-circuit current limit VREG25 = 0 V 250 mA
85°C
(1) LDO output current, IOUT, is the sum of internal and external load currents.
(2) Assured by characterization. Not production tested.
7.7 Charger Attachment and Removal Detection
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCHGATT Voltage threshold for charger attachment detection 2.7 3 V
VCHGREM Voltage threshold for charger removal detection 0.5 1 V
7.8 Voltage Doubler
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IL= 1 µA
VFETON CHG and DSG FETs on 2 × VVPWR 0.4 2 × VVPWR 0.2 2 × VVPWR V
TA= –40°C to 85°C
VFETOFF CHG and DSG FETs off TA= –40°C to 85°C 0.2 V
IL= 1 µA
VFETRIPPLE(1) CHG and DSG FETs on 0.1 VPP
TA= –40°C to 85°C
CL= 4 nF
FET gate rise time
tFETON TA= –40°C to 85°C 67 140 218 μs
(10% to 90%) No series resistance
CL= 4 nF
FET gate fall time
tFETOFF TA= –40°C to 85°C 10 30 60 μs
(90% to 10%) No series resistance
(1) Assured by characterization. Not production tested.
7.9 Overvoltage Protection (OVP)
TA= 25°C and CREG25 = 1.0 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= 25°C VOVP 0.006 VOVP VOVP + 0.006
TA= 0°C to 25°C VOVP 0.023 VOVP VOVP + 0.020
OVP detection voltage
VOVP V
threshold TA= 25°C to 50°C VOVP 0.018 VOVP VOVP + 0.014
TA= –40°C to 85°C VOVP 0.053 VOVP VOVP + 0.035
TA= 25°C VOVPREL 0.012 VOVP 0.215 VOVPREL + 0.012
TA= 0°C to 25°C VOVPREL 0.023 VOVP 0.215 VOVPREL + 0.020
VOVPREL OVP release voltage V
TA= 25°C to 50°C VOVPREL 0.018 VOVP 0.215 VOVPREL + 0.014
TA= –40°C to 85°C VOVPREL 0.053 VOVP 0.215 VOVPREL + 0.035
6Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Overvoltage Protection (OVP) (continued)
TA= 25°C and CREG25 = 1.0 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tOVP OVP delay time TA= –40°C to 85°C tOVP 5% tOVP tOVP + 5% s
7.10 Undervoltage Protection (UVP)
TA= 25°C and CREG25 = 1.0 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= 25°C VUVP 0.012 VUVP VUVP + 0.012
UVP detection voltage
VUVP TA= –5°C to 50°C VUVP 0.020 VUVP VUVP + 0.020 V
threshold TA= –40°C to 85°C VUVP 0.040 VUVP VUVP + 0.040
TA= 25°C VUVPREL 0.012 VUVP + 0.105 VUVPREL + 0.012
VUVPREL UVP release voltage TA= –5°C to 50°C VUVPREL 0.020 VUVP + 0.105 VUVPREL + 0.020 V
TA= –40°C to 85°C VUVPREL 0.040 VUVP + 0.105 VUVPREL + 0.040
tUVP UVP delay time TA= –40°C to 85°C tUVP 5% tUVP tUVP + 5% ms
7.11 Overcurrent in Discharge (OCD)
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= 25°C VOCD 3 VOCD VOCD + 3
VSRN VSRP
OCD detection voltage TA= –20°C to 60°C
VOCD VOCD 3.785 VOCD VOCD + 3.785 mV
threshold VSRN VSRP
TA= –40°C to 85°C VOCD 4.16 VOCD VOCD + 4.16
VSRN VSRP
tOCD OCD delay time TA= –40°C to 85°C tOCD 5% tOCD tOCD + 5% ms
7.12 Overcurrent in Charge (OCC)
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= 25°C VOCC 3 VOCC VOCC + 3
VSRP VSRN
OCC detection voltage TA= –20°C to 60°C
VOCC VOCC 3.49 VOCC VOCC + 3.49 mV
threshold VSRP VSRN
TA= –40°C to 85°C VOCC 3.86 VOCC VOCC + 3.86
VSRP VSRN
tOCC OCC delay time TA= –40°C to 85°C tOCC 5% tOCC tOCC + 5% ms
7.13 Short-Circuit in Discharge (SCD)
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA= 25°C VSCD 3 VSCD VSCD + 3
VSRN VSRP
SCD detection voltage TA= –20°C to 60°C
VSCD VSCD 4.5 VSCD VSCD + 4.5 mV
threshold VSRN VSRP
TA= –40°C to 85°C VSCD 4.9 VSCD VSCD + 4.9
VSRN VSRP
tSCD SCD delay time TA= –40°C to 85°C tSCD 10% tSCD tSCD + 10% µs
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
7.14 Low-Voltage Charging
TA= 25°C, CREG25 = 1.0 µF, and VVPWR = 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Voltage threshold for low-voltage charging
VLVDET TA= –40°C to 85°C 1.4 1.55 1.7 V
detection
7.15 Internal Temperature Sensor Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G(TEMP) Temperature sensor voltage gain –2 mV/°C
7.16 Internal Clock Oscillators
2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
fOSC Operating frequency 8.389 MHz
f(LOSC) Operating frequency 32.768 kHz
7.17 Integrating ADC (Coulomb Counter) Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VVPWR +
VSR_IN Input voltage range, VSRN and VSRP VSR = VSRN VSRP VVPWR 0.125 V
0.125
Conversion time Single conversion 1 s
tSR_CONV Resolution 14 15 bits
VSR_OS Input offset 10 μV
INL Integral nonlinearity error ±0.007% ±0.034% FSR
ZSR_IN Effective input resistance(1) 7 MΩ
ISR_LKG Input leakage current(1) 0.3 μA
(1) Assured by design. Not production tested.
7.18 ADC (Temperature and Cell Voltage) Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range (VBAT channel) VSS 0.125 5 V
VADC_IN Input voltage range (other channels) VSS 0.125 1 V
tADC_CONV Conversion time 125 ms
Resolution 14 15 bits
VADC_OS Input offset 1 mV
ZADC1 Effective input resistance (TS) (1) 55 MΩ
Not measuring cell voltage 55 MΩ
ZADC2 Effective input resistance (BAT)(1) Measuring cell voltage 100 kΩ
IADC_LKG Input leakage current(1) 0.3 μA
(1) Assured by design. Not production tested.
8Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
7.19 Data Flash Memory Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Data retention(1) 10 years
tDR Flash programming write-cycles (1) 20,000 cycles
tWORDPROG Word programming time(1) 2 ms
ICCPROG Flash-write supply current(1) 5 10 mA
(1) Assured by design. Not production tested.
7.20 I2C-Compatible Interface Timing Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
MIN TYP MAX UNIT
tRSCL or SDA rise time 300 ns
tFSCL or SDA fall time 300 ns
tw(H) SCL pulse width (high) 600 ns
tw(L) SCL pulse width (low) 1.3 μs
tsu(STA) Setup for repeated start 600 ns
td(STA) Start to first falling edge of SCL 600 ns
tsu(DAT) Data setup time 100 ns
th(DAT) Data hold time 0 ns
tsu(STOP) Setup time for stop 600 ns
tBUF Bus free time between stop and start 66 μs
fSCL Clock frequency 400 kHz
7.21 HDQ Communication Timing Characteristics
TA= –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA= 25°C and VREG25 = 2.5 V (unless otherwise noted)
MIN TYP MAX UNIT
t(CYCH) Cycle time, host to fuel gauge 190 μs
t(CYCD) Cycle time, fuel gauge to host 190 205 250 μs
t(HW1) Host sends 1 to fuel gauge 0.5 50 μs
t(DW1) Fuel gauge sends 1 to host 32 50 μs
t(HW0) Host sends 0 to fuel gauge 86 145 μs
t(DW0) Fuel gauge sends 0 to host 80 145 μs
t(RSPS) Response time, fuel gauge to host 190 950 μs
t(B) Break time 190 μs
t(BR) Break recovery time 40 μs
t(RST) HDQ reset 1.8 2.2 s
t(RISE) HDQ line rise time to logic 1 (1.2 V) 950 ns
Turnaround time (time from the falling edge of the last transmitted bit of 8-bit
t(TRND) 210 μs
data and the falling edge of the next Break signal)
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: bq27741-G1
t(B) t(BR)
t(HW1)
t(HW0)
t(CYCH)
t(DW1)
t(DW0)
t(CYCD)
Break 7-bit address 8-bit data
(a) Break and Break Recovery
(c) Host Transmitted Bit (d) Gauge Transmitted Bit
(e) Gauge to Host Response
1.2V
t(RISE)
(b) HDQ line rise time
1-bit
R/W
t(RSPS)
t(RST)
(f) HDQ Reset
f. HDQ Host to fuel gauge
e. Fuel gauge to Host response format
d. Fuel gauge to Host communication
c. HDQ Host to fuel gauge communication
b. Rise time of HDQ line
a. HDQ Breaking
tSU(STA)
SCL
SDA
tw(H) tw(L) tftrt(BUF)
tr
td(STA)
REPEATED
START
th(DAT) tsu(DAT)
tftsu(STOP)
STOP START
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Figure 1. I2C-Compatible Interface Timing Diagrams
Figure 2. HDQ Timing Diagrams
10 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
C001
C001
C001
C001
C001
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
7.22 Typical Characteristics
Figure 3. Overvoltage Delay Time Figure 4. Undervoltage Delay Time
Figure 5. Overcurrent in Charge Delay Time Figure 6. Overcurrent in Discharge Delay Time
Figure 7. Short-Circuit Current in Discharge Delay Time
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: bq27741-G1
VPWR
BAT
REG25
TS
SRN
SRP
PACKP
CHG
NC DSG
RC2 SDA
VSS SCL
HDQ
MUX
+
4R
+
VOVP
Data
FLASH
LDO
Data
SRAM
CC
ADC
Protector
FSM
OVP
Delay
+UVP
Delay
+
VUVP
+
OCD
Delay
+
VOCD
+
SCD
Delay
+
VSCD
+
VOCC
+
OCC
Delay
2.5 V
R
5 k
Internal
Temp
Sensor
Wake
Comparator
Instruction
FLASH
Instruction
ROM
CHG Drive
DSG Drive
VPWR
I2C Engine
CPU
22
22
88HDQ
Engine
HFO LFO
+
0.3 V
+
GP Timer
and
PWM
I/O
Controller
Wake
and
Watchdog
Timer
360 k
20 k
VPWR
HFO
HFO/128
HFO/128
HFO /4
POR
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
8 Detailed Description
8.1 Overview
The bq27741-G1 fuel gauge accurately predicts the battery capacity and other operational characteristics of a
single Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information, such
as state-of-charge (SOC), time-to-empty (TTE), and time-to-full (TTF).
8.2 Functional Block Diagram
12 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
8.3 Feature Description
NOTE
Formatting Conventions in This Document:
Commands:italics with parentheses and no breaking spaces, for example,
RemainingCapacity().
Data Flash:italics,bold, and breaking spaces, for example, Design Capacity.
Register Bits and Flags: brackets only, for example, [TDA]
Data Flash Bits:italic and bold, for example, [XYZ1]
Modes and states: ALL CAPITALS, for example, UNSEALED mode.
8.3.1 Configuration
Cell information is stored in the fuel gauge in non-volatile flash memory. Many of these data flash locations are
accessible during application development. They cannot, generally, be accessed directly during end-equipment
operation. To access these locations, use individual commands, a sequence of data-flash-access commands, or
the Battery Management Studio (bqStudio) Software. To access a desired data flash location, the correct data
flash subclass and offset must be known. For more information on the data flash, see the bq27741-G1 Pack-Side
Impedance Track™ Battery Fuel Gauge With Integrated Protector and LDO User's Guide (SLUUAA3).
The fuel gauge provides 96 bytes of user-programmable data flash memory, partitioned into two 64-byte blocks:
Manufacturer Info Block A and Manufacturer Info Block B. This data space is accessed through a data flash
interface.
8.3.2 Fuel Gauging
The key to the high-accuracy gas gauging prediction is the Texas Instruments proprietary Impedance Track
algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-of-charge
predictions that can achieve less than 1% error across a wide variety of operating conditions and over the
lifetime of the battery.
See the Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Note
(SLUA364) for further details.
8.3.3 Wake-Up Comparator
The wake-up comparator indicates a change in cell current while the fuel gauge is in SLEEP mode. The wake
comparator threshold can be configured in firmware and set to the thresholds in Table 2. An internal event is
generated when the threshold is breached in either charge or discharge directions.
Table 2. IWAKE Threshold Settings(1)
RSNS1 RSNS0 IWAKE Vth(SRP-SRN)
0 0 0 Disabled
0 0 1 Disabled
0 1 0 1 mV or –1 mV
0 1 1 2.2 mV or –2.2 mV
1 0 0 2.2 mV or –2.2 mV
1 0 1 4.6 mV or –4.6 mV
1 1 0 4.6 mV or –4.6 mV
1 1 1 9.8 mV or –9.8 mV
(1) The actual resistance value versus the setting of the sense resistor is not important—only the actual voltage threshold is important when
calculating the configuration. The voltage thresholds are typical values under room temperature.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
8.3.4 Battery Parameter Measurements
8.3.4.1 Charge and Discharge Counting
The integrating delta-sigma ADC gauges the charge or discharge flow of the battery by measuring the voltage
drop across a small-value sense resistor between the SRP and SRN pins. The integrating ADC measures bipolar
signals and detects charge activity when VSR = VSRP VSRN is positive and discharge activity when VSR = VSRP
VSRN is negative. The fuel gauge continuously integrates the signal over time using an internal counter.
8.3.4.2 Voltage
The fuel gauge updates cell voltages at 1-second intervals when in NORMAL mode. The internal ADC of the fuel
gauge measures the voltage, and scales and calibrates it appropriately. Voltage measurement is automatically
compensated based on temperature. This data is also used to calculate the impedance of the cell for Impedance
Track fuel gauging.
8.3.4.3 Current
The fuel gauge uses the SRP and SRN inputs to measure and calculate the battery charge and discharge
current using a 5-mΩto 20-mΩtypical sense resistor.
8.3.4.4 Auto-Calibration
The bq27741-G1 device provides an auto-calibration feature to cancel the voltage offset error across SRN and
SRP for maximum charge measurement accuracy, and performs auto-calibration before entering the SLEEP
mode.
8.3.4.5 Temperature
The fuel gauge external temperature sensing is optimized with the use of a high-accuracy negative temperature
coefficient (NTC) thermistor with R25 = 10 kΩ± 1% and B25/85 = 3435 kΩ± 1% (such as Semitec 103AT for
measurement). The fuel gauge can also be configured to use its internal temperature sensor. The fuel gauge
uses temperature to monitor the battery-pack environment, which is used for fuel gauging and cell protection
functionality.
8.3.5 Communications
8.3.5.1 HDQ Single-Pin Serial Interface
The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to
the fuel gauge. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted
first. The DATA signal on pin 12 is open-drain and requires an external pullup resistor. The 8-bit command code
consists of two fields: the 7-bit HDQ command code (bits 0 through 6) and the 1-bit RW field (MSB bit 7). The
RW field directs the fuel gauge to either one of the following:
Store the next 8 bits of data to a specified register, or
Output 8 bits of data from the specified register.
The HDQ peripheral can transmit and receive data as either an HDQ master or slave.
HDQ serial communication is normally initiated by the host processor sending a break command to the fuel
gauge. A break is detected when the DATA pin is driven to a logic low state for a time t(B) or greater. The DATA
pin then is returned to its normal ready logic high state for a time t(BR). The fuel gauge is now ready to receive
information from the host processor.
The fuel gauge is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral.
14 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
DATA[7:0]
ACMD[7:0]
S 0ADDR[6:0] AP
NP
P
A AS 0ADDR[6:0] CMD[7:0] Sr 1ADDR[6:0] A DATA[7:0]
DATA[7:0] PN
AAPCMD[7:0] DATA[7:0] A
A AS 0ADDR[6:0] CMD[7:0] Sr 1ADDR[6:0] A DATA[7:0] A DATA[7:0]
S 0ADDR[6:0] S1
ADDR[6:0] A
PN
PN
. . .
(a) (b)
( c)
(d)
Host Generated GG Generated
P
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
8.3.5.2 HDQ Host Interruption
The default fuel gauge behaves as an HDQ slave-only device. If the HDQ interrupt function is enabled, the fuel
gauge is capable of mastering and also communicating to a HDQ device. There is no mechanism for negotiating
which is to function as the HDQ master, and care must be taken to avoid message collisions. The interrupt is
signaled to the host processor with the fuel gauge mastering an HDQ message. This message is a fixed
message that signals the interrupt condition. The message itself is 0x80 (slave write to register 0x00) with no
data byte being sent as the command is not intended to convey any status of the interrupt condition. The HDQ
interrupt function is not public and is only enabled by command.
When the SET_HDQINTEN subcommand is received, the fuel gauge detects any of the interrupt conditions and
asserts the interrupt at 1-s intervals until either:
The CLEAR_HDQINTEN subcommand is received, or
The number of tries for interrupting the host has exceeded a predetermined limit. After the interrupt event,
interrupts are automatically disabled. To re-enable interrupts, SET_HDQINTEN needs to be sent.
8.3.5.2.1 Low Battery Capacity
This feature works identically to SOC1. It uses the same data flash entries as SOC1 and triggers interrupts as
long as SOC1 = 1 and HDQIntEN = 1.
8.3.5.2.2 Temperature
This feature triggers an interrupt based on the OTC (Overtemperature in Charge) or OTD (Overtemperature in
Discharge) condition being met. It uses the same data flash entries as OTC or OTD and triggers interrupts as
long as either the OTD or OTC condition is met and HDQIntEN = 1. (See details in HDQ Host Interruption.)
8.3.5.3 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, one-byte write quick read, and functions. The
7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit
device address is therefore 0xAA or 0xAB for write or read, respectively.
Figure 8. Supported I2C Formats
(a) 1-byte write
(b) Quick read
(c) 1-byte read
(d) Incremental read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop).
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. Quick writes function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
Attempt to write a read-only address (NACK after data sent by master):
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: bq27741-G1
xx
xx
xx
A AS
xx
xx
xx
0
xxxxxxxx
xxxxxxxx
xxxxxxxx
ADDR[6:0]
xxxxxxxxx
xxxxxxxxx
xxxxxxxxx
CMD[7:0]
xxx
xxx
xxx
Sr
xx
xx
xx
1
xxxxxxxx
xxxxxxxx
xxxxxxxx
ADDR[6:0] A DATA[7:0]
xxx
xxx
xxx
A DATA[7:0]
xx
xx
xx
P
xxx
xxx
xxx
N
xx
xx
xx
A AS A
xx
xx
xx
0
xx
xx
xx
P
xxxxxxxx
xxxxxxxx
xxxxxxxx
ADDR[6:0]
xxxxxxxxx
xxxxxxxxx
xxxxxxxxx
CMD[7:0]
xxxxxxxxx
xxxxxxxxx
xxxxxxxxx
DATA[7:0]
xxxxxxxxx
xxxxxxxxx
xxxxxxxxx
DATA[7:0] A 66Ps
xx
xx
xx
A AS
xx
xx
xx
0
xxxxxxxx
xxxxxxxx
xxxxxxxx
ADDR[6:0]
xxxxxxxxx
xxxxxxxxx
xxxxxxxxx
CMD[7:0]
xxx
xxx
xxx
Sr
xxx
xxx
xxx
1
xxxxxxx
xxxxxxx
xxxxxxx
ADDR[6:0] A DATA[7:0]
xxx
xxx
xxx
A DATA[7:0]
xx
xx
xx
A
DATA[7:0]
xx
xx
xx
A DATA[7:0]
xx
xx
xx
P
xxx
xxx
xxx
N
Waiting time between control subcommand and reading results
Waiting time between continuous reading results
66Ps
66Ps
A CMD[7:0]
S0
ADDR[6:0] ASr DATA[7:0]
1ADDR[6:0] AA DATA[7:0] PN
Address
0x7F
Data from
addr 0x74
Data from
addr 0x00
DATA[7:0] A
ACMD[7:0] N
S0
ADDR[6:0] DATA[7:0]
AP
N
. . .
A P
CMD[7:0] N
S 0ADDR[6:0] P
P
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Attempt to read an address above 0x7F (NACK command):
Attempt at incremental writes (NACK all extra data bytes sent):
Incremental read at the maximum allowed read address:
The I2C engine releases both SDA and SCL if the I2C bus is held low for t(BUSERR). If the fuel gauge was holding
the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines
low, the I2C engine enters the low-power SLEEP mode.
8.3.5.3.1 I2C Time Out
The I2C engine releases both SDA and SCL lines if the I2C bus is held low for about 2 seconds. If the fuel gauge
was holding the lines, releasing them frees the master to drive the lines.
8.3.5.3.2 I2C Command Waiting Time
To ensure the correct results of a command with the 400-kHz I2C operation, a proper waiting time must be added
between issuing a command and reading the results. For subcommands, the following diagram shows the
waiting time required between issuing the control command and reading the status with the exception of the
checksum command. A 100-ms waiting time is required between the checksum command and reading the result.
For read-write standard commands, a minimum of 2 seconds is required to get the result updated. For read-only
standard commands, there is no waiting time required, but the host must not issue any standard command more
than two times per second. Otherwise, the gauge could result in a reset issue due to the expiration of the
watchdog timer.
Figure 9. I2C Command Waiting Time
The I2C clock stretch could happen in a typical application. A maximum 80-ms clock stretch could be observed
during the flash updates. There is up to a 270-ms clock stretch after the OCV command is issued.
8.4 Device Functional Modes
To minimize power consumption, the fuel gauge has three power modes: NORMAL, SLEEP, and FULLSLEEP.
The fuel gauge passes automatically between these modes, depending upon the occurrence of specific events,
though a system processor can initiate some of these modes directly.
16 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Device Functional Modes (continued)
8.4.1 NORMAL Mode
The fuel gauge is in NORMAL mode when not in any other power mode. During this mode, AverageCurrent(),
Voltage(), and Temperature() measurements are taken, and the interface data set is updated. Decisions to
change states are also made. This mode is exited by activating a different power mode.
Because the fuel gauge consumes the most power in NORMAL mode, the Impedance Track algorithm minimizes
the time the fuel gauge remains in this mode.
8.4.2 SLEEP Mode
SLEEP mode performs AverageCurrent(),Voltage(), and Temperature() less frequently, which results in reduced
power consumption. SLEEP mode is entered automatically if the feature is enabled (Pack Configuration
[SLEEP] = 1) and AverageCurrent() is below the programmable level Sleep Current. Once entry into SLEEP
mode has been qualified, but prior to entering it, the fuel gauge performs an ADC autocalibration to minimize
offset.
During the SLEEP mode, the fuel gauge periodically takes data measurements and updates its data set.
However, a majority of its time is spent in an idle condition.
The fuel gauge exits SLEEP if any entry condition is broken, specifically when either:
AverageCurrent() rises above Sleep Current, or
A current in excess of IWAKE through RSENSE is detected.
8.4.3 FULLSLEEP Mode
FULLSLEEP mode turns off the high-frequency oscillator and performs AverageCurrent(),Voltage(), and
Temperature() less frequently, which results in power consumption that is lower than that of the SLEEP mode.
FULLSLEEP mode can be enabled by two methods:
Setting the [FULLSLEEP] bit in the Control Status register using the FULL_SLEEP subcommand and Full
Sleep Wait Time (FS Wait) in data flash is set as 0.
Setting the Full Sleep Wait Time (FS Wait) in data flash to a number larger than 0. This method is disabled
when the FS Wait is set as 0.
FULLSLEEP mode is entered automatically when it is enabled by one of the methods above. When the first
method is used, the gauge enters the FULLSLEEP mode when the fuel gauge is in SLEEP mode. When the
second method is used, the FULLSLEEP mode is entered when the fuel gauge is in SLEEP mode and the timer
counts down to 0.
The fuel gauge exits the FULLSLEEP mode when there is any communication activity. Therefore, the execution
of SET_FULLSLEEP sets the [FULLSLEEP] bit. The FULLSLEEP mode can be verified by measuring the
current consumption of the gauge.
During FULLSLEEP mode, the fuel gauge periodically takes data measurements and updates its data set.
However, a majority of its time is spent in an idle condition.
The fuel gauge exits SLEEP if any entry condition is broken, specifically when either:
AverageCurrent() rises above Sleep Current, or
A current in excess of IWAKE through RSENSE is detected.
While in FULLSLEEP mode, the fuel gauge can suspend serial communications by as much as 4 ms by holding
the comm line(s) low. This delay is necessary to correctly process host communication, because the fuel gauge
processor is mostly halted in SLEEP mode.
8.4.4 Battery Protector Description
The battery protector controls two external high-side N-channel FETs in a back-to-back configuration for battery
protection. The protector uses two voltage doublers to drive the CHG and DSG FETs on.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Device Functional Modes (continued)
8.4.4.1 High-Side N-Channel FET Charge and Discharge FET Drive
The CHG or DSG FET is turned on by pulling the FET gate input up to VFETON. The FETs are turned off by
pulling the FET gate input down to VSS. These FETs are automatically turned off by the protector based on the
detected protection faults, or when commanded to turn off via the FETTest(0x74/0x75) extended command.
Once the protection fault(s) is cleared, the FETs may be turned on again.
8.4.4.2 Operating Modes
The battery protector has several operating modes:
Virtual SHUTDOWN mode
ANALOG SHUTDOWN
Low voltage charging
UVP fault (POR state)
NORMAL mode
SHUTDOWN WAIT
OCD or SCD FAULT mode
OCC FAULT mode
OVP FAULT mode
The relationships among these modes are shown in Figure 10.
18 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
V
VPWR
< V
OVPREL
AND
Fault recovery:
Charger removed
Fault recovery:
load removed
(V
SRN
V
SRP
) > V
OCD
OR
(V
SRN
V
SRP
) > V
SCD
V
VPWR
> V
OVP
(V
SRP
V
SRN
) > V
OCC
Fault recovery:
Charger removed POR
OCD/SCD Fault
CHG FET on
DSG FET off
Fuel Gauge on
LDO on
OCC Fault
CHG FET off
DSG FET on
Fuel Gauge on
LDO on
OVP Fault
CHG FET off
DSG FET on
Fuel Gauge on
LDO on
Analog Shutdown
CHG FET off
DSG FET off
Fuel Gauge off
LDO is off
Low Voltage Charging
CHG FET control shorted to
PACKP pin
DSG FET off
Protection off
Fuel Gauge off
LDO is off
Normal
Fuel Gauge in
Normal, SLEEP,
FULLSLEEP Modes
CHG FET on
DSG FET on
Fuel Gauge on
LDO is on
Charger attached
AND
V
VPWR
>V
LVDET
Virtual Shutdown
UVP Fault
(POR State)
CHG FET on
DSG FET off
Fuel Gauge on
LDO is on
V
VPWR
> V
UVPREL
VVPWR < VUVP
Charger removed
Charger removed
Shutdown Wait
CHG FET off
DSG FET off
Fuel Gauge on
LDO is on
Shutdown bit
cleared
Charger removed
FW(ROM) turns
FETs off briefly
Shutdown Bit
set
(Force UVP set)
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Device Functional Modes (continued)
Figure 10. Operating Modes
8.4.4.2.1 VIRTUAL SHUTDOWN Mode
In this mode, the fuel gauge is not functional and only certain portions of analog circuitry are running to allow
device wakeup from shutdown and low voltage charging.
8.4.4.2.1.1 ANALOG SHUTDOWN Mode
In this mode, the fuel gauge is not functional. Once the charger is connected, the fuel gauge determines if low
voltage charging is allowed and then transitions to low voltage charging.
8.4.4.2.1.2 LOW-VOLTAGE CHARGING Mode
In this mode, the fuel gauge closes the CHG FET by shorting the gate to the PACKP pin. Low voltage charging
continues until the cell voltage (VVPWR) rises above the POR threshold.
8.4.4.2.2 UNDERVOLTAGE FAULT Mode
In this mode, the voltage on VPWR pin is below VUVP and the charger is connected. As soon as the charger
disconnects, the fuel gauge transitions into ANALOG SHUTDOWN mode to save power.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Device Functional Modes (continued)
The fuel gauge can enter this mode from LOW VOLTAGE CHARGING mode when the battery pack is being
charged from a deeply discharged state or from NORMAL mode when the battery pack is being discharged
below the allowed voltage.
When the battery pack is charged above VUVPREL, the fuel gauge transitions to NORMAL mode.
8.4.4.2.3 NORMAL Mode
In this mode, the protector is fully powered and operational. Both CHG and DSG FETs are closed, while further
operation is determined by the firmware. The protector is continuously checking for all faults.
The CHG or DSG FET may be commanded to be opened via the protector register by the firmware, but it does
not affect protector operation or change the mode of operation.
Firmware can also command the fuel gauge to go into SHUTDOWN mode based on the command from the host.
In this case, firmware sets the shutdown bit to indicate intent to go into SHUTDOWN mode. The fuel gauge then
transitions to SHUTDOWN WAIT mode.
8.4.4.2.4 SHUTDOWN WAIT Mode
In this mode, the shutdown bit was set by the firmware and the fuel gauge initiated the shutdown sequence.
The shutdown sequence is as follows:
1. Open both CHG and DSG FETs.
2. Determine if any faults are set. If any faults are set, then go back to NORMAL mode.
3. Wait for charger removal. Once the charger is removed, turn off the LDO, which puts the fuel gauge into
ANALOG SHUTDOWN mode.
8.4.4.2.5 OVERCURRENT IN DISCHARGE (OCD) and SHORT-CIRCUIT IN DISCHARGE (SCD) FAULT Mode
In this mode, a short-circuit in discharge (SCD) or overcurrent in discharge (OCD) protection fault is detected
when the voltage across the sense resistor continuously exceeds the configured VOCD or VSCD thresholds for
longer than the configured delay.
The fuel gauge enables the fault removal detection circuitry, which monitors load removal. A special high
resistance load is switched on to monitor load presence. The OCD/SCD fault is cleared when the load is
removed, which causes the fuel gauge to transition into NORMAL mode.
8.4.4.2.6 OVERCURRENT IN CHARGE (OCC) FAULT Mode
In this mode, an overcurrent in charge (OCC) protection fault is detected when the voltage across the sense
resistor continuously exceeds the configured VOCC for longer than the configured delay.
The fuel gauge enables the fault removal detection circuitry, which monitors the charger removal. The OCC fault
is cleared once the charger voltage drops below the cell voltage by more than 300 mV, which causes the fuel
gauge to transition to NORMAL mode.
8.4.4.2.7 OVERVOLTAGE PROTECTION (OVP) FAULT Mode
In this mode, an OVERVOLTAGE PROTECTION (OVP) fault mode is entered when the voltage on VPWR pin
continuously exceeds the configured VOVP threshold for longer than the configured delay.
The fuel gauge enables the fault removal detection circuitry, which monitors the charger removal. The OVP fault
is cleared once the charger voltage drops below the cell voltage by more than 300 mV and the cell voltage drops
below VOVPREL, which causes the fuel gauge to transition to NORMAL mode.
8.4.4.3 Firmware Control of Protector
The firmware has control to open the CHG FET or DSG FET independently by overriding hardware control.
However, it has no control to close the CHG FET or DSG FET and can only disable the FET override.
20 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Device Functional Modes (continued)
8.4.5 OVERTEMPERATURE FAULT Mode
Overtemperature protection is implemented in firmware. Gauging firmware monitors temperature every second
and opens the CHG and DSG FETs if Temperature() >OT Prot Threshold for OT Prot Delay. The CHG and DSG
FETs override will be released when Temperature() <OT Prot Recover.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: bq27741-G1
B1
A1
B3
A2
A3
C3
E3
D2
C1
C2
E1
E2
B2
D3
D1
VPWR
BAT[RC3]
REG25
TS
NC
RC2
VSS
SRN
SRP
PACKP
CHG
DSG
SDA
SCL
HDQ
2
6
5
1
S2
S2A
S1A
S1
G2
G1
4
3
R2 5 mΩ
Q1
UPA2375T1P
R3
1 k
R5
1 k
R13
2 k
C8
0.1 Fµ
C7
0.1 Fµ
R4
100
R8
100
R7 R10
D2
100 100
4
3
2
1
PACK+
I2C_SDA
I2C_CLK
PACK–
TB2
R16
10
C1
C2
R1
10
C3
C4
TB1
CELL+
CELL–
1
2
3
0.1 Fµ
0.1 Fµ
1 Fµ
.47 Fµ
Ext Therm
RT1
10 k
200
C5
0.1 Fµ
R11 R12
C6
0.1 Fµ
200
C9
0.1 Fµ C10 0.1 Fµ
C11
C12
0.1 Fµ
0.1 Fµ
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The bq27741-G1 device is a single-cell fuel gauge with integrated Li-Ion protection circuitry for highly accurate
detection of overvoltage, undervoltage, overcurrent in charge, overcurrent in discharge, and short-circuit in
discharge fault conditions. If the detected fault continues to be present for a specific delay time (pre-configured in
the device), the protection front-end will disable the applicable charge pump circuit, resulting in opening of the
FET until the provoking safety condition resolves. The integrated 16-bit delta-sigma converters provide accurate,
high precision measurements for voltage, current, and temperature in order to accomplish effective battery
monitoring, protection, and gauging. To allow for optimal performance in the end application, special
considerations must be taken to ensure minimization of measurement error through proper printed circuit board
(PCB) layout and correct configuration of battery characteristics in the fuel gauge data flash. Such requirements
are detailed in Design Requirements.
9.2 Typical Applications
9.2.1 Pack-Side, Single-Cell Li-Ion Fuel Gauge and Protector
Figure 11. Typical Application Schematic, I2C Mode
22 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
B1
A1
B3
A2
A3
C3
E3
D2
C1
C2
E1
E2
B2
D3
D1
VPWR
BAT[RC3]
REG25
TS
NC
RC2
VSS
SRN
SRP
PACKP
CHG
DSG
SDA
SCL
HDQ
2
6
5
1
S2
S2A
S1A
S1
G2
G1
4
3
R2 5 mΩ
Q1
UPA2375T1P
R3
1 k
R5
1 k
R13
2 k
C8
0.1 Fµ
C7
0.1 Fµ
3
2
1
PACK+/Load+
HDQ
PACK /Load
TB3
R16
10
C1
C2
R1
10
C3
C4
TB1
CELL+
CELL–
1
2
3
0.1 Fµ
0.1 Fµ
1 Fµ
.47 Fµ
Ext Therm
RT1
10 k
200
C5
0.1 Fµ
R11 R12
C6
0.1 Fµ
200
C9
0.1 Fµ C10 0.1 Fµ
C11
C12
0.1 Fµ
0.1 Fµ
D1
1.8-V pullup. HDQ requires pack-side pullup.
R10
100
R7
100
4.7 k
R17
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Typical Applications (continued)
Figure 12. Typical Application Schematic, HDQ Mode
9.2.1.1 Design Requirements
Several key parameters must be updated to align with a given application's battery characteristics. For highest
accuracy gauging, it is important to follow-up this initial configuration with a learning cycle to optimize resistance
and maximum chemical capacity (Qmax) values prior to sealing and shipping packs to the field. Successful and
accurate configuration of the fuel gauge for a target application can be used as the basis for creating a "golden"
file that can be written to all production packs, assuming identical pack design and Li-Ion cell origin (chemistry,
lot, and so on). Calibration data can be included as part of this golden file to cut down on battery pack production
time. If using this method, it is recommended to average the calibration data from a large sample size and use
these in the golden file.
NOTE
It is recommended to calibrate all packs individually as this will lead to the highest
performance and lowest measurement error in the end application on a per-pack basis. In
addition, the integrated protection functionality should be correctly configured to ensure
activation based on the fault protection needs of the target pack design, or else accidental
trip could be possible if using defaults.
Table 3 shows the items that should be configured to achieve reliable protection and accurate gauging with
minimal initial configuration.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Typical Applications (continued)
Table 3. Key Data Flash Parameters for Configuration
NAME DEFAULT UNIT RECOMMENDED SETTING
Set based on the nominal pack capacity as shown in the cell manufacturer's data
Design Capacity 1000 mAh sheet. If multiple parallel cells are used, should be set to N × Cell Capacity.
Set based on the nominal pack energy (nominal cell voltage × nominal cell
Design Energy 3800 mWh capacity) as shown in the cell manufacturer's data sheet. If multiple parallel cells
are used, should be set to N × Cell Energy.
Set to 10 to convert all power values to cWh or to 1 for mWh. Design Energy is
Design Energy Scale 1 divided by this value.
Set to desired runtime remaining (in seconds/3600) × typical applied load
Reserve Capacity 0 mAh between reporting 0% SOC and reaching Terminate Voltage, if needed.
Design Voltage 3800 mV Set to nominal cell voltage per manufacturer data sheet.
Cycle Count Threshold 900 mAh Set to 90% of configured Design Capacity.
Should be configured using TI-supplied Battery Management Studio (bqStudio)
software. Default open-circuit voltage and resistance tables are also updated in
Device Chemistry 0354 hex conjunction with this step. Do not attempt to manually update reported Device
Chemistry as this does not change all chemistry information. Always update
chemistry using the appropriate software tool (that is, bqStudio).
Load Mode 1 Set to applicable load model, 0 for constant current or 1 for constant power.
Load Select 1 Set to load profile which most closely matches typical system load.
Set to initial configured value for Design Capacity. The gauge will update this
Qmax Cell 0 1000 mAh parameter automatically after the optimization cycle and for every regular Qmax
update thereafter.
Set to nominal cell voltage for a fully charged cell. The gauge will update this
V at Chg Term 4350 mV parameter automatically each time full charge termination is detected.
Set to empty point reference of battery based on system needs. Typical is
Terminate Voltage 3000 mV between 3000 and 3200 mV.
Ra Max Delta 43 mΩSet to 15% of Cell0 R_a 4 resistance after an optimization cycle is completed.
Set based on nominal charge voltage for the battery in normal conditions (25°C,
Charging Voltage 4350 mV and so on). Used as the reference point for offsetting by Taper Voltage for full
charge termination detection.
Set to the nominal taper current of the charger + taper current tolerance to ensure
Taper Current 100 mA that the gauge will reliably detect charge termination.
Sets the voltage window for qualifying full charge termination. Can be set tighter
Taper Voltage 100 mV to avoid or wider to ensure possibility of reporting 100% SOC in outer JEITA
temperature ranges that use derated charging voltage.
Sets threshold for gauge detecting battery discharge. Should be set lower than
Dsg Current Threshold 60 mA minimal system load expected in the application and higher than Quit Current.
Sets the threshold for detecting battery charge. Can be set higher or lower
Chg Current Threshold 75 mA depending on typical trickle charge current used. Also should be set higher than
Quit Current.
Sets threshold for gauge detecting battery relaxation. Can be set higher or lower
Quit Current 40 mA depending on typical standby current and exhibited in the end system.
Current profile used in capacity simulations at onset of discharge or at all times if
Avg I Last Run –299 mA Load Select = 0. Should be set to nominal system load. Is automatically updated
by the gauge every cycle.
Power profile used in capacity simulations at onset of discharge or at all times if
Avg P Last Run –1131 mW Load Select = 0. Should be set to nominal system power. Is automatically
updated by the gauge every cycle.
Sets the threshold at which the fuel gauge enters SLEEP mode. Take care in
Sleep Current 15 mA setting above typical standby currents else entry to SLEEP may be
unintentionally blocked.
If auto-shutdown of fuel gauge is required prior to protect against accidental
discharge to undervoltage condition, set this to desired voltage threshold for
Shutdown V 0 mV completely powering down the fuel gauge. Recovery occurs when a charger is
connected.
Set to desired temperature at which charging is prohibited to prevent cell damage
OT Chg 55 °C due to excessive ambient temperature.
24 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Typical Applications (continued)
Table 3. Key Data Flash Parameters for Configuration (continued)
NAME DEFAULT UNIT RECOMMENDED SETTING
Set to desired time before CHG FET is disabled based on overtemperature.
OT Chg Time 5 s Since temperature changes much more slowly than other fault conditions, the
default setting is sufficient for most application.
OT Chg Recovery 50 °C Set to the temperature threshold at which charging is no longer prohibited.
Set to desired temperature at which discharging is prohibited to prevent cell
OT Dsg 60 °C damage due to excessive ambient temperature.
Set to desired time before DSG FET is disabled based on overtemperature. Since
OT Dsg Time 5 s temperature changes much more slowly than other fault conditions, the default
setting is sufficient for most application.
OT Dsg Recovery 55 °C Set to the temperature threshold at which cell discharging is no longer prohibited.
Calibrate this parameter using TI-supplied bqStudio software and calibration
CC Gain 5 mΩprocedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to current.
Calibrate this parameter using TI-supplied bqStudio software and calibration
CC Delta 5.074 mΩprocedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to passed charge.
Calibrate this parameter using TI-supplied bqStudio software and calibration
CC Offset 6.874 mA procedure in the TRM. Determines native offset of coulomb counter hardware
that should be removed from conversions.
Calibrate this parameter using TI-supplied bqStudio software and calibration
Board Offset 0.66 µA procedure in the TRM. Determines native offset of the printed circuit board
parasitics that should be removed from conversions.
Calibrate this parameter using TI-supplied bqStudio software and calibration
procedure in the TRM. Determines voltage offset between cell tab and ADC input
Pack V Offset 0 mV node to incorporate back into or remove from measurement, depending on
polarity.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It is most effective in applications with load profiles that exhibit
high frequency current pulses (that is, cell phones), but is recommended for use in all applications to reduce
noise on this sensitive high impedance measurement node.
The series resistor between the battery and the BAT input is used to limit current that could be conducted
through the chip-scale package's solder bumps in the event of an accidental short during the board assembly
process. The resistor is not likely to survive a sustained short condition (depends on power rating); however, it
damages the much cheaper resistor component over suffering damage to the fuel gauge die itself.
9.2.1.2.2 SRP and SRN Current Sense Inputs
The filter network at the input to the coulomb counter is intended to improve differential mode rejection of voltage
measured across the sense resistor. These components should be placed as close as possible to the coulomb
counter inputs and the routing of the differential traces length-matched in order to best minimize impedance
mismatch-induced measurement errors. The single-ended ceramic capacitors should be tied to the battery
voltage node (preferably to a large copper pour connected to the SRN side of the sense resistor) in order to
further improve common-mode noise rejection. The series resistors between the CC inputs and the sense
resistor should be at least 200 Ωin order to mitigate SCR-induced latch-up due to possible ESD events.
9.2.1.2.3 Sense Resistor Selection
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect
the resulting differential voltage and derived current it senses. As such, it is recommended to select a sense
resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard
recommendation based on best compromise between performance and price is a 1% tolerance, 50-ppm drift
sense resistor with a 1-W power rating.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
9.2.1.2.4 TS Temperature Sense Input
Similar to the BAT pin, a ceramic decoupling capacitor for the TS pin is used to bypass AC voltage ripple away
from the high-impedance ADC input, minimizing measurement error. Another helpful advantage is that the
capacitor provides additional ESD protection since most thermistors are handled and manually soldered to the
PCB as a separate step in the factory production flow. It should be placed as close as possible to the respective
input pin for optimal filtering performance.
9.2.1.2.5 Thermistor Selection
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩresistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a 103AT-2 type thermistor profile and so that is the
default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance profile (for
example, JT-2 or others) requires an update to the default thermistor coefficients in data flash to ensure highest
accuracy temperature measurement performance.
9.2.1.2.6 VPWR Power Supply Input Filtering
A ceramic capacitor is placed at the input to the fuel gauge's internal LDO in order to increase power supply
rejection (PSR) and improve effective line regulation. It ensures that voltage ripple is rejected to ground instead
of coupling into the device's internal supply rails.
9.2.1.2.7 REG25 LDO Output Filtering
A ceramic capacitor is also needed at the output of the internal LDO to provide a current reservoir for fuel gauge
load peaks during high peripheral utilization. It acts to stabilize the regulator output and reduce core voltage
ripple inside of the device.
9.2.1.2.8 Communication Interface Lines
A protection network composed of resistors and zener diodes is recommended on each of the serial
communication inputs to protect the fuel gauge from serious ESD transients. The Zener should be selected to
break down at a voltage larger than the typical pullup voltage for these lines but less than the internal diode
clamp breakdown voltage of the device inputs (approximately 6 V). A zener voltage of 5.6 V is typically
recommended. The series resistors are used to limit the current into the Zener diode and prevent component
destruction due to thermal strain once it goes into breakdown. 100 Ωis typically recommended for these
resistance values.
9.2.1.2.9 PACKP Voltage Sense Input
Inclusion of a 2-kΩseries resistor on the PACKP input allows it to tolerate a charger overvoltage event up to
28 V without device damage. The resistor also protects the device in the event of a reverse polarity charger
input, since the substrate diode will be forward biased and attempt to conduct charger current through the fuel
gauge (as well as the high FETs). An external reverse charger input FET clamp can be added to short the DSG
FET gate to its source terminal, forcing the conduction channel off when negative voltage is present at PACK+
input to the battery pack and preventing large battery discharge currents. A ceramic capacitor connected at the
PACKP pin helps to filter voltage into the comparator sense lines used for checking charger and load presence.
In addition, in the LOW VOLTAGE CHARGING state, the minimal circuit elements that are operational are
powered from this input pin and require a stable supply.
9.2.1.2.10 CHG and DSG Charge Pump Voltage Outputs
The series resistors used at the DSG and CHG output pins serve to protect them from damaging ESD events or
breakdown conditions, allowing the resistors to be damaged in place of the fuel gauge itself. An added bonus is
that they also help to limit in-rush currents due to use of FETs with large gate capacitance, allowing a smooth
ramp of power-path connection turn-on to the system.
26 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
9.2.1.2.11 N-Channel FET Selection
The selection of N-channel FETs for a single-cell battery pack design depends on a variety of factors including
package type, size, and device cost as well as performance metrics such as drain-to-source resistance
(rDS(on)), gate capacitance, maximum current and power handling, and similar. At a minimum, it is
recommended that the selected FETs have a drain-to-source voltage (VDS) and gate-to-source (VGS) voltage
tolerance of 12 V. Some FETs are designed to handle as much as 24 V between the drain and source terminals
and this would provide an increased safety margin for the pack design. Additionally, the DC current rating should
be high enough to safely handle sustained current in charge or discharge direction just below the maximum
threshold tolerances of the configured OCC and OCD protections and the lowest possible sense resistance value
based on tolerance and TCR considerations, or vice-versa. This ensures that there is sufficient power dissipation
margin given a worst-case scenario for the fault detections. In addition, striving for minimal FET resistance at the
expected gate bias as well as lowest gate capacitance will help reduce conduction losses and increase power
efficiency as well as achieve faster turn-on and turn-off times for the FETs. Many of these FETs are now offered
as dual, back-to-back N-channel FETs in wafer-chip scale (WCSP) packaging, decreasing both BOM count and
shrinking necessary board real estate to accommodate the components. Finally, refer to the safe operating area
(SOA) curves of the target FETs to ensure that the boundaries are never violated based on all possible load
conditions in the end application. The CSD83325L is an excellent example of a FET solution that meets all of the
aforementioned criteria, offering rDS(on) of 10.3 mΩand VDS of 12 V with back-to-back N-channel FETs in a
chip-scale package, a perfect fit for battery pack designs.
9.2.1.2.12 Additional ESD Protection Components
The additional capacitors placed across the CHG and DSF FET source pins as well as between PACK+ and
ground help to bolster and greatly improve the ESD robustness of the pack design. The former components
shunt damaging transients around the FETs and the latter components attempt to bypass such pulses to PACK–
before they couple further into the battery pack PCB. Two series capacitors are used for each of these protection
areas to prevent a battery short in the event of a single capacitor failure.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Links: bq27741-G1
2V / div
2V / div
5V / div
5V / div
20ms / div
2V / div
2V / div
5V / div
5V / div
20ms / div
500ms / div
2V / div
2V / div
5V / div
5V / div
2V / div
2V / div
5V / div
5V / div
50ms / div
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
9.2.1.3 Application Curves
Figure 13. Overvoltage Protection Set and Clear Figure 14. Undervoltage Protection Set and Clear
Figure 15. Overcurrent in Charge Protection Set and Clear Figure 16. Overcurrent in Discharge Protection Set and
Clear
28 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
100µs / div
2V / div
2V / div
5V / div
5V / div
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
Figure 17. Short-Circuit in Discharge Protection Set and Clear
10 Power Supply Recommendations
10.1 Power Supply Decoupling
The VPWR input pin and the REG25 output pin require low equivalent series resistance (ESR) ceramic
capacitors placed as closely as possible to the respective pins to optimize ripple rejection and to provide a stable
and dependable power rail that is resilient to line transients. A 0.1-μF capacitor at the VPWR and a 1-μF
capacitor at REG25 suffice for satisfactory device performance.
11 Layout
11.1 Layout Guidelines
11.1.1 Li-Ion Cell Connections
For the highest voltage measurement accuracy, it is important to connect the BAT pin directly to the battery
terminal PCB pad. This avoids measurement errors caused by IR drops when high charge or discharge currents
are flowing. Connecting directly at the positive battery terminal with a Kelvin connection ensures the elimination
of parasitic resistance between the point of measurement and the actual battery terminal. Likewise, the low
current ground return for the fuel gauge and all related passive components should be star-connected precisely
at the negative battery terminal. This technique minimizes measurement error due to current-induced ground
offsets and also improves noise performance through prevention of ground bounce that could occur with high
current and low current returns intersecting ahead of the battery ground. The bypass capacitor for this sense line
needs to be placed as close as possible to the BAT input pin.
11.1.2 Sense Resistor Connections
Kelvin connections at the sense resistor are as critical as those for the battery terminals themselves. The
differential traces should be connected at the inside of the sense resistor pads and not anywhere along the high
current trace path in order to prevent false increases to measured current that could result when measuring
between the sum of the sense resistor and trace resistance between the tap points. In addition, the routing of
these leads from the sense resistor to the input filter network and finally into the SRP and SRN pins needs to be
as closely matched in length as possible or an additional measurement offset may occur. It is further
recommended to add copper trace or pour-based "guard rings" around the perimeter of the filter network and
coulomb counter inputs to shield these sensitive pins from radiated EMI into the sense nodes. This prevents
differential voltage shifts that could be interpreted as real current change to the fuel gauge. All of the filter
components need to be placed as close as possible to the coulomb counter inputs pins.
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 29
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
Layout Guidelines (continued)
11.1.3 Thermistor Connections
The thermistor sense input should include a ceramic bypass capacitor placed as close to the TS input pin as
possible. The capacitor helps to filter measurements of any stray transients as the voltage bias circuit pulses
periodically during temperature sensing windows.
11.1.4 FET Connections
The battery current transmission path through the FETs should be routed with large copper pours to provide the
lowest resistance path possible to the system. Depending on package type, thermal vias can be placed in the
package land pattern's thermal pad to reduce thermal impedance and improve heat dissipation from the package
to the board, protecting the FETs during high system loading conditions. In addition, it is preferable to locate the
FETs and other heat generating components away from the low power pack electronics to reduce the chance of
temperature drift and associated impacts to data converter measurements. In the event of FET overheating,
keeping reasonable distance between the most critical components, such as the fuel gauge, and the FETs helps
to decrease the risk of thermal breakdown to the more fragile components.
11.1.5 ESD Component Connections
The ESD components included in the reference design that connect across the back-to-back FETs as well as
from PACK+ to ground require trace connections that are as wide and short as possible in order to minimize loop
inductance in their return path. This ensures impedance is lowest at the AC loop through the series capacitors
and makes this route most attractive for ESD transients such that they are conducted away from the vulnerable
low voltage, low power fuel gauge and passive components. The series resistors and Zener diodes connected to
the serial communications lines should be placed as close as possible to the battery pack connector to keep
large ESD currents confined to an area distant from the fuel gauge electronics. Further, all ESD components
referred to ground should be single-point connected to the PACK– terminal if possible. This reduces the
possibility of ESD coupling into other sensitive nodes well ahead of the PACK– ground return.
11.1.6 High Current and Low Current Path Separation
For best possible noise performance, it is important to separate the low current and high current loops to different
areas of the board layout. The fuel gauge and all support components should be situated on one side of the
board and tap off of the high current loop (for measurement purposes) at the sense resistor. Routing the low
current ground around instead of under high current traces further helps to improve noise rejection. Finally, the
high current path should be confined to a small loop from the battery, through the FETs, into the PACK
connector, and back.
30 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
Via connects to Power Ground
Via connects between two layers
CVPWR
CBAT
CREG25 RESD1
RESD3
RESD2
RESD4
RTHERM
PACK+
SDA
SCL
PACK-
CESD1 CESD2
CESD3
CESD4
CHGSRP DSG
NC
SRN PACK
P
BATVPWR SDA
HDQVSS RC2
TSREG25 SCL
S1
S2
G1
G2
S1
S2
CTHERM
CDIFF
CSRP
CSRN
RBAT
RSENSE
Star ground right at
negative battery
terminal for low current
return path
RSRN RSRP
Kelvin connect BAT
sense line right at
positive battery
terminal
Keep differential
traces length
matched
RVPWR
RDSG
Use short and wide
traces to minimize
inductance
Use short and wide
traces to minimize
inductance
RPACKP
RCHG
CPACKP
Use short and wide
traces to minimize
inductance
Use copper pours for
battery power path to
minimize IR losses
Star ground right at PACK-
for ESD return path
bq27741-G1
www.ti.com
SLUSBF2C JULY 2013REVISED AUGUST 2015
11.2 Layout Example
Figure 18. bq27741-G1 Board Layout
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 31
Product Folder Links: bq27741-G1
bq27741-G1
SLUSBF2C JULY 2013REVISED AUGUST 2015
www.ti.com
12 Device and Documentation Support
12.1 Device Support
For the Battery Management Studio (bqStudio) Software, go to http://www.ti.com/tool/bqstudio.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
bq27741-G1 Pack-Side Impedance Track™ Battery Fuel Gauge with Integrated Protector and LDO User's
Guide (SLUUAA3)
bq27741 EVM Single Cell Impedance Track™ Technology Evaluation Module User's Guide (SLUUAH1)
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
Impedance Track, NanoFree, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
32 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: bq27741-G1
PACKAGE OPTION ADDENDUM
www.ti.com 28-Jun-2016
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
BQ27741YZFR-G1 NRND DSBGA YZF 15 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 BQ27741-G1
BQ27741YZFT-G1 NRND DSBGA YZF 15 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 BQ27741-G1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Jun-2016
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
BQ27741YZFR-G1 DSBGA YZF 15 3000 180.0 8.4 2.06 2.88 0.69 4.0 8.0 Q1
BQ27741YZFT-G1 DSBGA YZF 15 250 180.0 8.4 2.06 2.88 0.69 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Aug-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ27741YZFR-G1 DSBGA YZF 15 3000 182.0 182.0 20.0
BQ27741YZFT-G1 DSBGA YZF 15 250 182.0 182.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Aug-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.625 MAX
0.35
0.15
15X 0.35
0.25
1 TYP
2
TYP
0.5
TYP
0.5 TYP
B E A
D
4219381/A 02/2017
DSBGA - 0.625 mm max heightYZF0015
DIE SIZE BALL GRID ARRAY
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. NanoFreeTM package configuration.
NanoFree Is a trademark of Texas Instruments.
BALL A1
CORNER
SEATING PLANE
BALL TYP 0.05 C
A13
0.015 C A B
SYMM
SYMM
C
2
B
D
E
SCALE 6.500
www.ti.com
EXAMPLE BOARD LAYOUT
15X ( 0.245)
(0.5) TYP
(0.5) TYP
( 0.245)
METAL 0.05 MAX
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
( 0.245)
SOLDER MASK
OPENING
0.05 MIN
4219381/A 02/2017
DSBGA - 0.625 mm max heightYZF0015
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
SYMM
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:30X
12
A
B
C
3
D
E
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
EXPOSED
METAL
SOLDER MASK
DEFINED
EXPOSED
METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(0.5)
TYP
(0.5) TYP
15X ( 0.25) (R0.05) TYP
METAL
TYP
4219381/A 02/2017
DSBGA - 0.625 mm max heightYZF0015
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
SYMM
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:40X
12
A
B
C
3
D
E
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Texas Instruments:
BQ27741YZFR-G1 BQ27741YZFT-G1