TB62785NG,TB62785FTG
TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB62785NG, TB62785FTG
7-SEGMENT DRIVERS W ITH BUILT-IN DECODERS
(COMMON ANODE CAPABILIT Y, MAXIMUM 4-DIGIT CONTROL)
The T B62785NG / T B627 85F T G are multifunctional, compact,
7-egment LED display drivers.
These ICs can directly drive 7-segment displays and individual
LEDs, and can control either a 4-digit display with decimal points, or
32 individual LED s.
These ICs can also be used with common-anode display s. Their
outputs are constant current, the ampere levels at which are set
using an external resistor.
A synchronous serial port connects the IC to the CPU.
The diff erent mo des of control provided by this devi ce includ ing
Duty Control Register Set, Digit Set, Decode Set and Standby Set,
are all based on every 16-bi t of serial data.
FEATURES
Control circuit power supply
: VDD = 4.5 to 5.5 V
Digit output rating
: 17 V / -400 mA
Decoder output rating
: 17 V / 50 mA
Built-in decoder
: Decodes the numerals 0 to 9, certain alphabetic
characters, and of course blanks code.
Digit control func tion
: Can scan digit outputs DIG-0 to DIG-3 when connected
to the common anode pins of a 7-segm ent dis play .
Max imum transmi ssion f requ e ncy
: fCLK = 15 MHz
Decoder outputs (OUT-a to OUT-Dp)
Output current can be set up to a 40mA maximum using an external resistor.
Constant current tolerance (Ta = 25°C, VDD = 5. 0 V)
: Variation between bits = ±7%, variation betw een dev ic es
(including variation between bits) = ±15% at VCE ≥ 0.7 V
Package
: TB62785NG SDIP24-P-300-1.78
: TB62785FTG P-VQFN24-0404-0.50-001
TB62785NG
SDIP24-P-300-1.78
Weight 1.22g (typ.)
TB62785FTG
P-VQFN24-0404-0.50-001
Weight 0.037g (typ.)
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TB62785NG,TB62785FTG
PIN A SSIGNMEN T ( Top view)
< TB62785NG (SDIP24) >
< TB62785FTG (VQFN24) >
*Note: VDD and L-GND are adjacent in TB62785FTG. (21pin / 22pin)
Please be careful.
TOP VIEW
DATA-OUT
L-GND
V
DD
DATA-IN
CLOCK
1
R-EXT
2
3
4
5
6
7
8
9
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
LOAD
OUT-f
OUT-g
OUT-e
OUT-d
OUT-Dp
OUT-c
OUT-b
OUT-a P-GND
TEST-IN2
TEST-IN1
DIG-0
DIG-1
VCC
DIG-2
DIG-3
P-GND
LOAD
OUT-f
DATA-OUT
L-GND
V
DD
DATA-IN
CLOCK
TOP VIEW
OUT-c
1
2
3
4
5
7
8
9
10
11
136
OUT-g
OUT-e
OUT-d
OUT-Dp
3
4
5
2
1
5
3
4
5
2
1
5
3
4
5
2
1
5
3
4
5
2
1
5
12
14
15
16
17
18
19
20
21
22
23
24
OUT-b
OUT-a
P-GND
TEST-IN2
TEST-IN1
DIG-0
DIG-1
V
CC
DIG-2
DIG-3
P-GND
R-EXT
(Note)
(Note)
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BLOCK DIAGR AM
16bit Shift Register
16bit D-type Latch
Latch Selector & LOAD pulse Dstributer
Digit-Limit Controller
Duty-Controller
Data-Selector (Decode or No Decode)
Stand-by Mode Controller
8bit D-type Latch for Digit-A
8bit D-type Latch for Digit-B
8bit D-type Latch for Digit-C
8bit D-type Latch for Digit-D
Octal 4tol Data Selector
CLOCK
DATA-IN
LOAD 16
DATA-OUT
Internal
OSC
BINARY to 7-Segment
Decoder
Octal 2tol Data Selector
8bit Bipolar
Constant-Current
Sink Driver
4bit Bipolar
Digit
Source Driver DIG-0~3
OUTa~Dp
R-EXT
4
8 (D
0
~D
7
)8 (D
8
~D
15
)
4
4
4
4
8
8
8
8
4
4
4
4
4
4
4
4
8
8
8
No Decode
Data
4
8
TEST-IN1
TEST-IN22
P-GND L-GND
2
V
CC
V
DD
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PIN FUNCTIONS
TB62785NG (SDIP24)
PIN
NUMBER I/O
(Note) PIN NAME FUNCTION
1 P VDD 5 V power pin.
2 I DATA-IN (DI) Serial data input pin.
3 I CLOCK (CK) Cloc k input pin. The shift register shifts data on the clock's rising edge.
4 I LOAD (LD) Load s i gnal input pin. The data in the D8 to D15 are read on the rising edge and
the load register is selected. And, the data of the D0 to D7 which corresponded
each register on the falling edge.
5 to 12 O OUT-a to
OUT-Dp Segment drive output pins. The a to Dp outputs correspond to the seven
segments. These pins output constant sink current. Connec t eac h of these pins
to the correspondi ng LED's cathode.
13, 21 P P-GND Ground pins, There are two which can be used to ground the output OUT-a to
OUT-Dp pins.
14 I TEST-IN2 Product test pin. In normal use, be sure to connect to ground.
15 I TEST-IN1 Product test pin. In normal use, be sure to connect to ground.
16, 17, 19, 20
O DIG-0 to DIG-3 Digit output pins. Each of these pins can control one of the four seven-segment
digits in a display.
These pins output the VCC pin voltage as a source current output. Connect
these pins to the LED anodes.
18 P VCC Power pin for digit output.
22 O R-EXT Current setting pin for the OUT-a to OUT-Dp pins. Connect a resistor bet ween
this pin and ground when setting the current.
23 O DATA-OUT (DO) S eri al data output pin. Use when TB62785NG/ TB62785FTG devic e is used in
cascade connections.
24 P L-GND Ground pin for logic and analog circuits.
*Note Explanation of I/O: I = Input Terminal, O = Output Terminal, P = Power Supply
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TB62785FTG (VQFN24)
PIN
NUMBER I/O
(Note) PIN NAME FUNCTION
1 I LOAD (LD) Load s i gnal input pin. The data in the D8 to D15 are read on the rising edge and
the load register is selected. And, the data of the D0 to D7 which corresponded
each register on the falling edge.
2 to 9 O OUT-a to Dp Segment drive output pins. The A to Dp outputs correspond to the seven
segments. These pins output constant sink current. Connec t eac h of these pins
to the correspondi ng LED's cathode.
10, 18 P P-GND Ground pins, There are two which can be used to ground the output OUT-a to
OUT-Dp pins.
11 I TEST-IN2 Product test pin. In normal use, be sure to connect to ground.
12 I TEST-IN1 Product test pin. In normal use, be sure to connect to ground.
13, 14, 16, 17
O DIG-0 to DIG-3
Digit output pins. Each of these pins can control one of the four seven-segment
digits in a display.
These pins output the VCC pin voltage as a source current output. Connect
these pins to the LED anodes.
15 P VCC Power pin for digit output.
19 O R-EXT Current setting pin for the OUT-a to OUT-Dp pins. Connect a resistor bet ween
this pin and ground when setting the current.
20 O DATA-OUT (DO) S eri al data output pin. Use when TB62785NG/TB62785FTG device is used in
cascade connections.
21 P L-GND Ground pin for logic and analog circuits.
22 P VDD 5 V power pin.
23 I DATA-IN (DI) Serial data input pin.
24 I CLOCK (CK) Clock input pin. The shift register shifts data on the clock's risi ng edge.
*Note Explanation of I/O: I = Input Terminal, O = Output Terminal, P = Power Supply
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TIMING DIAGR AM
DATA INPUT
Transfer data to the DATA-IN pin on every 16-bit combining address (8bits) and data (8bits). After the 16th
clock signal input following this data transfer input a load signal from the LD pin.
Input the load signal using an Active High pulse. The register address is set on the rising edge of the load pulse.
On the subsequent falling edge, the data are read as data of the mode of the register.
t
DHO
pHL-SEG
pLH-SEG
pHL-DIG
pLH-DIG
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DESCRIPTION OF OPERATION
Data input (DATA-IN, CLOCK, LOAD)
The data are input serially using the DATA-IN pin. The data input interface consists of a total of three
inputs: DATA-IN, LOAD, and CLOCK.
Binary code stored in the 16-bit shift register offers control modes including duty Control Register Set, Digitset,
Decode Set, and Standby Set,
The data are shifted on the rising edge of the clock, starting from the MSB. Cascade-connecting
TB62785NG/TB62785FTG devices provides capability for controlling a larger number of digits.
The serial data in the 16-bit shift register are used as follows: the four bits D15 (MSB) to D12 select the IC
operating mode (Table 1), while D11 to D8 select the register corresponding to the operating mode (Table 2).
Bits D7 to D0 (LSB) of the 16-bit shift register are used for detail settings, such as number of digits in use,
character settings in each digit, and light intensity.
The internal registers are loaded on the rising edge of the LOAD signal, which causes loading of data from an
external source into the D15 (MSB) to D8 bits of the shift register, operating mode and the corresponding
register selection data. On the subsequent falling edge, the detail setting data of D7 to D0 (LSB) are loaded.
Normally LOAD is Low. After a serial transfer of 16bits, the input of a High-level pulse loads the data.
Note the following caution: Use the D15 to D8 setting and the D7 to D0 detail data setting as a pair. If only the
D7 to D0 data are input without setting D15 to D8 an error condition may result, in which the device will not
operate normally. If the current mode is set again by a new signal, the data for D15 to D8 must also be re-input.
Operating precautions
At power-on or after operation in Clear mode (in initial state), set the IC to Normal mode again. Otherwise, the
IC will not drive the LED.
Operating the IC in Blank mode (all lights off) or in All On mode (all lights lit) does not affect the internal data.
Setting the IC to Normal mode again continues the LED lighting in the state governed by the settings made
immediately before mode change.
Normal mode (not Shut Down, Clear, Blank, or All On mode) continues the operations set in Load Register
mode. In Normal mode, operations are governed by any new settings made in the Load Register, as soon as the
changed setting value s are loaded.
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Operating modes (Table 1.)
These ICs support the following five operating modes:
1. Blank : Forcibly turns OFF the constant-current output both for data and for digit setting. This
mode is not affected by the values in bits D11 to D0.
2. Normal Operate : Used for display operations after the settings of the digits are complete. This mode is not
affected by the values in bits D11 to D0.Note that setting this mode without making any other
settings will cause display of the numeral 0.
3. Load Register : Used for the detail settings of the Duty Control Register, for setting Decode / No Decode,
for inputting display data, and for setting the number of digits to drive. D11 to D0 of the
shift register are used for the detail settings of the digits currently being driven (Table 2).
4. All On : Forcibly turns ON the data-side constant-current output. This mode is not affected by
D11 to D0.
The initial sett ing is four dig it s. When the digit s must be chan ged,
use Load Register mo de to set the number of digits to drive.
5. Standby : Used to set Standby state (in which internal data are not cleared) and to clear data
(initial iz ation) . The settings in D3 to D0 of the shift register determine the choice between
standby state or initialization.
Table 1 Operating mode settings
REGISTER DATA
INITIAL
SETTING
D15 D14 D13 D12 D11 to D8 D7 to D4 D3 to D0
HEX
CODE
BLANK (OUT -n & DIG-0 to
3 ALL-OFF) 0 0 0 0 - - - 0---H *
NORMAL (OPERATION) 0 0 0 1 - - - 1---H -
LOAD REGIST E R (DUTY ,
DECODE, DIGIT & DATA) 0 0 1 0 X X X 2XXXH -
ALL ON (OUTn ALL-ON) 0 0 1 1 - - - 3---H -
STAND-BY 0 1 0 0 - - X 4--XH -
X = Input H or L. "-" = Are not affected by the truth table.
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Load Register Selection modes (Table 2)
These modes select the register to provide the data to control the IC operation. The Load Register selection
mode is determined by the settings of D15 to D12 and D11 to D8 of the shift register.
1. Duty Register : The data in D7 to D0 of this register set the digit output duty cycle.
Duty settings can be made in 16 steps from 0 / 16 to 15 / 16.
(See Table 3)
2. Decode & Digit Register : Sets Decode / No Decode and the number of digits to drive. Decode can be set
using D7 to D4.
The number of digits driven ca n be set using D3 to D0. Decode / No Decode and
the number of digits driven are set simultaneously.
3. Data registers 0 to 3 : Set the display data corresponding to DIG0 to DIG3 respectively.
D7 to D0 of the shift register are used to set the display data.
Table 2 Load register selection
REGISTER DATA
D15 to D12 D11 D10 D9 D8 D7 to D4 D3 to D0
HEX
CODE
LOAD DUTY REGI STER 2H 0 0 0 0 X X 20XXH
LOAD DECODE & DIGIT REGISTER 2H 0 0 0 1 X X 21XXH
LOAD DATA REGISTER 0 2H 0 0 1 0 X X 22XXH
LOAD DATA REGISTER 1 2H 0 0 1 1 X X 23XXH
LOAD DATA REGISTER 2 2H 0 1 0 0 X X 24XXH
LOAD DATA REGISTER 3 2H 0 1 0 1 X X 25XXH
X = Input H or L. "-" = Are not affected by the truth table.
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DUTY CONTROL REGISTE R SETTINGS
Duty Control Register detail settings and operation (Table 3)
Writing 20H to D15 to D8 and w riting 0 to FH to D3 to D0 sets the duty cycle shown in the following table for the
digit-side sour ce dr iver output. The duty cycle can be set in 16 steps.
The initial sett ing is 15 / 16. Af t er Data Clear, the setting is also 15 / 16.
The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or
standby state).
Table 3 Duty control register settings
DUTY CYCLE
REGISTER DATA
INIT IAL SETTING
D15 to D8
D7 to D4
D3
D2
D1
D0
HEX CODE
0 / 16 20H - 0 0 0 0 20X0H -
1 / 16 20H - 0 0 0 1 20X1H -
2 / 16 20H - 0 0 1 0 20X2H -
3 / 16 20H - 0 0 1 1 20X3H -
4 / 16 20H - 0 1 0 0 20X4H -
5 / 16 20H - 0 1 0 1 20X5H -
6 / 16 20H - 0 1 1 0 20X6H -
7 / 16 20H - 0 1 1 1 20X7H -
8 / 16 20H - 1 0 0 0 20X8H -
9 / 16 20H - 1 0 0 1 20X9H -
10 / 16 20H - 1 0 1 0 20XAH -
11 / 16 20H - 1 0 1 1 20XBH -
12 / 16 20H - 1 1 0 0 20XCH -
13 / 16 20H - 1 1 0 1 20XDH -
14 / 16 20H - 1 1 1 0 20XEH -
15 / 16 20H - 1 1 1 1 20XFH
*
X = Input H or L. "-" = Are not affected by the truth table.
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DIGIT SETTINGS
Setting the number of digits (Table 4)
Writing 21H to D15 to D8 and at the same step writ ing 0H to 3H to D3 to D0 sets the number of digits to a maximum
of four the display. The initial setting is four digits, and four will also be set by a Data Clear.
The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or
standby state).
When changing the number of digits, also set D7 to D4.
Table 4 Digit settings
REGISTER DATA
INITIAL
SETTING
D
15
to D
8
D
7
to D
4
D
3
D
2
D
1
D
0
HEX CODE
ACTIVATED DIG--0 ONLY 21H X 0 0 0 0 21X0H -
ACTIVATED DIG--0 to 1 21H X 0 0 0 1 21X1H -
ACTIVATED DIG--0 to 2 21H X 0 0 1 0 21X2H -
ACTIVATED DIG--0 to 3 21H X 0 0 1 1 21X3H
*
X = Input H or L. "-" = Are not affected by the truth table.
DECODE SETTINGS
Decode settings (Table 5)
The settings for Decode are the same as the settings for the number of digits, described under setting, above.
Writing 21H to D15 to D8 and w riting 0 to 1H to D7 to D4 set Decod e mode.
When using this IC for controlling the lighting on individual LEDs used for a dot matrix rather than a
7-segment display, set to No Decode.
As Table 6 shows, D0 in the data register is used to turn OUT-a ON and OFF ; D1 turns OUT-b ON and OFF.
The initial setting is Decode mode, and Decode mode will also be set by a Data Clear.
The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or
standby state).
Since D3 to D0 are also used for setting the number of digits, when changing the Decode setting, also set D3 to
D0.
Table 5 Decode settings
REGISTER DATA
INITIAL
SETTING
D
15
to
D8
D7 D6 D5 D4 D3 to D0 HEX CODE
PASS DECODER (NO DECODE) 21H 0 0 0 0 X 210XH -
DECODE 21H 0 0 0 1 X 211XH
*
X = Input H or L. "-" = Are not affected by the truth table.
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THE FOLLOW ING TABLE SHOWS THE CORRES PONDENCE BE TWEE N THE SERI AL
DATA AND THE OUTPUT PINS WHEN NO DECODE IS SET
Table 6 Correspondence betwee n ser ial data and output pins in no decode mode
REGISTER DATA OUTPUT INITIAL STATE NOTE
D0 OUT-a L
Output is ON when data
= H and OFF when data
= L.
D1 OUT-b L
D2 OUT-c L
D3 OUT-d L
D4 OUT-e L
D5 OUT-f L
D6 OUT-g L
D7 OUT-Dp L
STANDBY SET TINGS
Standby mode settings and operation (Table 7)
Writing 4H to D15 to D12 and writing 0H to D3 to D0 sets Standby mode. Writing 4H to D15 to D12 and writing 1H to
D3 to D0 set s All Data Clear mode.
Standby mode maintains the settings made immediately before this mode came in force, turns the output
current OFF, and controls the bias current flowing in the internal circuits. All Data Clear resets all settings to
their initial st ates .
Table 7 Standby settings
REGISTER DATA
D
15
to D
8
D
7
to D
4
D
3
D
2
D
1
D
0
HEX CODE
STANDBY (NO DATA CLEAR) 4-H - 0 0 0 0 4XX0H
ALL DATA CLEAR 4-H - 0 0 0 1 4XX1H
X = Input H or L. "-" Are not affected by the truth table.
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LIST OF CHARACTER GENER ATOR DECODING DATA
Character generator decoding (Table 8)
As the following table shows, the characters are decoded using combinations of the data in D0 to D3 and D5 to D4.
In decoding, D6 is used exclusively for setting decimal points.
Spaces where (D0, D1, D2, D3) = (0000) and (D5, D4) = (01) are regarded as blank.
Table 8 List of character generator decoding data
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D5 D4 HEX 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 0 0
0 1 1
D7 D6
X 0 Dp OFF
X 1 Dp ON
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DATA INPUT
(Example 1: Displays and blinks characters a, b, c and d in digits 0, 1, 2 and 3 respectively.)
STEP D15 to
D12 D11 to
D8 D7 to
D4 D3 to D0 DIG-0 to 3 SEG
-a, b, c, d, e, f, g SEG
-Dp MODE DISPLAY
INDICATE
0 - - - - OFF OFF OFF At power-on
( = CLEAR MODE) ALL BLANK
1 0010 0000 XXXX
1111 OFF OFF OFF DUTY = 15 / 16 ALL BLANK
2 0010 0001 0001 0011 OFF OFF OFF DECODE, 4DIG ALL BLANK
3 0010 0010 X000 1010 OFF OFF OFF DIG-0 = a ALL BLANK
4 0010 0011 X000 1011 OFF OFF OFF DIG-1 = b ALL BLANK
5 0010 0100 X000 1100 OFF OFF OFF DIG-2 = c ALL BLANK
6 0010 0101 X000 1101 OFF OFF OFF DIG-3 = d ALL BLANK
7 0001 XXXX XXXX
XXXX ON ON OFF NORMAL a-b-c-d
8 0010 0000 XXXX
1000 ON ON OFF DUTY = 8 / 16 a-b-c-d
9 0000 XXXX XXXX
XXXX OFF OFF OFF BLANK ALL BLANK
10 0001 XXXX XXXX
XXXX ON ON OFF NORMAL a-b-c-d
11 0000 XXXX XXXX
XXXX OFF OFF OFF BLANK ALL BLANK
12 0001 XXXX XXXX
XXXX ON ON OFF NORMAL a-b-c-d
13 0000 XXXX XXXX
XXXX OFF OFF OFF BLANK ALL BLANK
14 0001 XXXX XXXX
XXXX ON ON OFF NORMAL a-b-c-d
15 0100 XXXX XXXX
0000 OFF OFF OFF STAND-BY
(SHUT DOWN) ALL BLANK
DATA INPUT
(Example 2: Scroll-lights digits 0, 1, 2, 3 = a., b., c., d. (with decimal points))
STEP D15 to
D12 D11 to
D8 D7 to
D4 D3 to
D0 DIG
-0 to 3 SEG
-a, b, c, d, e, f, g SEG
-Dp MODE DISPLAY
INDICATE
0 - - - - OFF OFF OFF At power-on
( = CLEAR MODE) ALL BLANK
1 0010 0000 XXXX 1111 OFF OFF OFF DUTY = 15 / 16 ALL BLANK
2 0010 0001 0001 0011 OFF OFF OFF DECODE, 4DI G ALL BLANK
3 0010 0010 X100 1010 OFF OFF OFF DIG-0 = a. ALL BLANK
4 0010 0011 X001 0000 OFF OFF OFF DIG-1 = blank ALL BLANK
5 0010 0100 X001 0000 OFF OFF OFF DIG-2 = blank ALL BLANK
6 0010 0101 X001 0000 OFF OFF OFF DIG-3 = blank ALL BLANK
7 0001 XXXX XXXX XXXX ON ON ON NORMAL a.---
8 0010 0010 X001 0000 OFF ON OFF DIG-0 = blank ALL BLANK
9 0010 0011 X100 1011 ON ON ON DIG-1 = b. -b.--
10 0010 0011 X001 0000 OFF ON OFF DIG-1 = blank ALL BLANK
11 0010 0100 X100 1100 ON ON ON DIG-2 = c. --c.-
12 0010 0100 X001 0000 OFF ON OFF DIG-2 = blank ALL BLANK
13 0010 0101 X100 1101 ON ON ON DIG-3 = d. ---d.
14 0100 XXXX XXXX 0000 OFF OFF OFF STAND-BY
(SHUT DOWN) ALL BLANK
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STATE TRANSITION DI AGRAM
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ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage for Logic
Circuits VDD 6.0 V
Supply Voltage VCC 17 V
DIG-0 to DIG-3 Output Current IDIG -400 mA
OUT-a to Dp Output Current IOUT 50 mA
Output Current for Logic Block IOH / IOL ±5 mA
Input Voltage VIN -0.3 to VDD + 0.3 (Note 1) V
Operating Frequenc y fCK 15.0 (Operati on with 1IC) MHz
Total Supply Current IVDD 400 mA
Power Dissipation PD SDIP24: 1.78 W
VQFN24: 2.4
Operating Temperature Topr -40 to 85 °C
Storage Temperature Tstg -55 to 150 °C
Note 1: However, do not exceed 6.0 V
ELECTRIC AL CH ARACTERIS TICS
(Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, REXT = 760 Ω, Ta = 25°C)
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Operating Power Supply
Current for Output Block
ICC1 1 SET NORMAL OPE. MODE, REXT
= 760 Ω @OUT-a to Dp ALL ON,
Ta = 25°C - 300 -
mA
ICC2 1 SET NORMAL OPE. MODE, REXT
= 760 Ω @OUT-a to Dp ALL ON
VCC = 12 V, Ta = 25°C - 320 -
DIG-0 to DIG-3 Scan
Frequency fOSC 2 NORMAL OPE. MODE,
VDD = 4.5 to 5. 5 V 240 480 960 Hz
OUT-a to Dp Output Sink
Current ISEG 3 NORMAL OP E. MODE,
VCE = 0.7 V , REXT = 760 Ω 29 34 40 mA
DIG-0 to 3 Output Leakage
Current Ileak1 4 A LL OFF MODE, VCC = 17 V - - -1 μA
OUT-a to Dp Output Leakage
Current Ileak2 4 A LL OFF MODE, VCC = 17 V - - 1 μA
DIG-0 to 3 Output Voltage VOUT 5 NORMAL OP E. MODE,
IDIG = -320 mA 3.0 - - V
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Logic block
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Static Power Supply Current for
Logic Circuits IDD1 6 STANDBY MODE, Ta = 25°C - - 200 μA
IDD2 6 B LA NK MODE, Ta = 25°C - - 12.5 mA
Operating Power Supply
Current for Logic Circ uits IDD3 6 NORMAL OPE. MODE,
fCLK = 10MHz,
DATA-IN: OUT-a to Dp = ON,
Ta = 25°C - - 20.5 mA
High Input Current for Logic
Circuits IIH - DATA-I N, LOAD & CLOCK:
VIN = 5 V - - 1 μA
Low Input Current for Logic
Circuits IIL - DATA-IN, LOAD & CLOCK:
VIN = 0 V - - -1 μA
High Output Voltage for Logic
Circuits VOH1 6 DATA-OUT, IOH = -1.0 mA 4.6 - - V
VOH2 6 DATA-OUT, IOH = -1.0 μA - VDD -
Low Output Voltage for Logic
Circuits VOL1 6 DATA-OUT, IOL = 1.0 mA - - 0.4 V
VOL2 6 DATA-OUT, IOL = 1.0 μA - 0.1 -
Clock Frequency fCLK 6 CA SCADE CONNECTED,
Ta = -40 to 85°C - - 10 MHz
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SWITCHI NG CHARACTERISTICS
(Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, Ta = 25°C)
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Data Hold Time (D-IN-CLOCK) tDHO - - - 10 - ns
Data Setup Time (D-IN-CLOCK) tDST - - - 20 - ns
Serial Output Delay Time
(CLOCK-D-OUT) tpHL-SO - CL = 10 pF - 25 - ns
tpLH-SO CL = 10 pF - 25 -
High Clock Pulse Width tCKH - - - 30 - ns
Low Clock Pulse Width tCKL - - - 30 - ns
Load Pulse Width twLD - - - 100 - ns
Load Clock Time
(CLOCK-LOAD) tCKLD - - - 50 - ns
Clock Load Time
(LOAD-CLOCK) tLDCK - - - 50 - ns
OUT-a to Dp Output Delay Time
(LOAD(Internal EN)-OUTn) tpHL-SEG - CL = 10 pF, Test mode - - 5.0 μs
tpLH-SEG CL = 10 pF, Test mode - - 5.0
OUT-a to Dp Output Rise Time
(OUTn) tr SEG - CL = 10 pF 0.2 1.0 - μs
OUT-a to Dp Output Fall Time
(OUTn) tf SEG - CL = 10 pF 0.2 1.0 - μs
DIG-0 to DIG-3 Output Delay
Time (LOAD(Internal EN)-DIGn) tpHL-DIG - CL = 10 pF, Test mode - - 10.0 μs
tpLH-DIG CL = 10 pF, Test mode - - 10.0
DIG-0 to DIG-3 Output Rise
Time (DIGn) tr DIG - CL = 10 pF 5 20 - ns
DIG-0 to DIG-3 Output Fall Time
(DIGn) tf DIG - CL = 10 pF 50 150 - ns
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RECOMMENDED O PERAT ING CONDITIO NS
(Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, Ta = -40 to 85°C)
Output
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Supply Voltage for Output Block
VCC - - 4.0 - 6.0 V
DIG-0 to DIG-3 Output Source
Current IDIG - VOUT = 3.0 V - - -320 mA
OUT-a to OUT-Dp Output Sink
Current ISEG - VCE = 0.7 V - - 40 mA
Logic block
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Supply Voltage for Logic Block VDD - - 4.5 - 5.5 V
High Input Current for Logic
Circuits IIH - DATA-IN, LOAD & CLOCK,
VIN = VDD - - 1 μA
Low Input Current for Logic
Circuits IIL - DATA-IN, LOAD & CLOCK,
VIN = 0V - - -1 μA
High Input Voltage for Logic
Circuits VIH - - 0.7
VDD - - V
Low Input Voltage for Logic
Circuits VIL - - - - 0.3
VDD V
SWITCHI NG CONDITIONS
CHARACTERISTIC SYMBOL
TEST
CIR-
CUIT
TEST CONDITION MIN TYP. MAX UNIT
Data Hold Time (D-IN-CLOCK) tDHO - - 30 - - ns
Data Setup Time
(D-IN-CLOCK) tDST - - 50 - - ns
Serial Output Delay Time
(CLOCK-D-OUT) tPDSO - CL = 10 pF 50 - - ns
High Clock Pulse Width tCKH - - 30 - - ns
Low Clock Pulse Width tCKL - - 30 - - ns
Load Pulse Width twLD - - 150 - - ns
Load Clock Time
(CLOCK-LOAD) tCLKLD - - 100 - - ns
Clock Load Time
(LOAD-CLOCK) tLDCLK - - 100 - - ns
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TEST CIRCUIT S
(1) ICC1, ICC2
(2) fOSC
TB62785
LOAD
DATA-IN
CLOCK
TEST-IN2
TEST-IN1
R-EXT
DATA-OUT
TB62785
LOAD
DATA-IN
CLOCK
TEST-IN2
TEST-IN1
R-EXT
DATA-OUT
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(3) ISEG
(4) Ileak1, Ileak2
TB62785
LOAD
DATA-IN
CLOCK
TEST-IN2
TEST-IN1
R-EXT
DATA-OUT
TB62785
LOAD
DATA-IN
CLOCK
TEST-IN2
TEST-IN1
R-EXT
DATA-OUT
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(5) VOUT
(6) IDD1, IDD2, IDD3, VOH1, VOH2, VOL1, VOL2, fCLK
TB62785
LOAD
DATA-IN
CLOCK
TEST-IN2
TEST-IN1
R-EXT
DATA-OUT
TB62785
LOAD
TEST-IN2
R-EXT
DATA-OUT
DATA-IN
CLOCK
TEST-IN1
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DUTY C YCLE SETTIN GS AND OUTPUT CURRENT VALUES
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EXTERNAL RESISTANCE AND O UT PUT CURRENT VALUES
The following diagram shows application circuits.
Because operation may be unstable due to influences such as the electromagnetic induction of the wiring, the IC should
be located as close as possible to the LED.
The L-GND and P-GND of the IC are connected to the substrate in the IC.
Take care to avoid a potential difference exceeding 0.4V at two pins.
When executing the pattern layout, Toshiba recommends not including inductance components in the GND or output pin
lines, and not inserting capacitance components exceeding 50pF between the R-EXT and GND .
IOUT - R-EXT
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AP P LICATION CIRCUIT EXAMPLE (Connection example)
PREC AUTIONS for USING
Utmost care is necessary in the design of the output line, VCC (VDD) and (L-GND, P-GND) line since IC may be
destroyed due to short-circuit between outputs, air contamination fault, or fault by improper grounding.
TB62785
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Package Dimensions
SDIP24-P-300-1.78
Unit: mm
Weight: 1.22 g (typ.)
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P-VQFN24-0404-0.50-001
Unit: mm
Weight: 0.037 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
3. Tim i ng Charts
Timing charts may be simplified for explanatory purposes.
4. A pplication Circuit s
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by
explosion or comb ust ion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current
and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings,
when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a
large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow
of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the
negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or
ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection
function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or inc orrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s)
may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly
even just one time.
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[5] Carefully select external components (such as inputs and negative feedback capacitors) and load components (such
as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage
will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC
failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular,
please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a
speaker dire ctly.
Points to remember on handling of ICs
(1) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is
appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs
generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life,
deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the
effect of IC heat radiation with peripheral components.
(2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s
motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collect i vely "Product " ) without notic e.
• This document and any information herein may not be reproduced without pri or written permission from TOSHIBA. Even with
TOSHIBA's written permissi on, reproduc t i on is permiss i bl e only if reproduction is without al t eration/omission.
• Though TOSHIBA works c ontinually to improve P roduct 's qual ity and reliabil ity, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for provi di ng adequate des i gns and safeguards for their hardware, software and
systems which minimi ze risk and avoid situations in which a malfunction or fai l ure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including t he
Product, or incorporat e the Product into thei r own applicati ons, c ustomers must also refer to and comply with (a) the latest ve rs io ns of
all relevant TOSHIBA informati on, includi ng without limi tation, this document, the specif ications, the data sheets and applic ati on notes
for Product and the precautions and conditions set forth in the "TOS HIBA Semic onduct or Reliabil ity Handbook " and (b) the
instruct i ons for the applicati on with which the Product will be used with or for. Customers are solely responsibl e for all aspects of their
own product design or applications, includi ng but not limit ed to (a) determini ng the appropriateness of the use of this Product in such
design or applications; (b) evaluat ing and determ i ni ng the applic ability of any information contained in this document, or in charts,
diagrams, programs, al gorithms , sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABI L ITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
• PRODUCT IS NEI THE R INTENDE D NO R WARRANTED FOR US E IN EQUIPMENTS OR SYS TEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR REL IABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUM AN LIFE, BO DILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR S E RIO US PUBL IC IMPACT
("UNINTENDED USE"). E xcept for s peci fic applic at i ons as expressl y stated in this document, Unintended Use i ncludes, without
limitation, equipment used in nuclear fac ilities, equi pment used in the aerospace industry, medical equipment, equipment us ed for
automobiles, trai ns, ships and other transportation, traffic signaling equipment, equipm ent us ed to control combustions or explosions ,
safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE
PRODUCT FOR UNINTE NDE D USE, TOSHI BA ASS UMES NO LIABIL ITY FOR PRODUCT. For details, please contact your
TOSHIBA sales representative.
• Do not disassemble, anal yze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated int o any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulati ons.
• The information contained herein is presented only as guidance for Product use. No responsi bili t y is assumed by TOSHIB A for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to
any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
• ABSENT A WRITTEN SIGNED A G R EEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERM S AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXI MUM EX TENT ALLO WABLE BY LAW, TOSHIBA (1) ASSUMES NO LI ABILITY
WH ATSOE VER, INCLUDING WITHOUT LIMITATION, INDI RECT, CONSEQUENTIAL, SPE CIAL, OR INCIDENTAL D AM AGES O R
LOSS, INCL UDING WITHOUT LIMITATION, LOS S OF PROFI TS, LOSS OF OPPORTUNITIE S, BUSINESS INTERRUPTION AND
LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS REL ATED TO
SALE, USE OF PRODUCT, OR INFORMATION, I NCL UDING WARRANTIES OR CONDI TI O NS OF MERCHANTABILITY, FITNESS
FOR A PARTICUL AR PURPOS E, ACCURACY OF INFORM ATION, O R NO NINFRINGEMENT.
• Do not use or otherwise make available Product or related software or technology for any military purposes, including without
limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chem ic al, or biol ogic al weapons or missile
technology products (mass destruct i on weapons). Product and related software and technology may be controlled under the
applicable export laws and regulat ions i ncludi ng, without limitation, t he Japanese Foreign Exchange and Foreign Trade Law and the
U.S. Export Administrati on Regul ations. Export and re-export of P roduct or relat ed software or technology are strictly prohibi t ed
except in compliance with all applicable export laws and regulat i ons.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS
compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the
inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES
NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS A RESULT OF NONCOMPLIANCE WITH
APPLICABLE LA WS A ND REGULATIONS.
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