TB62785NG,TB62785FTG TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62785NG, TB62785FTG 7-SEGMENT DRIVERS WITH BUILT-IN DECODERS (COMMON ANODE CAPABILITY, MAXIMUM 4-DIGIT CONTROL) The TB62785NG / TB62785FTG are multifunctional, compact, 7-egment LED display drivers. These ICs can directly drive 7-segment displays and individual LEDs, and can control either a 4-digit display with decimal points, or 32 individual LEDs. These ICs can also be used with common-anode displays. Their outputs are constant current, the ampere levels at which are set using an external resistor. A synchronous serial port connects the IC to the CPU. The different modes of control provided by this device including Duty Control Register Set, Digit Set, Decode Set and Standby Set, are all based on every 16-bit of serial data. TB62785NG SDIP24-P-300-1.78 Weight 1.22g (typ.) TB62785FTG FEATURES Control circuit power supply : VDD = 4.5 to 5.5 V Digit output rating : 17 V / -400 mA Decoder output rating : 17 V / 50 mA Built-in decoder : Decodes the numerals 0 to 9, certain alphabetic characters, and of course blanks code. P-VQFN24-0404-0.50-001 Weight 0.037g (typ.) Digit control function : Can scan digit outputs DIG-0 to DIG-3 when connected to the common anode pins of a 7-segment display. Maximum transmission frequency : fCLK = 15 MHz Decoder outputs (OUT-a to OUT-Dp) Output current can be set up to a 40mA maximum using an external resistor. Constant current tolerance (Ta = 25C, VDD = 5.0 V) : Variation between bits = 7%, variation between devices (including variation between bits) = 15% at VCE 0.7 V Package : TB62785NG : TB62785FTG SDIP24-P-300-1.78 P-VQFN24-0404-0.50-001 1 2015-01-07 TB62785NG,TB62785FTG PIN ASSIGNMENT (Top view) < TB62785NG (SDIP24) > VDD 1 24 L-GND DATA-IN 2 23 DATA-OUT CLOCK 3 22 R-EXT LOAD 4 21 P-GND OUT-f 5 20 DIG-3 OUT-g 6 OUT-e 7 18 VCC OUT-d 8 17 DIG-1 OUT-Dp 9 16 DIG-0 19 DIG-2 TOP VIEW OUT-c 10 15 TEST-IN1 OUT-b 11 14 TEST-IN2 OUT-a 12 13 P-GND 8 1 18 P-GND 17 DIG-3 16 DIG-2 15 VCC 14 DIG-1 13 DIG-0 2 3 4 5 5 2 3 4 5 5 OUT-e 4 OUT-d 5 OUT-Dp 6 2 OUT-f 2 OUT-g 3 1 LOAD 1 1 CLOCK 24 2 DATA-IN 23 9 7 TOP VIEW 3 VDD 22 10 P-GND 3 4 (Note) 11 TEST-IN2 4 5 (Note) L-GND 21 12 TEST-IN1 5 5 DATA-OUT 20 5 R-EXT 19 1 < TB62785FTG (VQFN24) > OUT-a OUT-b OUT-c *Note: VDD and L-GND are adjacent in TB62785FTG. (21pin / 22pin) Please be careful. 2 2015-01-07 TB62785NG,TB62785FTG BLOCK DIAGRAM VCC VDD DATA-IN DATA-OUT 16bit Shift Register CLOCK 16 LOAD 16bit D-type Latch 8 (D0~D7) 8 (D8~D15) Latch Selector & LOAD pulse Dstributer 4 8bit D-type Latch for Digit-A 4 Internal OSC Digit-Limit Controller 8 8bit D-type Latch for Digit-B 4 Duty-Controller 8 8bit D-type Latch for Digit-C 4 Data-Selector (Decode or No Decode) 8 8bit D-type Latch for Digit-D 4 Stand-by Mode Controller 8 4 4 4 4 4 4 4 4 Octal 4tol Data Selector TEST-IN1 TEST-IN2 2 8 BINARY to 7-Segment Decoder No Decode Data 8 8bit Bipolar Constant-Current Sink Driver 8 4bit Bipolar Digit Source Driver DIG-0~3 4 Octal 2tol Data Selector 8 R-EXT OUTa~Dp 3 2 P-GND L-GND 2015-01-07 TB62785NG,TB62785FTG PIN FUNCTIONS TB62785NG (SDIP24) PIN NUMBER I/O (Note) PIN NAME 1 P VDD 2 I DATA-IN (DI) Serial data input pin. 3 I CLOCK (CK) Clock input pin. The shift register shifts data on the clock's rising edge. 4 I LOAD (LD) Load signal input pin. The data in the D8 to D15 are read on the rising edge and the load register is selected. And, the data of the D0 to D7 which corresponded each register on the falling edge. 5 to 12 O OUT-a to OUT-Dp Segment drive output pins. The a to Dp outputs correspond to the seven segments. These pins output constant sink current. Connect each of these pins to the corresponding LED's cathode. 13, 21 P P-GND 14 I TEST-IN2 Product test pin. In normal use, be sure to connect to ground. 15 I TEST-IN1 Product test pin. In normal use, be sure to connect to ground. FUNCTION 5 V power pin. Ground pins, There are two which can be used to ground the output OUT-a to OUT-Dp pins. Digit output pins. Each of these pins can control one of the four seven-segment digits in a display. These pins output the VCC pin voltage as a source current output. Connect these pins to the LED anodes. 16, 17, 19, 20 O DIG-0 to DIG-3 18 P VCC 22 O R-EXT Current setting pin for the OUT-a to OUT-Dp pins. Connect a resistor between this pin and ground when setting the current. 23 O DATA-OUT (DO) Serial data output pin. Use when TB62785NG/ TB62785FTG device is used in cascade connections. 24 P L-GND Power pin for digit output. Ground pin for logic and analog circuits. *Note Explanation of I/O: I = Input Terminal, O = Output Terminal, P = Power Supply 4 2015-01-07 TB62785NG,TB62785FTG TB62785FTG (VQFN24) PIN NUMBER I/O (Note) PIN NAME FUNCTION 1 I LOAD (LD) Load signal input pin. The data in the D8 to D15 are read on the rising edge and the load register is selected. And, the data of the D0 to D7 which corresponded each register on the falling edge. 2 to 9 O OUT-a to Dp Segment drive output pins. The A to Dp outputs correspond to the seven segments. These pins output constant sink current. Connect each of these pins to the corresponding LED's cathode. 10, 18 P P-GND 11 I TEST-IN2 Product test pin. In normal use, be sure to connect to ground. 12 I TEST-IN1 Product test pin. In normal use, be sure to connect to ground. Ground pins, There are two which can be used to ground the output OUT-a to OUT-Dp pins. Digit output pins. Each of these pins can control one of the four seven-segment digits in a display. These pins output the VCC pin voltage as a source current output. Connect these pins to the LED anodes. 13, 14, 16, 17 O DIG-0 to DIG-3 15 P VCC 19 O R-EXT 20 O 21 P L-GND 22 P VDD 23 I DATA-IN (DI) Serial data input pin. 24 I CLOCK (CK) Clock input pin. The shift register shifts data on the clock's rising edge. Power pin for digit output. Current setting pin for the OUT-a to OUT-Dp pins. Connect a resistor between this pin and ground when setting the current. Serial data output pin. Use when TB62785NG/TB62785FTG device is used in DATA-OUT (DO) cascade connections. Ground pin for logic and analog circuits. 5 V power pin. *Note Explanation of I/O: I = Input Terminal, O = Output Terminal, P = Power Supply 5 2015-01-07 TB62785NG,TB62785FTG TIMING DIAGRAM tDHO tpLH-DIG tpHL-DIG tpLH-SEG tpHL-SEG DATA INPUT Transfer data to the DATA-IN pin on every 16-bit combining address (8bits) and data (8bits). After the 16th clock signal input following this data transfer input a load signal from the LD pin. Input the load signal using an Active High pulse. The register address is set on the rising edge of the load pulse. On the subsequent falling edge, the data are read as data of the mode of the register. 6 2015-01-07 TB62785NG,TB62785FTG DESCRIPTION OF OPERATION Data input (DATA-IN, CLOCK, LOAD) The data are input serially using the DATA-IN pin. The data input interface consists of a total of three inputs: DATA-IN, LOAD, and CLOCK. Binary code stored in the 16-bit shift register offers control modes including duty Control Register Set, Digitset, Decode Set, and Standby Set, The data are shifted on the rising edge of the clock, starting from the MSB. Cascade-connecting TB62785NG/TB62785FTG devices provides capability for controlling a larger number of digits. The serial data in the 16-bit shift register are used as follows: the four bits D15 (MSB) to D12 select the IC operating mode (Table 1), while D11 to D8 select the register corresponding to the operating mode (Table 2). Bits D7 to D0 (LSB) of the 16-bit shift register are used for detail settings, such as number of digits in use, character settings in each digit, and light intensity. The internal registers are loaded on the rising edge of the LOAD signal, which causes loading of data from an external source into the D15 (MSB) to D8 bits of the shift register, operating mode and the corresponding register selection data. On the subsequent falling edge, the detail setting data of D7 to D0 (LSB) are loaded. Normally LOAD is Low. After a serial transfer of 16bits, the input of a High-level pulse loads the data. Note the following caution: Use the D15 to D8 setting and the D7 to D0 detail data setting as a pair. If only the D7 to D0 data are input without setting D15 to D8 an error condition may result, in which the device will not operate normally. If the current mode is set again by a new signal, the data for D15 to D8 must also be re-input. Operating precautions At power-on or after operation in Clear mode (in initial state), set the IC to Normal mode again. Otherwise, the IC will not drive the LED. Operating the IC in Blank mode (all lights off) or in All On mode (all lights lit) does not affect the internal data. Setting the IC to Normal mode again continues the LED lighting in the state governed by the settings made immediately before mode change. Normal mode (not Shut Down, Clear, Blank, or All On mode) continues the operations set in Load Register mode. In Normal mode, operations are governed by any new settings made in the Load Register, as soon as the changed setting values are loaded. 7 2015-01-07 TB62785NG,TB62785FTG Operating modes (Table 1.) These ICs support the following five operating modes: 1. Blank : Forcibly turns OFF the constant-current output both for data and for digit setting. This mode is not affected by the values in bits D11 to D0. 2. Normal Operate : Used for display operations after the settings of the digits are complete. This mode is not affected by the values in bits D11 to D0.Note that setting this mode without making any other settings will cause display of the numeral 0. 3. Load Register : Used for the detail settings of the Duty Control Register, for setting Decode / No Decode, for inputting display data, and for setting the number of digits to drive. D11 to D0 of the shift register are used for the detail settings of the digits currently being driven (Table 2). 4. All On : Forcibly turns ON the data-side constant-current output. This mode is not affected by D11 to D0. The initial setting is four digits. When the digits must be changed, use Load Register mode to set the number of digits to drive. 5. Standby : Used to set Standby state (in which internal data are not cleared) and to clear data (initialization). The settings in D3 to D0 of the shift register determine the choice between standby state or initialization. Table 1 Operating mode settings REGISTER DATA INITIAL SETTING D15 D14 D13 D12 D11 to D8 D7 to D4 D3 to D0 HEX CODE BLANK (OUT-n & DIG-0 to 3 ALL-OFF) 0 0 0 0 - - - 0---H * NORMAL (OPERATION) 0 0 0 1 - - - 1---H - LOAD REGISTER (DUTY, DECODE, DIGIT & DATA) 0 0 1 0 X X X 2XXXH - ALL ON (OUTn ALL-ON) 0 0 1 1 - - - 3---H - STAND-BY 0 1 0 0 - - X 4--XH - X = Input H or L. "-" = Are not affected by the truth table. 8 2015-01-07 TB62785NG,TB62785FTG Load Register Selection modes (Table 2) These modes select the register to provide the data to control the IC operation. The Load Register selection mode is determined by the settings of D15 to D12 and D11 to D8 of the shift register. 1. Duty Register : The data in D7 to D0 of this register set the digit output duty cycle. Duty settings can be made in 16 steps from 0 / 16 to 15 / 16. (See Table 3) 2. Decode & Digit Register : Sets Decode / No Decode and the number of digits to drive. Decode can be set using D7 to D4. The number of digits driven can be set using D3 to D0. Decode / No Decode and the number of digits driven are set simultaneously. 3. Data registers 0 to 3 : Set the display data corresponding to DIG0 to DIG3 respectively. D7 to D0 of the shift register are used to set the display data. Table 2 Load register selection REGISTER DATA D15 to D12 D11 D10 D9 D8 D7 to D4 D3 to D0 HEX CODE LOAD DUTY REGISTER 2H 0 0 0 0 X X 20XXH LOAD DECODE & DIGIT REGISTER 2H 0 0 0 1 X X 21XXH LOAD DATA REGISTER 0 2H 0 0 1 0 X X 22XXH LOAD DATA REGISTER 1 2H 0 0 1 1 X X 23XXH LOAD DATA REGISTER 2 2H 0 1 0 0 X X 24XXH LOAD DATA REGISTER 3 2H 0 1 0 1 X X 25XXH X = Input H or L. "-" = Are not affected by the truth table. 9 2015-01-07 TB62785NG,TB62785FTG DUTY CONTROL REGISTER SETTINGS Duty Control Register detail settings and operation (Table 3) Writing 20H to D15 to D8 and writing 0 to FH to D3 to D0 sets the duty cycle shown in the following table for the digit-side source driver output. The duty cycle can be set in 16 steps. The initial setting is 15 / 16. After Data Clear, the setting is also 15 / 16. The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or standby state). Table 3 DUTY CYCLE Duty control register settings REGISTER DATA INITIAL SETTING D15 to D8 D7 to D4 D3 D2 D1 D0 HEX CODE 0 / 16 20H - 0 0 0 0 20X0H - 1 / 16 20H - 0 0 0 1 20X1H - 2 / 16 20H - 0 0 1 0 20X2H - 3 / 16 20H - 0 0 1 1 20X3H - 4 / 16 20H - 0 1 0 0 20X4H - 5 / 16 20H - 0 1 0 1 20X5H - 6 / 16 20H - 0 1 1 0 20X6H - 7 / 16 20H - 0 1 1 1 20X7H - 8 / 16 20H - 1 0 0 0 20X8H - 9 / 16 20H - 1 0 0 1 20X9H - 10 / 16 20H - 1 0 1 0 20XAH - 11 / 16 20H - 1 0 1 1 20XBH - 12 / 16 20H - 1 1 0 0 20XCH - 13 / 16 20H - 1 1 0 1 20XDH - 14 / 16 20H - 1 1 1 0 20XEH - 15 / 16 20H - 1 1 1 1 20XFH * X = Input H or L. "-" = Are not affected by the truth table. 10 2015-01-07 TB62785NG,TB62785FTG DIGIT SETTINGS Setting the number of digits (Table 4) Writing 21H to D15 to D8 and at the same step writing 0H to 3H to D3 to D0 sets the number of digits to a maximum of four the display. The initial setting is four digits, and four will also be set by a Data Clear. The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or standby state). When changing the number of digits, also set D7 to D4. Table 4 Digit settings REGISTER DATA D2 D1 D0 HEX CODE INITIAL SETTING 0 0 21X0H - 0 0 1 21X1H - 0 0 1 0 21X2H - 0 0 1 1 21X3H * D15 to D8 D7 to D4 D3 ACTIVATED DIG--0 ONLY 21H X 0 0 ACTIVATED DIG--0 to 1 21H X 0 ACTIVATED DIG--0 to 2 21H X ACTIVATED DIG--0 to 3 21H X X = Input H or L. "-" = Are not affected by the truth table. DECODE SETTINGS Decode settings (Table 5) The settings for Decode are the same as the settings for the number of digits, described under setting, above. Writing 21H to D15 to D8 and writing 0 to 1H to D7 to D4 set Decode mode. When using this IC for controlling the lighting on individual LEDs used for a dot matrix rather than a 7-segment display, set to No Decode. As Table 6 shows, D0 in the data register is used to turn OUT-a ON and OFF ; D1 turns OUT-b ON and OFF. The initial setting is Decode mode, and Decode mode will also be set by a Data Clear. The current settings continue until changed (by reset execution, or to the initial state, Data Clear state, or standby state). Since D3 to D0 are also used for setting the number of digits, when changing the Decode setting, also set D3 to D0. Table 5 Decode settings REGISTER DATA D15 to D8 D7 D6 D5 D4 D3 to D0 HEX CODE INITIAL SETTING PASS DECODER (NO DECODE) 21H 0 0 0 0 X 210XH - DECODE 21H 0 0 0 1 X 211XH * X = Input H or L. "-" = Are not affected by the truth table. 11 2015-01-07 TB62785NG,TB62785FTG THE FOLLOWING TABLE SHOWS THE CORRESPONDENCE BETWEEN THE SERIAL DATA AND THE OUTPUT PINS WHEN NO DECODE IS SET Table 6 Correspondence between serial data and output pins in no decode mode REGISTER DATA OUTPUT INITIAL STATE D0 OUT-a L D1 OUT-b L D2 OUT-c L D3 OUT-d L D4 OUT-e L D5 OUT-f L D6 OUT-g L D7 OUT-Dp L NOTE Output is ON when data = H and OFF when data = L. STANDBY SETTINGS Standby mode settings and operation (Table 7) Writing 4H to D15 to D12 and writing 0H to D3 to D0 sets Standby mode. Writing 4H to D15 to D12 and writing 1H to D3 to D0 sets All Data Clear mode. Standby mode maintains the settings made immediately before this mode came in force, turns the output current OFF, and controls the bias current flowing in the internal circuits. All Data Clear resets all settings to their initial states. Table 7 Standby settings D15 to D8 D7 to D4 D3 STANDBY (NO DATA CLEAR) 4-H - 0 0 ALL DATA CLEAR 4-H - 0 0 REGISTER DATA D2 D1 D0 HEX CODE 0 0 4XX0H 0 1 4XX1H X = Input H or L. "-" Are not affected by the truth table. 12 2015-01-07 TB62785NG,TB62785FTG LIST OF CHARACTER GENERATOR DECODING DATA Character generator decoding (Table 8) As the following table shows, the characters are decoded using combinations of the data in D0 to D3 and D5 to D4. In decoding, D6 is used exclusively for setting decimal points. Spaces where (D0, D1, D2, D3) = (0000) and (D5, D4) = (01) are regarded as blank. Table 8 List of character generator decoding data D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 2 3 4 5 6 7 8 9 A B C D E F D5 D4 HEX 0 0 0 0 1 1 D7 D6 X 0 Dp OFF X 1 Dp ON 13 2015-01-07 TB62785NG,TB62785FTG DATA INPUT (Example 1: Displays and blinks characters a, b, c and d in digits 0, 1, 2 and 3 respectively.) STEP D15 to D12 D11 to D8 D7 to D4 D3 to D0 DIG-0 to 3 SEG -a, b, c, d, e, f, g SEG -Dp MODE DISPLAY INDICATE 0 - - - - OFF OFF OFF At power-on ( = CLEAR MODE) ALL BLANK 1 0010 0000 XXXX 1111 OFF OFF OFF DUTY = 15 / 16 ALL BLANK 2 0010 0001 0001 0011 OFF OFF OFF DECODE, 4DIG ALL BLANK 3 0010 0010 X000 1010 OFF OFF OFF DIG-0 = a ALL BLANK 4 0010 0011 X000 1011 OFF OFF OFF DIG-1 = b ALL BLANK 5 0010 0100 X000 1100 OFF OFF OFF DIG-2 = c ALL BLANK 6 0010 0101 X000 1101 OFF OFF OFF DIG-3 = d ALL BLANK 7 0001 XXXX XXXX XXXX ON ON OFF NORMAL a-b-c-d 8 0010 0000 XXXX 1000 ON ON OFF DUTY = 8 / 16 a-b-c-d 9 0000 XXXX XXXX XXXX OFF OFF OFF BLANK ALL BLANK 10 0001 XXXX XXXX XXXX ON ON OFF NORMAL a-b-c-d 11 0000 XXXX XXXX XXXX OFF OFF OFF BLANK ALL BLANK 12 0001 XXXX XXXX XXXX ON ON OFF NORMAL a-b-c-d 13 0000 XXXX XXXX XXXX OFF OFF OFF BLANK ALL BLANK 14 0001 XXXX XXXX XXXX ON ON OFF NORMAL a-b-c-d 15 0100 XXXX XXXX 0000 OFF OFF OFF STAND-BY (SHUT DOWN) ALL BLANK DATA INPUT (Example 2: Scroll-lights digits 0, 1, 2, 3 = a., b., c., d. (with decimal points)) STEP D15 to D12 D11 to D8 D7 to D4 D3 to D0 DIG -0 to 3 SEG -a, b, c, d, e, f, g SEG -Dp MODE DISPLAY INDICATE 0 - - - - OFF OFF OFF At power-on ( = CLEAR MODE) ALL BLANK 1 0010 0000 XXXX 1111 OFF OFF OFF DUTY = 15 / 16 ALL BLANK 2 0010 0001 0001 0011 OFF OFF OFF DECODE, 4DIG ALL BLANK 3 0010 0010 X100 1010 OFF OFF OFF DIG-0 = a. ALL BLANK 4 0010 0011 X001 0000 OFF OFF OFF DIG-1 = blank ALL BLANK 5 0010 0100 X001 0000 OFF OFF OFF DIG-2 = blank ALL BLANK 6 0010 0101 X001 0000 OFF OFF OFF DIG-3 = blank ALL BLANK 7 0001 XXXX XXXX XXXX ON ON ON NORMAL a.--- 8 0010 0010 X001 0000 OFF ON OFF DIG-0 = blank ALL BLANK 9 0010 0011 X100 1011 ON ON ON DIG-1 = b. -b.-- 10 0010 0011 X001 0000 OFF ON OFF DIG-1 = blank ALL BLANK 11 0010 0100 X100 1100 ON ON ON DIG-2 = c. --c.- 12 0010 0100 X001 0000 OFF ON OFF DIG-2 = blank ALL BLANK 13 0010 0101 X100 1101 ON ON ON DIG-3 = d. ---d. 14 0100 XXXX XXXX 0000 OFF OFF OFF STAND-BY (SHUT DOWN) ALL BLANK 14 2015-01-07 TB62785NG,TB62785FTG STATE TRANSITION DIAGRAM 15 2015-01-07 TB62785NG,TB62785FTG ABSOLUTE MAXIMUM RATINGS (Ta = 25C) CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage for Logic Circuits VDD 6.0 V Supply Voltage VCC 17 V DIG-0 to DIG-3 Output Current IDIG -400 mA OUT-a to Dp Output Current IOUT 50 mA IOH / IOL 5 mA Input Voltage VIN -0.3 to VDD + 0.3 (Note 1) V Operating Frequency fCK 15.0 (Operation with 1IC) MHz Total Supply Current IVDD 400 mA Output Current for Logic Block SDIP24: 1.78 Power Dissipation PD W VQFN24: 2.4 Operating Temperature Topr -40 to 85 C Storage Temperature Tstg -55 to 150 C Note 1: However, do not exceed 6.0 V ELECTRICAL CHARACTERISTICS (Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, REXT = 760 , Ta = 25C) SYMBOL TEST CIRCUIT ICC1 1 SET NORMAL OPE. MODE, REXT = 760 @OUT-a to Dp ALL ON, Ta = 25C ICC2 1 SET NORMAL OPE. MODE, REXT = 760 @OUT-a to Dp ALL ON VCC = 12 V, Ta = 25C DIG-0 to DIG-3 Scan Frequency fOSC 2 OUT-a to Dp Output Sink Current ISEG DIG-0 to 3 Output Leakage Current CHARACTERISTIC Operating Power Supply Current for Output Block TEST CONDITION MIN TYP. MAX - 300 - UNIT mA - 320 - NORMAL OPE. MODE, VDD = 4.5 to 5.5 V 240 480 960 Hz 3 NORMAL OPE. MODE, VCE = 0.7 V, REXT = 760 29 34 40 mA Ileak1 4 ALL OFF MODE, VCC = 17 V - - -1 A OUT-a to Dp Output Leakage Current Ileak2 4 ALL OFF MODE, VCC = 17 V - - 1 A DIG-0 to 3 Output Voltage VOUT 5 NORMAL OPE. MODE, IDIG = -320 mA 3.0 - - V 16 2015-01-07 TB62785NG,TB62785FTG Logic block CHARACTERISTIC SYMBOL TEST CIRCUIT Static Power Supply Current for Logic Circuits IDD1 6 IDD2 MIN TYP. MAX UNIT STANDBY MODE, Ta = 25C - - 200 A 6 BLANK MODE, Ta = 25C - - 12.5 mA IDD3 6 NORMAL OPE. MODE, fCLK = 10MHz, DATA-IN: OUT-a to Dp = ON, Ta = 25C - - 20.5 mA High Input Current for Logic Circuits IIH - DATA-IN, LOAD & CLOCK: VIN = 5 V - - 1 A Low Input Current for Logic Circuits IIL - DATA-IN, LOAD & CLOCK: VIN = 0 V - - -1 A High Output Voltage for Logic Circuits VOH1 6 DATA-OUT, IOH = -1.0 mA 4.6 - - VOH2 6 DATA-OUT, IOH = -1.0 A - VDD - Low Output Voltage for Logic Circuits VOL1 6 DATA-OUT, IOL = 1.0 mA - - 0.4 VOL2 6 DATA-OUT, IOL = 1.0 A - 0.1 - Clock Frequency fCLK 6 CASCADE CONNECTED, Ta = -40 to 85C - - 10 Operating Power Supply Current for Logic Circuits TEST CONDITION 17 V V MHz 2015-01-07 TB62785NG,TB62785FTG SWITCHING CHARACTERISTICS (Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, Ta = 25C) SYMBOL TEST CIRCUIT TEST CONDITION MIN TYP. MAX UNIT Data Hold Time (D-IN-CLOCK) tDHO - - - 10 - ns Data Setup Time (D-IN-CLOCK) tDST - - - 20 - ns CL = 10 pF - 25 - CL = 10 pF - 25 - CHARACTERISTIC Serial Output Delay Time (CLOCK-D-OUT) tpHL-SO - tpLH-SO ns High Clock Pulse Width tCKH - - - 30 - ns Low Clock Pulse Width tCKL - - - 30 - ns Load Pulse Width twLD - - - 100 - ns Load Clock Time (CLOCK-LOAD) tCKLD - - - 50 - ns Clock Load Time (LOAD-CLOCK) tLDCK - - - 50 - ns CL = 10 pF, Test mode - - 5.0 CL = 10 pF, Test mode - - 5.0 OUT-a to Dp Output Delay Time (LOAD(Internal EN)-OUTn) tpHL-SEG - tpLH-SEG s OUT-a to Dp Output Rise Time (OUTn) tr SEG - CL = 10 pF 0.2 1.0 - s OUT-a to Dp Output Fall Time (OUTn) tf SEG - CL = 10 pF 0.2 1.0 - s CL = 10 pF, Test mode - - 10.0 CL = 10 pF, Test mode - - 10.0 DIG-0 to DIG-3 Output Delay Time (LOAD(Internal EN)-DIGn) tpHL-DIG - tpLH-DIG s DIG-0 to DIG-3 Output Rise Time (DIGn) tr DIG - CL = 10 pF 5 20 - ns DIG-0 to DIG-3 Output Fall Time (DIGn) tf DIG - CL = 10 pF 50 150 - ns 18 2015-01-07 TB62785NG,TB62785FTG RECOMMENDED OPERATING CONDITIONS (Unless otherwise stated, VDD = 5.0 V, VCC = 5.0 V, Ta = -40 to 85C) Output CHARACTERISTIC SYMBOL TEST CIRCUIT TEST CONDITION MIN TYP. MAX UNIT Supply Voltage for Output Block VCC - - 4.0 - 6.0 V DIG-0 to DIG-3 Output Source Current IDIG - VOUT = 3.0 V - - -320 mA OUT-a to OUT-Dp Output Sink Current ISEG - VCE = 0.7 V - - 40 mA SYMBOL TEST CIRCUIT TEST CONDITION MIN TYP. MAX UNIT VDD - - 4.5 - 5.5 V High Input Current for Logic Circuits IIH - DATA-IN, LOAD & CLOCK, VIN = VDD - - 1 A Low Input Current for Logic Circuits IIL - DATA-IN, LOAD & CLOCK, VIN = 0V - - -1 A High Input Voltage for Logic Circuits VIH - - 0.7 VDD - - V Low Input Voltage for Logic Circuits VIL - - - - 0.3 VDD V CHARACTERISTIC SYMBOL TEST CIRCUIT TEST CONDITION MIN TYP. MAX UNIT Data Hold Time (D-IN-CLOCK) tDHO - - 30 - - ns Data Setup Time (D-IN-CLOCK) tDST - - 50 - - ns tPDSO - 50 - - ns High Clock Pulse Width tCKH - - 30 - - ns Low Clock Pulse Width tCKL - - 30 - - ns Load Pulse Width twLD - - 150 - - ns Load Clock Time (CLOCK-LOAD) tCLKLD - - 100 - - ns Clock Load Time (LOAD-CLOCK) tLDCLK - - 100 - - ns Logic block CHARACTERISTIC Supply Voltage for Logic Block SWITCHING CONDITIONS Serial Output Delay Time (CLOCK-D-OUT) CL = 10 pF 19 2015-01-07 TB62785NG,TB62785FTG TEST CIRCUITS (1) ICC1, ICC2 DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 (2) fOSC DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 20 2015-01-07 TB62785NG,TB62785FTG (3) ISEG DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 (4) Ileak1, Ileak2 DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 21 2015-01-07 TB62785NG,TB62785FTG (5) VOUT DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 (6) IDD1, IDD2, IDD3, VOH1, VOH2, VOL1, VOL2, fCLK DATA-IN DATA-OUT CLOCK R-EXT TB62785 LOAD TEST-IN1 TEST-IN2 22 2015-01-07 TB62785NG,TB62785FTG DUTY CYCLE SETTINGS AND OUTPUT CURRENT VALUES 23 2015-01-07 TB62785NG,TB62785FTG EXTERNAL RESISTANCE AND OUTPUT CURRENT VALUES IOUT - R-EXT The following diagram shows application circuits. Because operation may be unstable due to influences such as the electromagnetic induction of the wiring, the IC should be located as close as possible to the LED. The L-GND and P-GND of the IC are connected to the substrate in the IC. Take care to avoid a potential difference exceeding 0.4V at two pins. When executing the pattern layout, Toshiba recommends not including inductance components in the GND or output pin lines, and not inserting capacitance components exceeding 50pF between the R-EXT and GND. 24 2015-01-07 TB62785NG,TB62785FTG APPLICATION CIRCUIT EXAMPLE (Connection example) TB62785 PRECAUTIONS for USING Utmost care is necessary in the design of the output line, VCC (VDD) and (L-GND, P-GND) line since IC may be destroyed due to short-circuit between outputs, air contamination fault, or fault by improper grounding. 25 2015-01-07 TB62785NG,TB62785FTG Package Dimensions SDIP24-P-300-1.78 Unit: mm Weight: 1.22 g (typ.) 26 2015-01-07 TB62785NG,TB62785FTG P-VQFN24-0404-0.50-001 Unit: mm Weight: 0.037 g (typ.) 27 2015-01-07 TB62785NG,TB62785FTG Notes on Contents 1. Block Diagrams Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. Equivalent Circuits The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. Timing Charts Timing charts may be simplified for explanatory purposes. 4. Application Circuits The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. Test Circuits Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. IC Usage Considerations Notes on handling of ICs [1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time. 28 2015-01-07 TB62785NG,TB62785FTG [5] Carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly. Points to remember on handling of ICs (1) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (2) Back-EMF When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device's motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design. 29 2015-01-07 TB62785NG,TB62785FTG RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. * Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS. * PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT ("UNINTENDED USE"). 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