DBV PACKAGE
(TOP VIEW)
1
2
3
5
4
OUT
GND
VIN+
V+
VIN-
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
CURRENT SHUNT MONITORS
–16-V to 80-V COMMON MODE RANGE
Check for Samples: INA193A-EP
1FEATURES SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
Wide Common-Mode Voltage:
–16 V to 80 V Controlled Baseline
Low Error: 3.0% Over Temp (Max) One Assembly/Test Site
Bandwidth: Up to 500 kHz One Fabrication Site
Three Transfer Functions Available: 20 V/V, Available in Military (–55°C/125°C)
50 V/V, and 100 V/V Temperature Range (1)
Complete Current Sense Solution Extended Product Life Cycle
Extended Product-Change Notification
APPLICATIONS Product Traceability
Welding Equipment
Notebook Computers
Cell Phones
Telecom Equipment
Automotive
Power Management
Battery Chargers (1) Additional temperature ranges available - contact factory
DESCRIPTION
The INA193A current shunt monitors with voltage output can sense drops across shunts at common-mode
voltages from –16 V to 80 V, independent of the INA19x supply voltage. They are available with three output
voltage scales: 20 V/V, 50 V/V, and 100 V/V. The 500-kHz bandwidth simplifies use in current control loops.
The INA193A operates from a single 2.7-V to 18-V supply, drawing a maximum of 1300-μA of supply current. It
is specified over the extended operating temperature range (–55°C to 125°C), and is offered in a space-saving
SOT23 package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
RS
A1
A2
RL
Load
VIN+
Negative
and
Positive
Common-Mode
Voltage
V+
IS
OUT
R1R1
-16 V to 80 V 2.7 V to 18 V
+-
+-
VIN+ VIN-
INA193A
INA193A-EP
SBOS400A MAY 2007REVISED SEPTEMBER 2013
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
–55°C to 125°C SOT23-5 DBV INA193AMDBVREP CCC
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
MODEL GAIN PACKAGE
INA193A 20 V/V SOT23-5
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INA193A-EP
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Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
Supply voltage 18 V
Differential (VIN+ VIN–) –18 18
VIN+ Analog input voltage range V
VIN– Common mode(2) –16 80
Analog outputt voltage range(2) OUT GND 0.3 (V+) + 0.3 V
Input current into any pin(2) 5 mA
Operating temperature range –55 150 °C
Storage temperature range –65 150 °C
Junction temperature 150 °C
Human-Body Model (HBM) 4000
ESD ratings V
Charged-Device Model (CDM) 1000
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
Electrical Characteristics
VS= + 12 V. Boldface limits apply over the specified temperature range, TA= –55°C to 125°C. All specifications at
TA= 25°C, VS= 12 V, VIN+ = 12 V, and VSENSE = 100 mV (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
Full-scale input voltage VSENSE VSENSE = VIN+ VIN– 0.15 (VS 0.2)/Gain V
Common-mode input range VCM –16 80 V
Common-mode rejection CMR VIN+ = –16 V to 80 V 80 94 dB
Over temperature VIN+ = 12 V to 80 V 100 120 dB
Offset voltage, RTI VOS ±0.5 2 mV
Over temperature 0.5 3 mV
vs temperature dVOS/dT 2.5 μV/°C
vs power supply PSR VS= 2.7 V to 18 V, VIN+ = 18 V 5 100 μV/V
Input bias current, VIN– pin IB±8 ±23 μA
OUTPUT (VSENSE 20 mV)
Gain G 20 V/V
VSENSE = 20 mV to 100 mV,
Gain error ±0.2 ±1 %
TA= 25°C
Over temperature VSENSE = 20 mV to 100 mV ±2 %
Total output error(1) ±0.75 ±2.2 %
Over temperature ±1 ±3 %
Nonlinearity error VSENSE = 20 mV to 100 mV ±0.002 ±0.1 %
Output impedance RO1.5
Maximum capacitive load No sustained oscillation 10 nF
(1) Total output error includes effects of gain error and VOS.
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Electrical Characteristics (continued)
VS= + 12 V. Boldface limits apply over the specified temperature range, TA= –55°C to 125°C. All specifications at
TA= 25°C, VS= 12 V, VIN+ = 12 V, and VSENSE = 100 mV (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUTPUT (VSENSE < 20 mV)(2)
–16 V VCM < 0 V 300 mV
0 V VCM VS, VS= 5 V 0.4 V
VS< VCM 80 V 300 mV
VOLTAGE OUTPUT(3) RL= 100 Kto GND
Swing to V+ power-supply rail (V+) 0.1 (V+) 0.2 V
Swing to GND(4) VGND + 3 VGND + 50 mV
FREQUENCY RESPONSE
Bandwidth BW CLOAD = 5 pF 500 kHz
Phase margin CLOAD < 10 nF 40 Degrees
Slew rate SR 1 V/μs
VSENSE = 10 mV to 100 mVPP,
Settling time (1%) tS2μs
CLOAD = 5 pF
NOISE, RTI
Voltage noise density 40 nV/Hz
POWER SUPPLY
Operating range VS2.7 18 V
Quiescent Current IQVOUT = 2 V 700 1300 μA
VSENSE = 0 mV 370 950 μA
TEMPERATURE RANGE
Specified temperature range –55 125 °C
Operating temperature range –55 150 °C
Storage temperature range –65 150 °C
Thermal resistance, SOT23 θJA 200 °C/W
(2) For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section in the
Applications Information.
(3) See Typical Characteristic curve Output Swing vs Output Current.
(4) Specified by design
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0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
016 12 84 0 4 128 2016
Output Error (% )
Common−Mode Voltage (V)
... 76 80
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0050 100 150 200 250 300 350
Output Error
(% error of the ideal output value)
VSENSE (mV)
400 450 500
140
130
120
110
100
90
80
70
60
50
40 10 100 1k 10k
Common−Mode and
Power−Supply Rejection (dB)
Frequency (Hz)
100k
CMR
PSR
20
18
16
14
12
10
8
6
4
2
020 100 200 300 400 500 600 700
VOUT (V)
VDIFFERENTIAL (mV)
800 900
50V/V
20V/V
100V/V
45
40
35
30
25
20
15
10
510k 100k
Gain (dB)
Frequency (Hz)
1M
G = 100 CLOAD = 1000pF
G = 50
G = 20
45
40
35
30
25
20
15
10
510k 100k
Gain (dB)
Frequency (Hz)
1M
G = 100
G = 50
G = 20
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
TYPICAL CHARACTERISTICS
All specifications at TA= 25°C, VS= 12 V, and VIN+ = 12 V, and VSENSE = 100 mV (unless otherwise noted).
GAIN GAIN
vs vs
FREQUENCY FREQUENCY
COMMON-MODE AND POWER-SUPPLY REJECTION
vs
GAIN PLOT FREQUENCY
OUTPUT ERROR OUTPUT ERROR
vs vs
VSENSE COMMON-MODE VOLTAGE
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Output Voltage (50mV/div)
Time (2µs/div)
G = 20
VSENSE = 10mV to 20mV
Time (2µs/div)
G = 20
Output Voltage (500mV/div)
VSENSE = 10mV to 100mV
34
30
26
22
18
14
10
62.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
Output Short−Circuit Current (mA)
Supply Voltage (V)
11.5 17 18
40_C
+25_C
+125_C
12
11
10
9
8
7
6
5
4
3
2
1
00 5 10 15 20
Output Voltage (V )
Output Current (mA)
25 30
VS= 12V
+25_C
+25_C
40_C
40_C
+125_C
+125_C
Sourcing Current
VS= 3V
Sourcing Current Output stage is designed
to source current. Current
sinking capability is
approximately 400µA.
1000
900
800
700
600
500
400
300
200
100
001 2 3 4 5 6 7
IQ(µA)
Output Voltage (V)
8 9 10
INA193A-EP
SBOS400A MAY 2007REVISED SEPTEMBER 2013
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA= 25°C, VS= 12 V, and VIN+ = 12 V, and VSENSE = 100 mV (unless otherwise noted).
POSITIVE OUTPUT VOLTAGE SWING QUIESCENT CURRENT
vs vs
OUTPUT CURRENT OUTPUT VOLTAGE
QUIESCENT CURRENT OUTPUT SHORT-CIRCUIT CURRENT
vs vs
COMMON-MODE VOLTAGE SUPPLY VOLTAGE
STEP RESPONSE STEP RESPONSE
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Time (10µs/div)
G = 100
Output Voltage (2V/div)
VSENSE = 10mV to 100mV
Time (5µs/div)
G = 50
Output Voltage (1V/div)
VSENSE = 10mV to 100mV
Time (5µs/div)
G = 50
Output Voltage (100mV/div)
VSENSE = 90mV to 100mV
Time (2µs/div)
G = 20
Output Voltage (50mV/div)
VSENSE = 90mV to 100mV
Time (5µs/div)
G = 50
Output Voltage (100mV/div)
VSENSE = 10mV to 20mV
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
TYPICAL CHARACTERISTICS (continued)
All specifications at TA= 25°C, VS= 12 V, and VIN+ = 12 V, and VSENSE = 100 mV (unless otherwise noted).
STEP RESPONSE STEP RESPONSE
STEP RESPONSE STEP RESPONSE
STEP RESPONSE
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RS
Load
IS
V+
OUT
RL
R1R2
2.7 V to 18 V
-16 V to 80 V
VIN+ VIN-
VIN+
INA193A
INA193A-EP
SBOS400A MAY 2007REVISED SEPTEMBER 2013
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APPLICATION INFORMATION
Basic Connection
Figure 1 shows the basic connection of INA193A. The input pins, VIN+ and VIN–, should be connected as closely
as possible to the shunt resistor to minimize any resistance in series with the shunt resistance.
Power-supply bypass capacitors are required for stability. Applications with noisy or high impedance power
supplies may require additional decoupling capacitors to reject power supply noise. Connect bypass capacitors
close to the device pins.
Figure 1. INA193A Basic Connection
Power Supply
The input circuitry of the INA193A can accurately measure beyond its power supply voltage, V+. For example,
the V+ power supply can be 5 V, whereas the load power supply voltage is up to 80 V. The output voltage range
of the OUT terminal, however, is limited by the voltages on the power-supply pin.
Accuracy Variations as a Result of VSENSE and Common-Mode Voltage
The accuracy of the INA193A current shunt monitors is a function of two main variables:
VSENSE (VIN+ VIN–) and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as
(VIN+ + VIN–)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE
is usually small.
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VOSRTI (Referred−To−Input) +ǒVOUT1
GǓ*100 mV
G+VOUT1 *VOUT2
100 mV *20 mV
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
This section addresses the accuracy of these specific operating regions:
Normal Case 1: VSENSE 20 mV, VCM VS
Normal Case 2: VSENSE 20 mV, VCM < VS
Low VSENSE Case 1: VSENSE < 20 mV, –16 V VCM < 0
Low VSENSE Case 2: VSENSE < 20 mV, 0 V VCM VS
Low VSENSE Case 3: VSENSE < 20 mV, VS< VCM 80 V
Normal Case 1: VSENSE 20 mV, VCM VS
This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is determined by (Equation 1).
(1)
Where: VOUT1 = Output voltage with VSENSE = 100 mV
VOUT2 = Output voltage with VSENSE = 20 mV
The offset voltage is then measured at VSENSE = 100 mV and referred to the input (RTI) of the current shunt
monitor, as shown in (Equation 2).
(2)
In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for
the this region of operation. In this plot, VS= 12 V; for VCM 12 V, the output error is at its minimum. This case is
also used to create the VSENSE 20 mV output specifications in the Electrical Characteristics table.
Normal Case 2: VSENSE 20 mV, VCM < VS
This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode
operating area in which the part functions, as seen in the Output Error vs Common-Mode Voltage curve. As
noted, for this graph VS= 12 V; for VCM < 12 V, the Output Error increases as VCM becomes less than 12 V, with
a typical maximum error of 0.005% at the most negative VCM = –16 V.
Low VSENSE Case 1: VSENSE < 20 mV, –16 V VCM < 0; and Low VSENSE Case 3: VSENSE < 20 mV,
VS< VCM 80 V
Although the INA193A is not designed for accurate operation in either of these regions, some applications are
exposed to these conditions; for example, when monitoring power supplies that are switched on and off while VS
is still applied to the INA193A. It is important to know what the behavior of the devices will be in these regions.
As VSENSE approaches 0 mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal
offset can appear at the current shunt monitor output with a typical maximum value of VOUT = 300 mV for
VSENSE = 0 mV. As VSENSE approaches 20 mV, VOUT returns to the expected output value with accuracy as
specified in the Electrical Characteristics. Figure 2 illustrates this effect using the INA195A and INA198A
(Gain = 100).
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2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0024 6 8 10 12 14 16 18
VOUT (V)
VSENSE (mV)
20
Actual
Ideal
INA193A-EP
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Figure 2. Example for Low VSENSE Cases 1 and 3
(INA195A, INA198A: Gain = 100)
Low VSENSE Case 2: VSENSE < 20 mV, 0 V VCM VS
This region of operation is the least accurate for the INA193A. To achieve the wide input common-mode voltage
range, these devices use two op amp front ends in parallel. One op amp front end operates in the positive input
common-mode voltage range, and the other in the negative input region. For this case, neither of these two
internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches voltages
close to linear operation levels for Normal Case 2. This deviation from linear operation becomes greatest the
closer VSENSE approaches 0 V. Within this region, as VSENSE approaches 20 mV, device operation is closer to that
described by Normal Case 2. Figure 3 illustrates this behavior for the INA195A. The VOUT maximum peak for this
case is tested by maintaining a constant VS, setting VSENSE = 0 mV and sweeping VCM from 0 V to VS. The exact
VCM at which VOUT peaks during this test varies from part to part, but the VOUT maximum peak is tested to be less
than the specified VOUT tested limit.
Figure 3. Example for Low VSENSE Case 2
(INA195A, INA198A: Gain = 100)
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A2
RL
INA193A
OUT
RS
A1
0.1 Fm
Load
V+
IL
R1R2
VIN+
VIN+ VIN-
-16 V to 80 V
Negative
and
Positive
Common-Mode
Voltage
V+ 3 V>
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
Shutdown
Because the INA193A consumes a quiescent current less than 1 mA, it can be powered by either the output of
logic gates or by transistor switches to supply power. Use a totem pole output buffer or gate that can provide
sufficient drive along with 0.1-μF bypass capacitor, preferably ceramic with good high frequency characteristics.
This gate should have a supply voltage of 3 V or greater because the INA193A requires a minimum supply
greater than 2.7 V. In addition to eliminating quiescent current, this gate also turns off the 10 μA bias current
present at each of the inputs. An example shutdown circuit is shown in Figure 4.
Figure 4. INA193A Example Shutdown Circuit
Selecting RS
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-
signal accuracy and maximum permissible voltage loss in the measurement line. High values of RSprovide better
accuracy at lower currents by minimizing the effects of offset, while low values of RSminimize voltage loss in the
supply line. For most applications, best performance is attained with an RSvalue that provides a full-scale shunt
voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is 500 mV.
Transient Protection
The –16 V to 80 V common-mode range of the INA193A is ideal for withstanding automotive fault conditions
ranging from 12-V battery reversal up to 80-V transients, since no additional protective components are needed
up to those levels. In the event that the INA193A is exposed to transients on the inputs in excess of its ratings,
then external transient absorption with semiconductor transient absorbers (zeners or Transzorbs) will be
necessary. Use of MOVs or VDRs is not recommended except when they are used in addition to a
semiconductor transient absorber. Select the transient absorber such that it will never allow the INA193A to be
exposed to transients greater than 80 V (that is, allow for transient absorber tolerance, as well as additional
voltage due to transient absorber dynamic impedance). Despite the use of internal zener type ESD protection,
the INA193A– does not lend itself to using external resistors in series with the inputs since the internal gain
resistors can vary up to ±30% (if gain accuracy is not important, then resistors can be added in series with the
INA193A inputs with two equal resistors on each input).
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GainError% +100 *ǒ100 5k W
5k W)RFILTǓ
INA193A-EP
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Output Voltage Range
The output of the INA193A is accurate within the output voltage swing range set by the power-supply pin, V+.
This is best illustrated when using the INA195A or INA198A (which are both versions using a gain of 100), where
a 100 mV full-scale input from the shunt resistor requires an output voltage swing of 10 V, and a power-supply
voltage sufficient to achieve 10 V on the output.
RFI/EMI
Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Small ceramic capacitors placed directly across amplifier inputs can reduce RFI/EMI sensitivity. PCB layout
should locate the amplifier as far away as possible from RFI sources. Sources can include other components in
the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current
and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with
changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding
may be needed. Twisting wire input leads makes them more resistant to RF fields.
Input Filtering
An obvious and straightforward location for filtering is at the output of the INA193A; however, this location
negates the advantage of the low output impedance of the internal buffer. The only other option for filtering is at
the input pins of the INA193A, which is complicated by the internal 5-k+ 30% input impedance; this is
illustrated in Figure 5. Using the lowest possible resistor values minimizes both the initial shift in gain and effects
of tolerance. The effect on initial gain is given by:
(3)
Total effect on gain error can be calculated by replacing the 5-kterm with 5 k 30%, (or 3.5 k) or
5 k+ 30% (or 6.5 k). The tolerance extremes of RFILT can also be inserted into the equation. If a pair of 100-
1% resistors are used on the inputs, the initial gain error will be approximately 2%. Worst-case tolerance
conditions will always occur at the lower excursion of the internal 5-kresistor (3.5 k), and the higher excursion
of RFILT 3% in this case. Note that the specified accuracy of the INA193A must then be combined in addition to
these tolerances. While this discussion treated accuracy worst-case conditions by combining the extremes of the
resistor values, it is appropriate to use geometric mean or root sum square calculations to total the effects of
accuracy variations.
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LOAD
VSUPPLY
1
CFILT
V+
R1
RL
R1
5 kW
R R
SHUNT FILTER
<<
R 100
FILT < W R 100
FILT < W
VIN+
f-3dB
2 (2 R ) CpFILT FILT
f =
-3dB
VIN-
+5 V
5 kW
OUT
INA193A
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
Figure 5. Input Filter (Gain Error 15% to –2.2%)
Inside the INA193A
The INA193A uses a new, unique internal circuit topology that provides common-mode range extending from –16
V to 80 V while operating from a single power supply. The common-mode rejection in a classic instrumentation
amp approach is limited by the requirement for accurate resistor matching. By converting the induced input
voltage to a current, the INA193A provides common-mode rejection that is no longer a function of closely
matched resistor values, providing the enhanced performance necessary for such a wide common-mode range.
A simplified diagram (shown in Figure 6) shows the basic circuit function. When the common-mode voltage is
positive, amplifier A2 is active.
The differential input voltage, (VIN+) (VIN–) applied across RS, is converted to a current through a resistor. This
current is converted back to a voltage through RL, and then amplified by the output buffer amplifier. When the
common-mode voltage is negative, amplifier A1 is active. The differential input voltage, (VIN+) (VIN–) applied
across RS, is converted to a current through a resistor. This current is sourced from a precision current mirror
whose output is directed into RLconverting the signal back into a voltage and amplified by the output buffer
amplifier. Patent-pending circuit architecture ensures smooth device operation, even during the transition period
where both amplifiers A1 and A2 are active.
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RS
A1
A2
Load
V+
IS
OUT
5 kW
VIN+ VIN-
VIN+
Negative
and
Positive
Common-Mode
Voltage
5 kW
R1
(1) R1
(1)
NOTE: (1) Nominal resistor value
is shown. 15% variation is possible.
Resistor ratio is matched to 1%.
±
±INA193A
G = 20, R = 100 k
LWRL
(1)
INA193A-EP
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Figure 6. INA193A Simplified Circuit Diagram
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LOAD
–12 V
LOAD
GND
5 V
RSHUNT
I1
OUT
for
12-V
Common-Mode
V+
GND
I2
VIN+ VIN-
V+
INA193A
OUT
for
12 V
Common-Mode
-
INA193A
–12 V
RSHUNT
VIN+ VIN-
INA193A-EP
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
Figure 7. Monitor Bipolar Output Power-Supply Current
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RSHUNT
Solenoid
Up to 80 V
2.7 V to 18 V
OUT
V+
VIN+ VIN-
INA193A
LOAD
VSUPPLY
RSHUNT
40 kW
5 V
VOUT
2.5 V
VREF
V+ V+
5V
OUT OUT
5 V
VIN+ VIN-VIN+ VIN-
INA193A INA193A
INA152A
40 kW
40 kW40 kW
INA193A-EP
SBOS400A MAY 2007REVISED SEPTEMBER 2013
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Figure 8. Bidirectional Current Monitoring
Figure 9. Inductive Current Monitor Including Flyback
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R1
R2 REF
TLV3012
REF
R1
R2
TLV3012
OUT
V+
OUT
VIN+ VIN-
INA193A
1.25-V
Internal
Reference
For output signals
comparator trip-point.>
(a) INA193A output adjusted by voltage divider
V+VIN+ VIN-
(b) Comparator reference voltage adjusted by voltage divider
For use with
small output signals
1.25-V
Internal
Reference
INA193A
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SBOS400A MAY 2007REVISED SEPTEMBER 2013
Figure 10. INA193A With Comparator
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: INA193A-EP
PACKAGE OPTION ADDENDUM
www.ti.com 26-Aug-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
INA193AMDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 CCC
V62/07638-01XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 CCC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 26-Aug-2017
Addendum-Page 2
OTHER QUALIFIED VERSIONS OF INA193A-EP :
Automotive: INA193A-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA193AMDBVREP SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Feb-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA193AMDBVREP SOT-23 DBV 5 3000 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Feb-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
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V62/07638-01XE INA193AMDBVREP INA193AMDBVREPG4