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1
March 23, 2011
IRS2052MPbF
2 CH Digital Audio Amplifie
r
Features
2 channel integrated analog input Class D
audio amplifier driver
Versatile protection control enabling
latched, non-latched, or host controlled
shutdown function
Integrated clock oscillator
Clipping detection
External thermal sensor input
On-chip thermal shutdown with warning
Programmable over current protection
Programmable dead-time generation
Start and stop click noise reduction
Under voltage protection
High noise immunity
Note
The IRS2052M digital audio driver is a two
channel version of IRS2092(S) with additional
features, such as internal clock and over
temperature protection. The IRS2052M
features clipping detection outputs, on-chip
over temperature detection, over temperature
sensor inputs and a fault reporting output.
Product Summary
Topology Half-Bridge
VOFFSET (max) +/- 100 V
IO+ & IO- (typical) 0.5 A & 0.6 A
Selectable deadtime 45/65/85/105 ns
DC offset <20 mV
OC protection delay 500 ns (max)
Shutdown propagation
delay 250 ns (max)
Error amplifier open loop
gain >60 dB
Package
MLPQ48 (7x7 mm, 0.50 mm pitch)
Typical Connection
IRS2052M
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2
Table of Contents Page
Typical Connection Diagram 1
Qualification Information 3
Absolute Maximum Ratings 4
Recommended Operating Conditions 6
Electrical Characteristics 7
Functional Block Diagram 12
Input/Output Pin Equivalent Circuit Diagram 13
Lead Definitions 15
Lead Assignments 17
Application Information and Additional Details 18
Package Details 20
Part Marking Information 21
Ordering Information 23
Change History 24
IRS2052M
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Description
The IRS2052M integrates two channels of high voltage, high performance Class D audio amplifier drivers
with PWM modulators and protections. In conjunction with external MOSFET and external components, a
complete 2 channel Class D audio amplifier can be realized. The IRS2052M is designed with floating analog
inputs and protection control interface pin especially for half bridge topology. High and low side MOSFET are
protected from over current conditions by a programmable bi-directional current sensing. Essential elements
of PWM modulator section allow flexible system design. A small MLPQ48 package enhances the benefit of
smaller size of Class D topology. The IRS2052M is a lead-free, ROHS compliant.
Qualification Information
Industrial††
Qualification Level Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Moisture Sensitivity Level MSL2†††, 260°C
(per IPC/JEDEC J-STD-020)
Machine Model Class B
(per JEDEC standard EIA/JESD22-A115)
ESD Human Body Model Class 1B
(per EIA/JEDEC standard JESD22-A114)
IC Latch-Up Test Class I, Level A
(per JESD78)
RoHS Compliant Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
IRS2052M
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4
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM; all currents are defined positive into any lead.
The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Symbol Definition Min. Max. Units
VBn High side floating supply voltage -0.3 215 V
VSn High side floating supply voltage††, n=1-2 VBn -15 VBn +0.3 V
VHon High side floating output voltage, n=1-2 VSn -0.3 VBn +0.3 V
VCSHn CSH pin input voltage, n=1-2 VSn -0.3 VBn +0.3 V
VCC VCC low side fixed supply voltage†† -0.3 20 V
VCC2 VCC2 low side fixed supply voltage†† -0.3 20 V
VLon Low side output voltage, n=1-2 -0.3 VCC2 +0.3 V
VAA Floating input positive supply voltage†† (See IAAZ) 220 V
VSS Floating input negative supply voltage†† -1
(See ISSZ) VAA +0.3 V
VGND Floating input supply ground voltage VSS -0.3 VAA +0.3 V
IIN-n Inverting input current , n=1-2 - ±3 mA
VCSD SD pin input voltage VSS -0.3 VAA +0.3 V
VCOMPn COMP pin input voltage, n=1-2 VSS -0.3 VAA +0.3 V
VCLIPn CLIP pin input voltage GND -0.3 VAA +0.3 V
ICLIPn CLIP pin sinking current - 5 mA
VFAULT FAULT pin input voltage GND -0.3 VAA +0.3 V
IFAULT FAULT pin sinking current - 5 mA
VOTW OTW pin input voltage GND -0.3 VAA +0.3 V
IOTW OTW pin sinking current - 5 mA
VDT DT pin input voltage -0.3 VCC +0.3 V
VOCSET OCSET pin input voltage -0.3 VCC +0.3 V
VOTPn OTP pin input voltage -0.3 VCC +0.3 V
IAAZ Floating input positive supply zener clamp current†† - 10 mA
ICCZ Low side VCC supply zener clamp current†† - 10 mA
ICC2Z Low side VCC2 supply zener clamp current†† - 10 mA
IOTPZ OTP pin zener clamping current - 1 mA
IBSZn Floating supply zener clamp current††, n=1-2 - 10 mA
IOREF Reference output current - 5 mA
dVSn/dt Allowable Vs voltage slew rate, n=1-2 - 50 V/ns
dVSS/dt Allowable Vss voltage slew rate††† - 50 V/ms
IRS2052M
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Absolute Maximum Ratings (Cont’d)
Symbol Definition Min. Max. Units
Pd Maximum power dissipation @ TA +25°C†††† - 6 W
RthJA Thermal resistance, Junction to ambient†††† - 20
°C/W
TJ Junction Temperature - 150 °C
TS Storage Temperature -55 150 °C
TL Lead temperature (Soldering, 10 seconds) - 300 °C
IN-1 and IN-2 contain clamping diode to GND.
†† VAA-VSS, VCC-COM, VCC2-COM2, VB1-VS1 and VB2-VS2 contain internal shunt zener
diodes. Note that the voltage ratings of these can be limited by the clamping current.
††† For the rising and falling edges of step signal of 10V. VSS=15V to 200V.
†††† According to JESD51-5. JEDEC still air chamber.
IRS2052M
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Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions below. The Vs and
COM offset ratings are tested with supplies biased at VAA-VSS=10V, VCC=VCC2=12V, COM2=COM and VB-
VS=12V. All voltage parameters are absolute voltages referenced to COM; all currents are defined positive
into any lead.
Symbol Definition Min. Max. Units
VBn High side floating supply absolute voltage, n=1-2 VSn +10 VSn +14 V
VSn High side floating supply offset voltage 200 V
VAA Floating input supply voltage VSS + 4.5 VSS + 15 V
IAAZ Floating input positive supply zener clamp current 1 11 mA
VSS Floating input supply absolute voltage 0 200 V
VHon High side floating output voltage, n=1-2 Vs VB V
VCC Low side fixed supply voltage 10 15 V
VCC2 Low side fixed supply voltage 10 15 V
VCC-
VCC2 Low side voltages difference - 1.2 V
VLon Low side output voltage, n=1-2 0 VCC2 V
VGND GND pin input voltage VSS
††† V
AA
††† V
VIN-n Inverting input voltage, n=1-2 VGND -0.5††† V
GND +0.5††† V
VCSD CSD pin input voltage VSS VAA V
VCOMPn COMP pin input voltage, n=1-2 VSS V
AA V
CCOMPn COMP pin phase compensation capacitor to GND,
n=1-2 1 - nF
VDT DT pin input voltage 0 VCC V
IOREF Reference output current to COM†† 0.3 0.8 mA
VOCSET OCSET pin input voltage 0.5 5 V
VCSHn CSH pin input voltage, n=1-2 VSn V
Bn V
dVSS/dt Allowable VSS voltage slew rate upon power-up†††† - 50 V/ms
fSW Switching Frequency - 800 kHz
TA Ambient Temperature -40 125 °C
Logic operational for Vsn equal to –5V to +200V. Logic state held for Vsn equal to –5V to –VBSn.
†† Nominal voltage for VREF is 5.1V. IOREF of 0.3 – 0.8mA dictates total external resistor value on VREF
to be 6.3k to 16.7k ohm.
††† GND input voltage is limited by IIN-n.
†††† Vss ramps up from 0V to 200V.
IRS2052M
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Electrical Characteristics
VCC=VCC2=VBS1=VBS2=VBS3=VBS4 =12V, VSS=VS1=VS2=COM=COM2=0V, VGND=5V, VAA=10V, CL=1nF and
TA=25°C unless otherwise specified.
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Low Side Supply 1
UVCC+ Vcc supply UVLO positive
threshold
8.4 8.9 9.4 V
UVCC- Vcc supply UVLO negative
threshold
8.2 8.7 9.2 V
UVCCHYS UVCC hysteresis - 0.2 - V
IQCC Low side quiescent current - - 5 mA VDT=VCC
VCLAMPL1 Low side zener diode clamp
voltage 19.6 20.4 21.6 V ICC=10mA
Low Side Supply 2
IQCC2 Low side quiescent current - - 4 mA
VCLAMPL2 Low side zener diode clamp
voltage 19.6 20.4 21.6 V ICC2=10mA
High Side Floating Supply
UVBS+n High side well UVLO positive
threshold, n=1-2 8.0 8.5 9.0 V
UVBS-n High side well UVLO negative
threshold, n=1-2 7.8 8.3 8.8 V
UVBSHYSn UVBS hysteresis, n=1-2 - 0.2 - V
IQBSn High side quiescent current,
n=1-2 - - 1 mA
ILKHn High to Low side leakage
current, n=1-2 - - 50 µA VBn=VSn =200V
VCLAMPHn High side zener diode clamp
voltage, n=1-2 14.7 15.3 16.2 V IBSn=5mA
Floating Input Supply
UVAA+ VAA floating supply UVLO
positive threshold from VSS
8.2 8.7 9.2 V GND pin floating
UVAA- V
AA floating supply UVLO
negative threshold from VSS
7.7 8.2 8.7 V GND pin floating
UVAAHYS UVAA hysteresis - 0.5 - V GND pin floating
IQAASD Floating Input positive quiescent
supply current in shutdown mode
- 1.5 3 mA VCSD =VSS
IQAA10 Floating Input positive quiescent
supply current, positive input
- 7 10 mA VIN- = VSS+5.2V
IQAA11 Floating Input positive quiescent
supply current, negative input
- 5 8 mA VIN- = VSS+4.8V
IQAAST Floating Input positive quiescent
supply current in start-up mode
- 8 12 mA VCSD =VSS+5.0V
ILKM Floating input side to Low side
leakage current
- - 50 µA VAA=VSS=VGND=
100V
VCLAMPM Floating supply zener diode
clamp voltage 19.6 20.4 22.6 V IAA=5mA,
VCSD =VSS
IRS2052M
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Electrical Characteristics (Cont’d)
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Audio Input (GND=0V, VAA=5V, VSS=-5V, COM=COM2=VCC=VCC2=-5V, VS1=VS2=CSH1=CSH2=-5V,
DT=OCSET=-5V)
VOsn CHn input offset voltage, n=1-2 -15 0 15 mV
IBINn CHn input bias current, n=1-2 - - 40 nA
GBWn CHn small signal bandwidth,
n=1-2
- 9 - MHz CCOMPn=1nF,
Rfn=0
VCOMPn CHn OTA Output voltage, n=1-2 VAA-1 - VSS+1 V
gmn CHn OTA transconductance, n=1-
2
- 100 - mS VIN-n=10mV
GVn CHn OTA gain, n=1-2 60 - - dB
VNrmsn CHn OTA input noise voltage,
n=1-2
- 250 - mVrms BW=20kHz,
Resolution
BW=22Hz
Fig.5
SRn CHn slew rate, n=1-2 - ±5 - V/us CCOMPn=1nF
CMRRn CHn common-mode rejection
ratio, n=1-2 - 60 - dB
PSRRn CHn supply voltage rejection ratio,
n=1-2 - 65 - dB
Vth+CLIPn CHn clip detection positive
threshold, n=1-2 0.85xVAA 0.90xVAA 0.95xVAA
V
Vth-CLIPn CHn clip detection negative
threshold, n=1-2 0.05xVAA 0.10xVAA 0.15xVAA
V
tCLIPn CHn clipping detection
propagation delay, n=1-2 - 40 - ns Note 1
tCLIPmin CHn clipping detection minimum
output duration - 3 -
us Note 1
PWM comparator
VthPWM PWM comparator threshold in
COMP
- (VAA
VSS)/2
- V
fOTAn CHn COMP pin star-up local
oscillation frequency, n=1-3 0.6 1.0 1.5 MHz VCSD =VSS+5V
IRS2052M
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Electrical Characteristics (Cont’d)
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Clock Oscillator
ICK1SINK,
ICK2SINK
X1B, X2B pins output sink current
at VX1B, VX2B = 0.5V - - 20 mA
ICK1SOURC
E,
ICK2SOURC
E
X1B, X2B pins output source
current at VX1B, VX2B = VAA – 0.5
V
- - -20 mA
VOLCK1,
VOLCK2
X1B, X2B pins low level output
voltage - - 0.07 V
VOHCK1,
VOHCK2
X1B, X2B pins high level output
voltage - - 9.95 V
VILCK1,
VILCK2 X1A, X2A pins input low voltage - - 2 V
VIHCK1,
VIHCK2 X1A, X2A pins input high voltage 8 - - V
IIN1, IIN2 X1A, X2A pins input current - - +/- 20 uA
CIN1,
CIN2
X1A, X2A pins input capacitance
at X1A, X2A pins - 1 - pF Note 1
tONCK1,
tOFFCK1,
tONCK2,
tOFFCK2
Propagation delay time from X1A
to X1B, X2A to X2B - 40 - ns
VthCKSL1 CKSL pin threshold 1 0.61xVAA 0.67xVAA 0.74xVAA V
VthCKSL2 CKSL pin threshold 2 0.29xVAA 0.33xVAA 0.37xVAA V
IRS2052M
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Electrical Characteristics (Cont’d)
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Protection
VREF Reference output voltage 4.8 5.1 5.4 V IOREF =0.5mA
VthOCLn CHn low side OC threshold in
Vsn, n=1-2
1.1 1.2 1.3 V OCSET=1.2V
VthOCHn CHn high side OC threshold in
VCSHn, n=1-2
1.1+ Vs 1.2+ Vs 1.3+ Vs V Vs=200V,
VETO External OTP pin open circuit
voltage 4.8 5.1 5.4 V
VETW External OTP pin warning
threshold 1.1 1.4 1.6 V
VETSD External OTP pin shutdown
threshold 2.3 2.8 3.3 V
IET External OTP bias sourcing
current 0.43 0.65 0.87 mA OTP=0V
TW On-chip thermal warning - TSD
-20
- °C
TSD ON-chip thermal shutdown - 150 - °C
TWHYT On-chip thermal warning
hysteresis
- 15 - °C
TSDHYT ON-chip thermal shutdown
hysteresis
- 15 - °C
Note 1
Vth1 CSD pin shutdown release
threshold 0.62xVAA 0.70xVAA 0.78xVAA V
Vth2 CSD pin self reset threshold 0.26xVAA 0.30xVAA 0.34xVAA V
ICSD+ CSD pin discharge current 70 100 130 µA VCSD = VSS + 7.5V
ICSD- CSD pin charge current 70 100 130 µA VCSD = VSS + 7.5V
VFAULT FAULT pin warning output voltage - GND GND
+0.1
V RPULL-UP = 10k
VOTW OTW pin warning output voltage - GND GND
+0.1
V RPULL-UP = 10k
tSSDn CHn soft shutdown propagation
delay from VCSD < VSS + Vth1 to
Shutdown
- - 1.4 us fPWM=400kHz,
Fig.2
tOCHn CHn propagation delay time from
VCSHn > VthOCHn to Shutdown, n=1-
2
- - 800 ns Fig.4
tOCLn CHn propagation delay time from
Vsn> VthOCL to Shutdown, n=1-2
- - 700 ns Fig.3
PSD Shutdown timing - 40 - % fPWM=400kHz,
Duty= 50%,
Fig.2
IRS2052M
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Electrical Characteristics (Cont’d)
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Gate Driver
Io+n CHn output high short circuit
current (Source) , n=1-2
- 0.5 - A Vo=0V,
PW<10µS,
Note 1
Io-n CHn output low short circuit
current (Sink) , n=1-2
- 0.6 - A Vo=12V,
PW<10µS,
Note 1
VOLn CHn low level out put voltage
LO – COM, HO - VS, n=1-2
- - 0.1 V
VOHn CHn high level out put voltage
VCC – LO, VB - HO, n=1-2
- - 1.4 V
Io=0A
Ton0n CHn high and low side turn-on
propagation delay, n=1-2
- 350 - ns
Toff0n CHn high and low side turn-off
propagation delay, n=1-2
- 325 - ns VDT = VCC
tr Turn-on rise time - 25 50 ns
tf Turn-off fall time - 20 40 ns
DT1n
CHn deadtime: LOn turn-off to
HOn turn-on (DTLO-HO) & HOn
turn-off to LnO turn-on (DTHO-LO)
30 45 60 ns VDT>VDT1,
DT2n
CHn deadtime: LOn turn-off to
HOn turn-on (DTLO-HO) & HOn
turn-off to LOn turn-on (DTHO-LO)
45 65 85 ns
VDT1>VDT> VDT2,
DT3n
CHn deadtime: LOn turn-off to
HOn turn-on (DTLO-HO) & HOn
turn-off to LOn turn-on (DTHO-LO)
60 85 110 ns
VDT2>VDT> VDT3,
DT4n
CHn deadtime: LOn turn-off to
HOn turn-on (DTLO-HO) & HO turn-
off to LOn turn-on (DTHO-LO)VDT=
VDT4
80 105 145 ns VDT<VDT3
VDT1 DT mode select threshold 1 0.51xVcc 0.57xVcc 0.63xVcc V
VDT2 DT mode select threshold 2 0.32xVcc 0.36xVcc 0.40xVcc V
VDT3 DT mode select threshold 3 0.21xVcc 0.23xVcc 0.25xVcc V
Note 1 Guaranteed by design, but not tested in production.
IRS2052M
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Functional Block Diagram
10 9 81112 7 6 5 4 3 2 1
272829 26 25303233343536 31
VAA
GND
VSS
IN1
COMP1
CSD
IN2
COMP2
CLIP1
CLIP2
CSH1
LO2
HO1
LO1
HO2
VB2
CSH2
VB1
COM2
VCC2
NC
NC
NC
NC
PWM
2
PWM
1
CLOCK OSC
VREF
DT2
DT1
OCH2
OCL1
OCL2
LOW SIDE SUB
UVCC OTP
FLOATING INPUT
OCTS UVBS1
UVBS2
SOFT SD
CTRL
UVAA
PROT
CTRL
VCC
SD
SD_REQ
SD
SD
OCH1
IRS2052M
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Input/Output Pin Equivalent Circuit Diagrams
ESD
Diode
ESD
Diode
VAA
COMP
VSS
IRS2052M
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Input/Output Pin Equivalent Circuit Diagrams (Cont’d)
ESD
Diode
ESD
Diode
VCC
OTP
COM
VREF
IRS2052M
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Lead Definitions
Pin #
Symbol I/O Description
1 NC
2 OTW O On-chip over temperature warning output
3 FAULT O Fault reporting output
4 CKO O Clock output
5 X1B O Clock oscillator output 1
6 X1A I Clock oscillator input 1
7 X2B O Clock oscillator output 2
8 X2A I Clock oscillator input 2
9 XSL I Clock oscillator select (VAA: osc 1, GND: osc 2, VSS: No sync)
10 NC
11 VS1 I CH1 High side floating supply return
12 NC
13 NC
14 HO1 O CH1 High side output
15 VB1 I CH1 High side floating supply
16 CSH1 I CH1 High side over current sensing input, referenced to VS1
17 LO1 O CH1 Low side output
18 VCC2 I Low side gate drive supply
19 COM2 I Low side gate drive supply return
20 LO2 O CH2 Low side output
21 CSH2 I CH2 High side over current sensing input, referenced to VS2
22 VB2 I CH2 High side floating supply
23 HO2 O CH2 High side output
24 NC
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Lead Definitions (Cont’d)
Pin #
Symbol I/O Description
25 NC
26 VS2 I CH2 High side floating supply return
27 NC
28 NC
29 OTP I Over temperature sensor input, referenced to COM
30 COM I Low side gate drive supply return
31 VCC I Low side gate drive supply
32 DT I Deadtime program, reference to COM
33 OCSET I Low side OCP threshold, referenced to COM
34 VREF O 5.1V reference voltage output for OCSET
35 NC
36 NC
37 NC
38 CLIP2 O Clipping detection output CH2, open drain, referenced to GND
39 COMP2 O CH2 PWM comparator input
40 IN2 I CH2 inverting audio input
41 GND I Input reference GND
42 VSS I Floating input negative supply
43 VAA I Floating input positive supply
44 IN1 I CH1 inverting audio input
45 COMP1 O CH1 PWM comparator input
46 CLIP1 O Clipping detection output CH1, open drain, referenced to GND
47 CSD I/O Protection control
48 NC
IRS2052M
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Lead Assignments (MLPQ48_7x7mm)
15 16 171413 18 20 21 22 23 24
10 9 81112 7 6 5 4 3 2
45 44 434647 42 41 40 39 38 37
272829 26 25303233343536
19
48
1
31
VAA
GND
VSS
IN1
COMP1
CSD
IN2
COMP2
CLIP1
CLIP2
NC
VS1
X1B
X1A
X2B
X2A
XSL
CKO
FAULT
OTW
CSH1
LO2
HO1
LO1
HO2
VB2
CSH2
VB1
COM2
VCC2
VREF
OCSET
VS2
COM
DT
OTP
VCC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IRS2052M
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Application Information and Additional Details
Figure 1 Switching Time Waveform
Definitions
Figure 2 CSD to Shutdown Wav eform
Definitions
VthOCL
tOCL
90%
VS
LO
Figure 3 VS > VthOCL to Shutdown Waveform
VthOCH
tOCH
90%
CSH
HO
VS
Figure 4 VCSH > VthOCH to Shutdown
Waveform
IRS2052M
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5V
5V
100
47 k
3.3 µF
2nF
10
10
10 µF
10 µF
100
`
10
10
10 µF
10 µF
NOISE OUT
100
100 10 k
47 µF
100 kLT1028
GND
10 nF
OTA
VAA
GND
VSS
COMP
IN-
DUT
Figure 5: OTA input noise voltage mesurent circuit
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Package Details: MLPQ 7X7
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Tape and Reel Details: MLPQ 7X7
IRS2052M
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Part Marking Information
IRSxxxxM
IR Logo
CYWW?
Part Number
Date Code
Pin 1
Lot Code
(Prod mode – 4 digit SPN code)
Assembly
Site Code
XXXX
Marking Code
(Per Marking Spec)
IRS2052M
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Ordering Information
Standard Pack
Base Part Number Package Type Form Quantity
Complete Part Number
IRS2052M MLPQ 48 7x7 Tape and Reel 3000 IRS2052MTRPBF
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any
infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by
implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document
are subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105