LTC2944 60V Battery Gas Gauge with Temperature, Voltage and Current Measurement Description Features Measures Accumulated Battery Charge and Discharge nn 3.6V to 60V Operating Range for Multiple Cells nn 14-Bit ADC Measures Voltage, Current and Temperature nn 1% Voltage, Current and Charge Accuracy nn 50mV Sense Voltage Range nn High Side Sense nn I2C Interface/SMBus Interface nn General Purpose Measurements for Any Battery Chemistry and Capacity nn Configurable Alert Output/Charge Complete Input nn Quiescent Current Less Than 150A nn Small 8-Lead 3mm x 3mm DFN Package The LTC(R)2944 measures battery charge state, battery voltage, battery current and its own temperature in portable product applications. The wide input voltage range allows use with multicell batteries up to 60V. A precision coulomb counter integrates current through a sense resistor between the battery's positive terminal and the load or charger. Voltage, current and temperature are measured with an internal 14-bit No Latency TM ADC. The measurements are stored in internal registers accessible via the onboard I2C/SMBus Interface. nn nn The LTC2944 features programmable high and low thresholds for all four measured quantities. If a programmed threshold is exceeded, the device communicates an alert using either the SMBus alert protocol or by setting a flag in the internal status register. The LTC2944 requires only a single low value sense resistor to set the measured current range. nn All registered trademarks and trademarks are the property of their respective owners. Applications Electric and Hybrid Electric Vehicles Power Tools nn Electric Bicycles, Motorcycles, Scooters nn High Power Portable Equipment nn Photo Voltaics nn Backup Battery Systems Typical Application Total Charge Error vs Differential Sense Voltage 1A LOAD CHARGER 3.3V 3 1F 2k 2k VDD ALCC P SDA SENSE+ SENSE- SCL GND RSENSE 50m + MULTICELL Li-ION 2 CHARGE ERROR (%) 2k LTC2944 VSENSE+ = 3.6V TO 60V 1 0 -1 -2 2944 TA01a -3 0.1 1 10 100 VSENSE (mV) 2944 TA01b 2944fa For more information www.linear.com/LTC2944 1 LTC2944 Absolute Maximum Ratings Pin Configuration (Notes 1, 2) Supply Voltage (SENSE+)............................ -0.3V to 65V SCL, SDA, ALCC Voltage............................... -0.3V to 6V SENSE-................(-0.3V + VSENSE+) to (VSENSE+ + 0.3V) Operating Ambient Temperature Range LTC2944C................................................ 0C to 70C LTC2944I.............................................-40C to 85C Storage Temperature Range................... -65C to 150C TOP VIEW SENSE+ 1 GND 2 GND 3 SCL 4 8 SENSE- 9 7 GND 6 ALCC 5 SDA DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 150C, JA = 100C/W EXPOSED PAD (PIN 9) PCB GND CONNECTION OPTIONAL Order Information http://www.linear.com/product/LTC2944#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2944CDD#PBF LTC2944CDD#TRPBF LGCR 8-Lead (3mm x 3mm) Plastic DFN 0C to 70C LTC2944IDD#PBF LTC2944IDD#TRPBF LGCR 8-Lead (3mm x 3mm) Plastic DFN -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Requirements VSENSE+ Supply Voltage ISUPPLY Supply Current (Note 3) Battery Gas Gauge On, ADC Sleep Battery Gas Gauge On, ADC On Shutdown ISENSE+ Pin Current (Note 3) Battery Gas Gauge On, ADC Sleep Battery Gas Gauge On, ADC On Shutdown 80 500 15 A A A ISENSE- Pin Current (Note 3) Battery Gas Gauge On, ADC Sleep Battery Gas Gauge On, ADC On Shutdown 1 350 1 A A A VUVLO Undervoltage Lockout Threshold VSENSE+ Falling l VSENSE+ - VSENSE- l l 3.6 80 850 15 l l l 3.0 3.5 60 V 150 950 30 A A A 3.6 V 50 mV Coulomb Counter VSENSE Sense Voltage Differential Input Range RIDR Differential Input Resistance Across SENSE+ and SENSE- (Note 8) qLSB Charge LSB (Note 4) Prescaler M = 4096(Default), RSENSE = 50m 400 k 0.340 mAh 2944fa 2 For more information www.linear.com/LTC2944 LTC2944 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. SYMBOL PARAMETER CONDITIONS TCE Total Charge Error (Note 5) 10mV |VSENSE| 50mV DC 10mV |VSENSE| 50mV DC 1mV |VSENSE| 10mV DC (Note 8) l l VSENSE 500V, VSENSE+ = 30V l (Note 8) l VOSE Effective Differential Offset Voltage (Note 9) MIN TYP 5 MAX UNITS 1 1.5 3.5 % % % 10 V Voltage Measurement ADC Resolution (No Missing Codes) VFS(V) Full-Scale Voltage Conversion VLSB Quantization Step of 14-Bit Voltage ADC TUEV Voltage Total Unadjusted Error 14 (Note 6) Bits 70.8 V 4.32 mV l 1 1.3 % % 1.3 % 4 LSB 48 ms GainV Voltage Gain Accuracy l INLV Integral Nonlinearity l TCONV(V) Voltage Conversion Time l 1 Current Measurement ADC Resolution (No Missing Codes) (Note 8) VFS(I) Full-Scale Current Conversion VSENSE Sense Voltage Differential Input Range VSENSE+ - VSENSE- ILSB Quantization Step of 12-Bit Current ADC (Note 6) GainI Current Gain Accuracy l 12 Bits 64 mV 50 l 31.25 Offset INLI Integral Nonlinearity l TCONV(I) Current Conversion Time l V 1 1.3 % % 1 10 LSB 1 4 LSB 8 ms l VOS(I) mV Temperature Measurement ADC Resolution (No Missing Codes) (Note 8) l 11 Bits TFS Full-Scale Temperature TLSB Quantization Step of 11-Bit Temperature ADC TUET Temperature Total Unadjusted Error VSENSE+ 5V (Note 8) l 3 5 K K Temperature Conversion Time l 8 ms TCONV(T) (Note 6) 510 K 0.25 K Digital Inputs and Digital Outputs VITH(HV) Logic Input Threshold VSENSE+ 5V l VITH(LV) 3.6V < VSENSE+ < 5V VOL Low Level Output Voltage, ALCC, SDA I = 3mA, VSENSE+ 5V l 0.8 2.2 V 0.5 1.8 V 0.4 V IIN Input Leakage, ALCC, SCL, SDA VIN = 5V l 1 A CIN Input Capacitance, , ALCC, SCL, SDA (Note 8) l 10 pF tPCC Minimum Charge Complete (CC) Pulse Width 1 s 2944fa For more information www.linear.com/LTC2944 3 LTC2944 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. SYMBOL PARAMETER CONDITIONS MIN TYP 400 900 MAX UNITS I2C Timing Characteristics fSCL(MAX) Maximum SCL Clock Frequency l tBUF(MAX) Bus Free Time Between Stop/Start l 1.3 s tSU(STA(MIN)) Minimum Repeated Start Set-Up Time l 600 ns tHD(STA(MIN)) Minimum Hold Time (Repeated) Start Condition l 600 ns tSU(STO(MIN)) Minimum Set-Up Time for Stop Condition l 600 ns tSU(DAT(MIN)) Minimum Data Setup Time Input l 100 ns THD(DAT(MIN)) Minimum Data Hold Time Input l 50 ns THDDATO Data Hold Time Input Output TOF Data Output Fall Time (Notes 7, 8) Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. All currents into pins are positive, all voltages are referenced to GND unless otherwise specified. Note 3. ISUPPLY = ISENSE+ + ISENSE-. In most operating modes ISUPPLY is flowing in SENSE+ pin. Only during ADC conversions current is flowing in SENSE- pin as well. Typically, ISENSE- = VSENSE-/150k during ADC voltage conversion and ISENSE- = 20A during ADC current conversion. Note 4. The equivalent charge of an LSB in the accumulated charge register depends on the value of RSENSE and the setting of the internal prescaling factor M: qLSB = 0.340mAh * (50m/RSENSE) * (M/4096): kHz l 0.3 0.9 s l 20 + 0.1 * CB 300 ns See Choosing RSENSE and Choosing Coulomb Counter Prescaler M section for more information. 1mAh = 3.6C (Coulombs) Note 5. Deviation of qLSB from its nominal value. Note 6. The quantization step of the 14-bit ADC in voltage mode, 12-bit ADC in current mode and 11-bit ADC in temperature mode is not the same as the LSB of the respective combined 16-bit registers. See the Voltage, Current and Temperature Registers section for more information. Note 7. CB = Capacitance of one bus line in pF (10pF CB 400pF). Note 8. Guaranteed by design, not subject to test. Note 9. See "Effect of Differential Offset Voltage on Total Charge Error" section. Timing Diagram tOF SDA tSU(DAT) tHD(DAT0) tHD(DAT1) tBUF tSU(STA) tHD(STA) tSU(STO) 2944 TD01 SCL tHD(STA) START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 1. Definition of Timing on I2C Bus 2944fa 4 For more information www.linear.com/LTC2944 LTC2944 Typical Performance Characteristics Total Charge Error vs Differential Sense Voltage VSENSE+ = 3.6V TO 60V CHARGE ERROR (%) 1 0 1.00 1.00 0.75 0.75 0.50 VSENSE = 10mV 0.25 0 -0.25 -1 VSENSE = 50mV -0.50 -2 1 10 100 -1.00 0 10 20 30 40 - (V) 50 2944 G01 TA = 85C -25 25 50 0 TEMPERATURE (C) 75 100 2944 G03 Voltage Measurement ADC Total Unadjusted Error 1.0 TA = 85C 20 TA = -40C 70 0.5 TA = 25C 15 TUE (%) TA = 25C ISIPPLY (A) ISUPPLY (A) -1.00 -50 25 TA = -40C TA = -45C TA = 25C 0 TA = 85C 10 60 -0.5 5 50 0 10 20 40 30 50 VSENSE+ (V) 60 0 70 0 10 20 40 30 VSENSE+ (V) 50 2944 G04 60 -1.0 70 1.0 2 TA = -45C 0.5 GAIN ERROR (%) TA = -45C 0 -1 0 10 20 40 30 VSENSE- (V) 50 60 70 2944 G07 50 60 0 TA = 85C -1.0 70 VSENSE+ = 30V 0.5 TA = 25C 0 -0.5 -0.5 TA = 25C -2 40 30 VSENSE- (V) 20 Current Measurement ADC Integral Nonlinearity 1.0 TA = 85C 10 2944 G06 Current Measurement ADC Gain Error 3 1 0 2944 G05 Voltage Measurement ADC Integral Nonlinearity INL (VLSB) 70 60 30 80 -3 -0.50 Shutdown Supply Current vs Supply Voltage 110 90 VSENSE = 50mV -0.25 2944 G02 Supply Current vs Supply Voltage 40 0 VSENSE VSENSE (mV) 100 VSENSE = 10mV 0.25 -0.75 -0.75 -3 0.1 0.50 INL (ILSB) CHARGE ERROR (%) 2 Total Charge Error vs Temperature CHARGE ERROR (%) 3 Total Charge Error vs Supply Voltage 0 10 20 30 40 VSENSE- (V) 50 60 70 2944 G08 -1.0 -60 -40 -20 20 0 VSENSE (mV) 40 60 2943 G09 2944fa For more information www.linear.com/LTC2944 5 LTC2944 Typical Performance Characteristics Temperature Error vs Temperature -1 VSENSE+ = 3.6V VSENSE+ = 5.5V VSENSE+ = 20V VSENSE+ = 60V -2 -3 -50 -25 0 25 50 TEMPERATURE (C) 75 100 900 450 800 400 700 350 600 300 COUNTS 1 COUNTS TEMPERATURE ERROR (C) 2 0 Current Measurements Noise Voltage Measurements Noise 3 500 400 250 200 300 150 200 100 100 50 0 -2 -1 0 4.32mV/LSB 1 2 2944 G11 2943 G10 800 READINGS 0 -3 -2 -1 0 1 31.25V/LSB 2 3 2944 G12 Pin Functions SENSE+ (Pin 1): Positive Current Sense Input and Power Supply. Connect to load/charger side of the sense resistor. VSENSE+ operating range is 3.6V to 60V. SENSE+ is also an input to the ADC during current measurement. Bypass to GND with a 1F capacitor located as close to pin 1 and pin 2 as possible. GND (Pin 2, Pin 3, Pin 7): Device Ground. Connect directly to the negative battery terminal. SCL (Pin 4): Serial Bus Clock Input. SCL is internally pulled up with 50A (typ) above its logic input high threshold to about 2V (typ). SDA (Pin 5): Serial Bus Data Input and Output. SDA is internally pulled up with 50A (typ) above its logic input high threshold to about 2V (typ). ALCC (Pin 6): Alert Output or Charge Complete Input. Configured either as an SMBus alert output or charge complete input by control register bits B[2:1]. At power-up, the pin defaults to alert mode conforming to the SMBus alert response protocol. It behaves as an open-drain logic output that pulls to GND when any threshold register value is exceeded. When configured as a charge complete input, connect to the charge complete output from the battery charger circuit. A low level at CC sets the value of the accumulated charge (registers C, D) to FFFFh. SENSE- (Pin 8): Negative Current Sense Input. Connect SENSE- to the positive battery terminal side of the sense resistor. The voltage between SENSE- and SENSE+ must remain within 50mV in normal operation. SENSE- is also an input to the ADC during voltage and current measurement. Exposed Pad (Pin 9): Exposed pad may be left open or connected to device ground (GND). 2944fa 6 For more information www.linear.com/LTC2944 LTC2944 Block Diagram LTC2944 VSUPPLY 1 SENSE+ CC COULOMB COUNTER REF TEMPERATURE SENSOR ACCUMULATED CHARGE REGISTER CLK REFERENCE GENERATOR AL I2C/ SMBUS OSCILLATOR F = 10kHz ALCC SCL SDA REF+ 8 7 2 3 - SENSE MUX IN 6 4 5 CLK ADC DATA AND CONTROL REGISTERS REF- GND GND GND 2944 BD 2944fa For more information www.linear.com/LTC2944 7 LTC2944 Operation Overview Voltage, Current and Temperature ADC The LTC2944 is a battery gas gauge designed for use with multicell batteries with terminal voltages from 3.6V to 60V. It measures battery charge and discharge, battery voltage, current and its own temperature. The LTC2944 includes a 14-bit No Latency analog-todigital converter, with internal clock and voltage reference circuits. A precision analog coulomb counter integrates current through a sense resistor between the battery's positive terminal and the load or charger. Battery voltage, battery current and silicon temperature are measured with an internal ADC. Coulomb Counter Charge is the time integral of current. The LTC2944 measures charge by monitoring the voltage developed across a sense resistor. The differential voltage between SENSE+ and SENSE- is applied to an auto-zeroed differential analog integrator to infer charge. When the integrator output ramps to REFHI or REFLO levels, switches S1, S2, S3 and S4 toggle to reverse the ramp direction (Figure 2). By observing the condition of the switches and the ramp direction, polarity is determined. This approach also significantly lowers the impact on offset of the analog integrator as described in the Differential Offset Voltage section. A programmable prescaler effectively increases integration time by a factor M programmable from 1 to 4096. At each underflow or overflow of the prescaler, the accumulated charge register (ACR) value is incremented or decremented one count. The value of accumulated charge is read via the I2C interface. CHARGER The ADC can be used to monitor the battery voltage at SENSE- or the battery current flowing through the sense resistor or to convert the output of the on-chip temperature sensor. Conversion of voltage, current and temperature are triggered by programming the control register via the I2C interface. The LTC2944 includes a scan mode where voltage, current and temperature conversion measurements are executed every 10 seconds. At the end of each conversion the corresponding registers are updated and the converter goes to sleep to minimize quiescent current. The temperature sensor generates a voltage proportional to temperature with a slope of 2mV/K resulting in a voltage of 600mV at 27C. Power-Up Sequence When SENSE+ rises above a threshold of approximately 3.3V, the LTC2944 generates an internal power-on reset (POR) signal and sets all registers to their default state. In the default state, the coulomb counter is active while the voltage, current and temperature ADC is switched off. The accumulated charge register is set to mid-scale (7FFFh), all low threshold registers are set to 0000h and all high threshold registers are set to FFFFh. The alert mode is enabled and the coulomb counter prescaling factor M is set to 4096. LOAD 1 SENSE+ REFHI VCC S1 S2 RSENSE S3 8 SENSE- S4 - - + + REFLO BATTERY 2 CONTROL LOGIC M PRESCALER IBAT + + - ACR POLARITY DETECTION GND 2944 F02 Figure 2. Coulomb Counter Section of the LTC2944 2944fa 8 For more information www.linear.com/LTC2944 LTC2944 Applications Information Internal Registers The LTC2944 register map is shown in Table 1. The LTC2944 integrates current through a sense resistor, measures battery voltage, current and temperature and stores the results in internal 16-bit registers accessible via I2C. High and low limits can be programmed for each measured quantity. The LTC2944 continuously monitors these limits and sets a flag in the status register when a limit is exceeded. If the alert mode is enabled, the ALCC pin pulls low. Table 1. Register Map ADDRESS NAME REGISTER DESCRIPTION R/W DEFAULT 00h A Status R 01h B Control R/W See Table 2 3Ch 02h C Accumulated Charge MSB R/W 7Fh 03h D Accumulated Charge LSB R/W FFh 04h E Charge Threshold High MSB R/W FFh 05h F Charge Threshold High LSB R/W FFh 06h G Charge Threshold Low MSB R/W 00h 07h H Charge Threshold Low LSB R/W 00h 08h I Voltage MSB R 00h 09h J Voltage LSB R 00h 0Ah K Voltage Threshold High MSB R/W FFh 0Bh L Voltage Threshold High LSB R/W FFh 0Ch M Voltage Threshold Low MSB R/W 00h 0Dh N Voltage Threshold Low LSB R/W 00h 0Eh O Current MSB R 00h 0Fh P Current LSB R 00h 10h Q Current Threshold High MSB R/W FFh 11h R Current Threshold High LSB R/W FFh 12h S Current Threshold Low MSB R/W 00h 13h T Current Threshold Low LSB R/W 00h 14h U Temperature MSB R 00h 15h V Temperature LSB R 00h 16h W Temperature Threshold High R/W FFh 17h X Temperature Threshold Low R/W 00h R = Read, W = Write The status of the charge, voltage, current and temperature alerts is reported in the status register shown in Table 2. Table 2. Status Register (A) BIT NAME A[7] Reserved A[6] Current Alert A[5] Accumulated Charge Overflow/ Underflow A[4] Temperature Alert Indicates one of the temperature limits was exceeded 0 A[3] Charge Alert High Indicates that the ACR value exceeded the charge threshold high limit 0 A[2] Charge Alert Low Indicates that the ACR value exceeded the charge threshold low limit 0 A[1] Voltage Alert Indicates one of the voltage limits was exceeded 0 Undervoltage Lockout Alert Indicates recovery from undervoltage. If set to 1, a UVLO has occurred and the contents of the registers are uncertain 1 A[0] OPERATION Indicates one of the current limits was exceeded Indicates that the value of the ACR hit either top or bottom DEFAULT 0 0 After each voltage, current or temperature conversion, the conversion result is compared to the respective threshold registers. If a value in the threshold registers is exceeded, the corresponding bit A[6], A[4] or A[1] is set. The accumulated charge register (ACR) is compared to the charge thresholds every time the analog integrator increments or decrements the prescaler. If the ACR value exceeds the threshold register values, the corresponding bit A[3] or A[2] are set. Bit A[5] is set if the accumulated charge registers (ACR) overflows or underflows. At each overflow or underflow, the ACR rolls over and resumes integration. The undervoltage lockout (UVLO) bit of the status register A[0] is set if, during operation, the voltage on the SENSE+ pin drops below 3.5V without reaching the POR level. The analog parts of the coulomb counter are switched off while the digital register values are retained. After recovery of the supply voltage, the coulomb counter resumes integrating 2944fa For more information www.linear.com/LTC2944 9 LTC2944 Applications Information with the stored value in the accumulated charge registers but it has missed any charge flowing while SENSE+ < 3.5V. BIT NAME OPERATION B[2:1] ALCC Configure Configures the ALCC pin. All status register bits are cleared after being read by the host, but might be reasserted after the next temperature, voltage or current conversion or charge integration, if the corresponding alert condition is still fulfilled. [01] Charge Complete Mode. Pin becomes logic input and accepts charge complete inverted signal (e.g., from a charger) to set accumulated charge register (C,D) to FFFFh. The operation of the LTC2944 is controlled by programming the control register. Table 3 shows the organization of the 8-bit control register B[7:0]. NAME OPERATION B[7:6] ADC Mode [11] Automatic Mode: continuously performing voltage, current and temperature conversions [00] Shutdown [00] Sleep Sets coulomb counter prescaling factor M between 1 and 4096. Default is 4096. Maximum value is limited to 4096 B[5:3] M 000 1 001 4 010 16 011 64 100 256 101 1024 110 4096 111 4096 Shut down analog section to reduce ISUPPLY. [0] Power Down B[0] Setting B[0] to 1 shuts down the analog parts of the LTC2944, reducing the current consumption to less than 15A (typical). The circuitry managing I2C communication remains operating and the values in the registers are retained. Note that any charge flowing while B[0] is 1 is not measured and any charge information below 1LSB of the accumulated charge register is lost. [01] Manual Mode: performing single conversions of voltage, current and temperature then sleep Prescaler M [11] Not allowed. DEFAULT [10] Scan Mode: performing voltage, current and temperature conversion every 10s B[5:3] [00] ALCC pin disabled. B[0] BIT [10] [10] Alert Mode. Alert functionality enabled. Pin becomes logic output. Control Register (B) Table 3. Control Register B DEFAULT [111] Alert/Charge Complete Configuration B[2:1] The ALCC pin is a dual function pin configured by the control register. By setting bits B[2:1] to [10] (default), the ALCC pin is configured as an alert pin following the SMBus protocol. In this configuration, the ALCC is pulled low if one of the four measured quantities (charge, voltage, current, temperature) exceeds its high or low threshold or if the value of the accumulated charge register overflows or underflows. An alert response procedure started by the master resets the alert at the ALCC pin. If the configuration of the ALCC pin is changed while it is pulled low due to an alert condition, the part will continue to pull ALCC low until a successful alert response procedure (ARA) has been issued by the master. For further information see the Alert Response Protocol section. Setting the control bits B[2:1] to [01] configures the ALCC pin as a digital input. In this mode, a low input on the ALCC pin indicates to the LTC2944 that the battery is full and the accumulated charge register is set to its maximum, value FFFFh. 2944fa 10 For more information www.linear.com/LTC2944 LTC2944 Applications Information If neither the alert nor the charge complete functionality is desired, bits B[2:1] should be set to [00]. The ALCC pin is then disabled and should be tied to the supply of the I2C bus with a 10k resistor. Avoid setting B[2:1] to [11] as it enables the alert and the charge complete modes simultaneously. RSENSE Choosing RSENSE To achieve the specified precision of the coulomb counter, the differential voltage between SENSE+ and SENSE- must stay within 50mV. With input signals up to 300mV the LTC2944 will remain functional but the precision of the coulomb counter is not guaranteed. The required value of the external sense resistor, RSENSE, is determined by the maximum input range of VSENSE and the maximum current of the application: RSENSE 50mV IMAX 50m M * RSENSE 4096 In an example application where the maximum current is IMAX = 100mA, calculating RSENSE = 50mV/IMAX would lead to a sense resistor of 500m. This gives a qLSB of 34Ah and the accumulated charge register can represent a maximum battery capacity of QBAT = 34Ah*65535 = 2228mAh. If the battery capacity is larger, RSENSE must be lowered. For example, RSENSE should be reduced to 150m if a battery with a capacity of 7200mAh is used. In these applications with a small battery but a high maximum current, qLSB can get quite large with respect to the battery capacity. For example, if the battery capacity is 100mAh and the maximum current is 1A, the standard equation leads to choosing a sense resistor value of 50m, resulting in: The battery capacity then corresponds to only 294 qLSB and less than 0.5% of the accumulated charge register is utilized. 50m RSENSE when the prescaler is set to its default value of M = 4096. Note that 1mAh = 3.6C (coulomb). Choosing RSENSE = 50mV/IMAX is not sufficient in applications where the battery capacity (QBAT) is very large compared to the maximum current (IMAX): QBAT >IMAX * 22Hours If the battery capacity (QBAT) is small compared to the maximum current (IMAX) the prescaler value M should be changed from its default value (4096). qLSB = 0.340mAh = 1224mC or qLSB = 0.340mAh * 0.340mAh * 216 * 50m QBAT Choosing Coulomb Prescaler M B[5:3] The choice of the external sense resistor value influences the gain of the coulomb counter. A larger sense resistor gives a larger differential voltage between SENSE+ and SENSE- for the same current resulting in more precise coulomb counting. The amount of charge represented by the least significant bit (qLSB) of the accumulated charge (registers C, D) is equal to: qLSB = 0.340mAh * For such low current applications with a large battery, choosing RSENSE according to RSENSE = 50mV/IMAX can lead to a qLSB smaller than QBAT/216 and the 16-bit accumulated charge register may underflow before the battery is exhausted or overflow during charge. Choose, in this case, a maximum RSENSE of: To preserve digital resolution in this case, the LTC2944 includes a programmable prescaler. Lowering the prescaler factor M reduces qLSB to better match the accumulated charge register to the capacity of the battery. The prescaling factor M can be chosen between 1 and its default value of 4096. The charge LSB then becomes: qLSB = 0.34mAh * 50m M * RSENSE 4096 2944fa For more information www.linear.com/LTC2944 11 LTC2944 Applications Information To use as much of the range of the accumulated charge register as possible the prescaler factor M should be chosen for a given battery capacity QBAT and a sense resistor RSENSE as: M 4096 * RSENSE 216 * 0.340mAh 50m QBAT * M can be set to 1, 4, 16, ... 4096 by programming B[5:3] of the control register as M = 22 * (4 * B[5] + 2 * B[4] + B[3]). The default value is 4096. In the above example of a 100mAh battery and an RSENSE of 50m, the prescaler should be programmed to M = 64. The qLSB is then 5.313Ah and the battery capacity corresponds to roughly 18821 qLSBs. Figure 3 illustrates the best choice for prescaler value M and the sense resistor as function of the ratio between battery capacity (QBAT) and maximum current (IMAX). It can be seen, that for high current applications with low battery capacity the prescaler value should be reduced, whereas in low current applications with a large battery the sense resistor should be reduced with respect to its default value of 50mV/IMAX. ADC Mode B[7:6] The LTC2944 features an ADC which measures either voltage on SENSE- (battery voltage), voltage difference between SENSE+ and SENSE- (battery current) or temperature via an internal temperature sensor. The reference voltage and clock for the ADC are generated internally. The ADC has four different modes of operation as shown in Table 3. These modes are controlled by bits B[7:6] of RSENSE M=1 M=4 0.005h M = 16 0.02h A single conversion of the three measured quantities is initiated by setting the bit B[7:6] to [01]. After three conversions (voltage, current and temperature), the ADC resets B[7:6] to [00] and goes back to sleep. The LTC2944 is set to scan mode by setting B[7:6] to [10]. In scan mode the ADC converts voltage, current, then temperature, then sleeps for approximately ten seconds. It then reawakens automatically and repeats the three conversions. The chip remains in scan mode until reprogrammed by the host. Programming B[7:6] to [11] sets the chip into automatic mode where the ADC continuously performs voltage, current and temperature conversions. The chip stays in automatic mode until reprogrammed by the host. Programming B[7:6] to [00] puts the ADC to sleep. If control bits B[7:6] change within a conversion, the ADC will complete the running cycle of conversions before entering the newly selected mode. A conversion of voltage requires 33ms (typical), and current and temperature conversions are completed in 4.5ms (typical). At the end of each conversion, the corresponding registers are updated. If the converted quantity exceeds the values programmed in the threshold registers, a flag is set in the status register and the ALCC pin is pulled low (if alert mode is enabled). During ADC conversions additional currents are sunk from SENSE+ and SENSE-, refer to the Electrical Characteristics table for details. 50mV IMAX M = 64 0.08h the control register. At power-up, bits B[7:6] are set to [00] and the ADC is in sleep mode. RSENSE M = 256 0.34h 1.4h M = 1024 5.5h 0.34mAh * 216 * 50m QBAT M = 4096 22h QBAT/IMAX 2944 F03 Figure 3. Choice of Sense Resistor and Prescaler as Function of Battery Capacity and Maximum Current 2944fa 12 For more information www.linear.com/LTC2944 LTC2944 Applications Information Alert Thresholds Registers (E,F,G,H,K,L,M,N,Q,R,S, T,W,X) For each of the measured quantities (battery charge, voltage, current and temperature) the LTC2944 features high and low threshold registers. At power-up, the high thresholds are set to FFFFh while the low thresholds are set to 0000h, with the effect of disabling them. All thresholds can be programmed to a desired value via I2C. As soon as a measured quantity exceeds the high threshold or falls below the low threshold, the LTC2944 sets the corresponding flag in the status register and pulls the ALCC pin low if alert mode is enabled via bits B[2:1]. Accumulated Charge Register (C,D) The coulomb counting circuitry in the LTC2944 integrates current through the sense resistor. The result of this charge integration is stored in the 16-bit accumulated charge register (registers C, D). As the LTC2944 does not know the actual battery status at power-up, the accumulated charge register (ACR) is set to mid-scale (7FFFh). If the host knows the status of the battery, the accumulated charge (C[7:0]D[7:0]) can be either programmed to the correct value via I2C or it can be set after charging to FFFFh (full) by pulling the ALCC pin low if charge complete mode is enabled via bits B[2:1]. Note that before writing to the accumulated charge registers, the analog section should be temporarily shut down by setting B[0] to 1. In order to avoid a change in the accumulated charge registers between reading MSBs C[7:0] and LSBs D[7:0], it is recommended to read them sequentially as shown in Figure 11. Voltage Registers (I,J), and Voltage Threshold Registers (K,L,M,N) The result of the 16-bit ADC conversion of the voltage at SENSE- is stored in the voltage registers (I, J). From the result of the 16-bit voltage registers I[7:0]J[7:0] the measured voltage can be calculated as: VSENSE - = 70.8V * Example 1: a register value I[7:0] = B0h and J[7:0] = 1Ch corresponds to a voltage on SENSE- of: VSENSE- = 70.8V * B01Ch 45084DEC = 70.8V * 48.705V FFFFh 65535 Example 2: To set a low level threshold for the battery voltage of 31.2V, register M should be programmed to 70h and register N to D0h. Current Registers (O,P), and Current Threshold Registers (Q,R,S,T) The result of the current conversion is stored in the current registers (O,P). As the ADC resolution is 12 bits in current mode, the lowest four bits of the combined current registers (O, P) are always zero. The ADC measures battery current by converting the voltage, VSENSE, across the sense resistor RSENSE. Depending whether the battery is being charged or discharged the measured voltage drop on RSENSE is positive or negative. The result is stored in registers O and P in excess -32767 representation. O[7:0] = FFh, P[7:0] = F0h corresponds to the full scale positive voltage 64mV. While O[7:0] = 00h, P[7:0] = 00h corresponds to the full scale negative voltage -64mV. The battery current can be obtained from the two byte register O[7:0]P[7:0] and the value of the chosen sense resistor RSENSE: IBAT = VSENSE 64mV RESULTh - 7FFF h = * = R SENSE R SENSE 7FFF h 64mV RESULTDEC - 32767 * R SENSE 32767 Positive current is measured when the battery is charging and negative current is measured when the battery is discharging. RESULTh RESULTDEC = 70.8V * FFFFh 65535 2944fa For more information www.linear.com/LTC2944 13 LTC2944 Applications Information Example 1: a register value of O[7:0] = A8h P[7:0] = 40h together with a sense resistor RSENSE = 50m corresponds to a battery current: IBAT = T = 510K * RESULTDEC RESULTh = 510K * FFFFh 65535 Example: a register value of U[7:0] = 96h V[7:0] = 96h corresponds to ~300K or ~27C 64mV A840 h - 7FFF h * = 50m 7FFF h 64mV 43072 - 32767 * 402.5mA 32767 50m The positive current result indicates that the battery is being charged. The values in the threshold register for the current mode Q,R,S,T are also expressed in excess -32767 representation in the same manner as the current conversion result. The alert after a current measurement is set if the result is higher than the value stored in the high threshold registers Q,R or lower than the value stored in the low value registers S,T. Example 2: In an application, the user wants to get an alert if the absolute current through the sense resistor, RSENSE, of 50m exceeds 1A. This is achieved by setting the upper threshold IHIGH in register [Q,R] to 1A and the lower threshold ILOW in register [S,T] to -1A. The formula for IBAT leads to: 1A * 50m IHIGH (DEC) = * 32767 + 32767= 58366 64mV -1A * 50m * 32767 + 32767= 7168 ILOW (DEC) = 64mV Leading the user to set Q[7:0] = E3h, R[7:0] = FEh for the high threshold and S[7:0] = 1Bh and T[7:0] = FFh for the low threshold. Temperature Registers (U,V) and Temperature Threshold Registers (W,X) As the ADC resolution is 11 bits in temperature mode, the lowest five bits of the combined temperature registers (U, V) are always zero. The actual temperature can be obtained from the two byte register U[7:0]V[7:0] by: A high temperature limit of 60C is programmed by setting register W to A7h. Note that the temperature threshold register is single byte register and only the eight MSBs of the 11 bits temperature result are checked. Effect of Differential Offset Voltage on Total Charge Error In battery gas gauges, an important parameter is the differential offset (VOS) of the circuitry monitoring the battery charge. Many coulomb counter devices perform an analog to digital conversion of VSENSE, where VSENSE is the voltage drop across the sense resistor, and accumulate the conversion results to infer charge. In such an architecture, the differential offset VOS causes relative charge error of VOS/VSENSE. For small VSENSE values VOS can be the main source of error. The LTC2944 performs the tracking of the charge with an analog integrator. This approach allows to continuously monitor the battery charge and significantly lowers the error due to differential offset. The relative charge error due to offset (CEOV) can be expressed by: V 2 CE OV = OS VSENSE As example, at a 1mV input signal a differential voltage offset VOS = 20V results in a 2% error using digital integration, whereas the error is only 0.04% (a factor of 50 times smaller!) using the analog integration approach of LTC2944. The reduction of the impact of the offset in LTC2944 can be explained by its integration scheme depicted in Figure 2. While positive offset accelerates the up ramping of the integrator output from REFLO to REFHI, it slows the down ramping from REFHI to REFLO thus the effect is largely canceled as depicted in Figure 4. 2944fa 14 For more information www.linear.com/LTC2944 LTC2944 Applications Information Each device on the I2C/SMbus is recognized by a unique address stored in that device and can operate as either a transmitter or receiver, depending on the function of the device. In addition to transmitters and receivers, devices can also be classified as masters or slaves when performing data transfers. A master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. At the same time any device addressed is considered a slave. The LTC2944 always acts as a slave. INTEGRATOR OUTPUT REFHI WITHOUT OFFSET WITH OFFSET REFLO FASTER UP RAMPING SLOWER DOWN RAMPING TIME 2944 F04 Figure 4. Offset Cancellation For input signals with an absolute value smaller than the offset of the internal op amp the LTC2944 stops integrating and does not integrate its own offset. Figure 5 shows an overview of the data transmission on the I2C bus. Start and Stop Conditions The LTC2944 is a slave only device. The serial clock line (SCL) is input only while the serial data line (SDA) is bidirectional. The device supports I2C standard and fast mode. For more details refer to the I2C Protocol section. When the bus is idle, both SCL and SDA must be high. A bus master signals the beginning of a transmission with a START condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission. When the bus is in use, it stays busy if a repeated START (Sr) is generated instead of a STOP condition. The repeated START (Sr) conditions are functionally identical to the START (S). I2C Protocol Write Protocol The LTC2944 uses an I2C/SMBus-compatible 2-wire interface supporting multiple devices on a single bus. Connected devices can only pull the bus lines low and must never drive the bus high. The bus wires are externally connected to a positive supply voltage via current sources or pull-up resistors. When the bus is idle, all bus lines are high. Data on the I2C bus can be transferred at rates of up to 100kbit/s in standard mode and up to 400kbit/s in fast mode. The master begins a write operation with a START condition followed by the seven bit slave address 1100100 and the R/W bit set to zero, as shown in Figure 6. The LTC2944 acknowledges this by pulling SDA low and the master sends a command byte which indicates which internal register the master is to write. The LTC2944 acknowledges and latches the command byte into its internal register address pointer. The master delivers the data byte, the LTC2944 acknowledges once more and latches the data I2C/SMBus Interface The LTC2944 communicates with a bus master using a 2-wire interface compatible with I2C and SMBus. The 7-bit hard coded I2C address of the LTC2944 is 1100100. SDA a6 - a0 b7 - b0 SCL 1-7 8 9 ADDRESS R/W ACK 1-7 b7 - b0 8 9 1-7 8 9 S START CONDITION P DATA ACK DATA ACK STOP CONDITION 2944 F05 Figure 5. Data Transfer Over I2C or SMBus 2944fa For more information www.linear.com/LTC2944 15 LTC2944 Applications Information into the desired register. The transmission is ended when the master sends a STOP condition. If the master continues by sending a second data byte instead of a stop, the LTC2944 acknowledges again, increments its address pointer and latches the second data byte in the following register, as shown in Figure 7. S ADDRESS W A REGISTER A DATA A 1100100 0 0 01h 0 FCh 0 command byte into its internal register address pointer. The master then sends a repeated START condition followed by the same seven bit address with the R/W bit now set to one. The LTC2944 acknowledges and sends the contents of the requested register. The transmission is ended when the master sends a STOP condition. If the master acknowledges the transmitted data byte, the LTC2944 increments its address pointer and sends the contents of the following register as depicted in Figure 9. P 2944 F06 FROM MASTER TO SLAVE Alert Response Protocol A: ACKNOWLEDGE (LOW) A: NOT ACKNOWLEDGE (HIGH) FROM SLAVE TO MASTER In a system where several slaves share a common interrupt line, the master can use the alert response address (ARA) to determine which device initiated the interrupt (Figure 10). S: START CONDITION P: STOP CONDITION R: READ BIT (HIGH) W: WRITE BIT (LOW) Figure 6. Writing FCh to the LTC2944 Control Register (B) S ADDRESS W A REGISTER A DATA A DATA A 1100100 0 0 02h 0 F0h 0 01h 0 The master initiates the ARA procedure with a START condition and the special 7-bit ARA bus address (0001100) followed by the read bit (R) = 1. If the LTC2944 is asserting the ALCC pin in alert mode, it acknowledges and responds by sending its 7-bit bus address (1100100) and a 0. While it is sending its address, it monitors the SDA pin to see if another device is sending an address at the same time using standard I2C bus arbitration. If the LTC2944 is sending a 1 and reads a 0 on the SDA pin on the rising edge of SCL, it assumes another device with a lower address is sending and the LTC2944 immediately aborts its transfer and waits for the next ARA cycle to try again. If transfer is successfully completed, the LTC2944 will stop pulling down the ALCC pin and will not respond to further ARA requests until a new Alert event occurs. P 2944 F07 Figure 7. Writing F001h to the LTC2944 Accumulated Charge Register (C, D) Read Protocol The master begins a read operation with a START condition followed by the seven bit slave address 1100100 and the R/W bit set to zero, as shown in Figure 8. The LTC2944 acknowledges and the master sends a command byte which indicates which internal register the master is to read. The LTC2944 acknowledges and then latches the S ADDRESS W A REGISTER A 1100100 0 0 00h 0 Sr ADDRESS R A DATA A 1100100 1 0 01h 1 P 2944 F08 Figure 8. Reading the LTC2944 Status Register (A) S ADDRESS W A REGISTER A 1100100 0 0 08h 0 Sr ADDRESS R A DATA A DATA A 1100100 1 0 F1h 0 24h 1 P 2944 F09 Figure 9. Reading the LTC2944 Voltage Register (I, J) 2944fa 16 For more information www.linear.com/LTC2944 LTC2944 Applications Information S ALERT RESPONSE ADDRESS R A DEVICE ADDRESS A 0001100 1 0 11001000 1 P 2944 F10 Figure 10. LTC2944 Serial Bus SDA Alert Response Protocol S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 1100100 0 0 1100100 1 0 80h 0 01h 1 0 02h 2944 F11 Figure 11. Reading the LTC2944 Accumulated Charge Registers (C, D) S ADDRESS W A REGISTER A DATA P 1100100 0 0 01h 0 4C 40ms S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 1100100 0 0 08h 0 1100100 1 0 F1h 0 80h 1 2944 F12 Figure 12. ADC Single Conversion Sequence and Reading of Voltage Registers (I,J) PC Board Layout Suggestions Keep all traces as short as possible to minimize noise and inaccuracy. Use a 4-wire Kelvin sense connection for the sense resistor, locating the LTC2944 close to the resistor with short sense-traces to the SENSE+ and SENSE- pins. Use wider traces from the resistor to the battery, load and/or charger. Put the bypass capacitor close to SENSE+ and GND. TO CHARGER/LOAD TO BATTERY RSENSE Preventing Violation of Absolute Maximum Ratings The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the supply bypass capacitor of LTC2944. However, these capacitors can cause problems if the LTC2944 is plugged into a live supply close to its maximum voltage of 65V. The low loss ceramic capacitor, combined with stray inductance in series with the power source, forms an under damped tank circuit, and the voltage at the SENSE- pin of the LTC2944 can ring several tens of volts, possibly exceeding the LTC2944 rating and damaging the part. This can be prevented by adding a transient voltage suppression diode to the SENSE- pin as shown in Figure 14. Also pulling the digital communication pins SCL, SDA and ALCC below their minimum absolute maximum voltage of -0.3V--for example, due to differences between the local GND and the GND of the connected microprocessor--increases the supply current of the LTC2944. At supply voltages above 50V, the power dissipated due to the increased supply current might damage the part, which can be prevented by adding Schottky diodes as shown in Figure 14. 1A LOAD CHARGER 3.3V 1F 2k 2k LTC2944 2k VDD ALCC P SDA SCL SENSE+ SENSE- GND CMHSHS-2L RSENSE 50m + MULTICELL Li-ION SMAJ58A 2944 F14 1 C 2 3 4 8 LTC2944 Figure 14. Preventing Violation of Absolute Maximum Ratings 7 6 5 2944 F13 Figure 13. Kelvin Connection on Sense Resistor 2944fa For more information www.linear.com/LTC2944 17 LTC2944 Package Description Please refer to http://www.linear.com/product/LTC2944#packaging for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm x 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 0.05 3.5 0.05 1.65 0.05 2.10 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.00 0.10 (4 SIDES) R = 0.125 TYP 5 0.40 0.10 8 1.65 0.10 (2 SIDES) 0.75 0.05 4 0.25 0.05 1 (DD8) DFN 0509 REV C 0.50 BSC 2.38 0.10 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 2944fa 18 For more information www.linear.com/LTC2944 LTC2944 Revision History REV DATE DESCRIPTION A 10/17 Updated equation for obtaining temperature (T) PAGE NUMBER 15 2944fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LTC2944 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC2944 Typical Application Battery Charger with Gas Gauge 33V TO 60V IN 5m LT3845A ITH 1.15M 47nF CC IID IGATE CSP OFB 47k LTC4000 ENC CHRG FLT 47k BFB NTC IBMON 10nF 0.5A LOAD TMR CL 0.1F 22.1k 1.13M VDD R1 2k R2 2k P R3 2k C1 1F LTC2944 ALCC SDA SCL 10k GND BIAS CX 24.9k 3.3V FBG IIMON 10nF Si7135DP BAT VM 3.0V 5m CSN BGATE 1F 1.10M 100k VOUT 30.4V, 15A 100F 14.7k RST CLN IN Si7135DP OUT VC SHDN SENSE+ SENSE- RSENSE 100m + 30V Li-ION BATTERY GND 1F 2944 TA02 Related Parts PART NUMBER DESCRIPTION COMMENTS Battery Gas Gauges LTC2943 I2C Battery Gas Gauge with Voltage, Current and Temperature ADC 3.6V to 20V Operation, 14-Bit -ADC, Pin Compatible with LTC2944, LTC2943-1, 8-Lead (3mm x 3mm) DFN Package LTC2943-1 1A Multicell Battery Gas Gauge with Temperature, Voltage and Current Measurement 3.6V to 20V Operation, Internal Sense Resistor, 14-Bit ADC, Pin Compatible with LTC2944 and LTC2943, 8-Lead (3mm x 3mm) DFN Package LTC2941 I2C Battery Gas Gauge 2.7V to 5.5V Operation, 6-Lead (2mm x 3mm) DFN Package LTC2941-1 1A I2C Battery Gas Gauge with Internal Sense Resistor 2.7V to 5.5V Operation, 6-Lead (2mm x 3mm) DFN Package LTC2942 I2C Battery Gas Gauge with Temperature, Voltage Measurement 2.7V to 5.5V Operation, 14-Bit -ADC, 6-Lead (2mm x 3mm) DFN Package LTC2942-1 1A I2C Battery Gas Gauge with Internal Sense Resistor and Temperature/Voltage Measurement 2.7V to 5.5V Operation, 14-Bit -ADC, 6-Lead (2mm x 3mm) DFN Package LTC4150 Coulomb Counter/Battery Gas Gauge 2.7V to 8.5V Operation, 10-Pin MSOP Package LTC4000 High Voltage High Current Controller for Battery Charging and Power Management 3V to 60V Operation, 28-Lead (4mm x 5mm) QFN or SSOP Packages LTC4009 High Efficiency, Multi-Chemistry Battery Charger 6V to 28V Operation, 20-Lead (4mm x 4mm) QFN Package LTC4012 High Efficiency, Multi-Chemistry Battery Charger with PowerPathTM Control 6V to 28V Operation, 20-Lead (4mm x 4mm) QFN Package LT(R)3652HV Power Tracking 2A Battery Charger Input Supply Voltage Regulation Loop for Peak Power Tracking, 5V to 34V Operation, 1MHz, 2A Charge Current, 3mm x 3mm DFN-12 and MSOP-12 Packages Battery Chargers 2944fa 20 LT 1017 REV A * PRINTED IN USA www.linear.com/LTC2944 For more information www.linear.com/LTC2944 LINEAR TECHNOLOGY CORPORATION 2017