R5F10FMEAFB#V0 - RENESAS TECHNOLOGY

All information contained in these materials, including products and product specifications,

represents information on the product at the time of publication and is subject to change by

Renesas Electronics Corp. without notice. Please review the latest information published by

Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.

website (http: //www.renesas.co m).

RL78

G1E

User’s Manual: Hardw are

Rev.2.00 Ma

2014

16-Bit Microcontrollers with Smart Analog IC

www.renesas.com

Notice

1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of

semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software,

and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you

or third parties arising from the use of these circuits, software, or information.

2. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics

does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages

incurred by you resulting from errors in or omissions from the information included herein.

3. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of

thir d parties by or ari s ing from t he use of Renesas Electro nics products or technical information described in this document. No

license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of

Renesas Electronics or others.

4. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.

Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration,

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Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to

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6. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics,

especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation

characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or

damages arising out of the use of Renesas Electronics products beyond such specified ranges.

7. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have

specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further,

Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to

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malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Becaus e the evaluation

of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by

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(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-

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(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.

(2012.4)

NOTES FOR CMOS DEVICES

(1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a

reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL

(MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise

from entering the device when the input level is fixed, and also in the transition period when the input level

passes through the area between VIL (MAX) and VIH (MIN).

(2) HANDLING OF UNUSED INPUT PINS: Unconnected CMOS device inputs can be cause of malfunction. If

an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc.,

causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of

CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be

connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling

related to unused pins must be judged separately for each device and according to related specifications

governing the device.

(3) PRECAUTION AGAINST ESD: A strong electric field, when exposed to a MOS device, can cause

destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop

generation of static electricity as much as possible, and quickly dissipate it when it has occurred.

Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended

to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and

transported in an anti-static container, static shielding bag or conductive material. All test and measurement

tools including work benches and floors should be grounded. The operator should be grounded using a wrist

strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken

for PW boards with mounted semiconductor devices.

(4) STATUS BEFORE INITIALIZATION: Power-on does not necessarily define the initial status of a MOS

device. Immediately after the power source is turned ON, devices with reset functions have not yet been

initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A

device is not initialized until the reset signal is received. A reset operation must be executed immediately

after power-on for devices with reset functions.

(5) POWER ON/OFF SEQUENCE: In the case of a device that uses different power supplies for the internal

operation and external interface, as a rule, switch on the external power supply after switching on the internal

power supply. W hen switching the power supply off, as a rule, switch off the external power supply and then

the internal power supply. Use of the reverse power on/off sequences may result in the application of an

overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements

due to the passage of an abnormal current. The correct power on/off sequence must be judged separately

for each device and according to related specifications governing the device.

(6) INPUT OF SIGNAL DURING POWER OFF STATE : Do not input signals or an I/O pull-up power supply

while the device is not powered. The current injection that results from input of such a signal or I/O pull-up

power supply may cause malfunction and the abnormal current that passes in the device at this time may

cause degradation of internal elements. Input of signals during the power off state must be judged

separately for each device and according to related specifications governing the device.

How to Use This Manual

Readers This manual is intended for user engineers who wish to understand the functions of the

RL78/G1E and design and develop application systems and programs for these devices.

The target products are as follows.

• 64-pin: R5F10FLx (x = C, D, E)

• 80-pin: R5F10FMx (x = C, D, E)

Purpose This manual is intended to give users an understanding of the functions described in the

Organization below.

Organization The RL78/G1E manual is separated into three parts: this manual, RL78/G1A user’s manual,

and the RL78 family software user’s manual.

RL78/G1E

User’s Manual

(This Manual)

RL78/G1A

Hardware

User’s Manual

RL78 family

Software

User’s Manual

• Pin functions

• Internal block functions

• On-chip peripheral

functions

• Electrical specifications

• Pin functions

• Internal block functions

• Interrupts

• Other on-chip peripheral

functions

• Electrical specifications

• CPU functions

• Instruction set

• Explanation of each

instruction

How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical

engineer ing, log ic cir cui ts, and microc ontro llers.

• To gain a general understanding of functions:

→ Read this manual in the order of the CONTENTS. The mark “<R>” shows major

revised points. The revised points can be easily searched by copying an “<R>” in the

PDF file and specifying it in the “Find what:” field.

• How to interpret the register format:

→ For a bit number enclosed in angle brackets, the bit name is defined as a reserved

word in the assembler, and is defined as an sfr variable using the #pragma sfr

directive in the compiler.

• To know details of the microcontroller block:

→ Refer to the separate docume nt RL78 /G1 A Hardw a re Us er ’s M anua l ( R01U H0305E).

• To know details of the RL78 microcontroller instructions:

→ Refer to the separate document RL78 family User’s Manual Software

(R01US0015E).

Conventions Data significance: Higher digits on the left and lower digits on the right

Active low representations: ××× (overscore over pin and signal name)

Note: Footnote for item marked with Note in the text

Caution: Information requiring particular attention

Remark: Supplementary information

Numerical representations: Binary

...

×××× or ××××B

Decimal

...

××××

Hexadecimal

...

××××H

Related Documents The related documents indicated in this publication may include preliminary versions.

However, preliminary versions are not marked as such.

Documents Related to Devices

Document Name Document No.

RL78/G1E User’s Manual Hardware This manual

RL78/G1A User’s Manual Hardware R01UH0305E

RL78 family User’s Manual S oft ware R01US0015E

Documents Related to Flash Memory Programming

Document Name Document No.

PG-FP5 Flash Memory Programmer User’s Manual R02UT0008E

Other Documents

Document Name Docum ent No.

Renesas MPUs & MCUs RL78 Family R01CS0003E

Semiconducto r P ackage Mount Manual Note

Quality Grades on NEC Semiconduc tor Devices C11531E

Guide to Prevent Damage for Semic onductor Devices by Electrost atic Disc harge (E SD) C11892E

NEC Semiconductor Device Reliability/Quality Control System R51ZZ0001E

Note See the “Semiconductor Device Mount Manual” website

(http://www.renesas.com/products/package/manual/index.jsp).

Caution The related documents listed above are subject to change without notice. Be sure to use the latest

version of each document when designing.

All trademarks and registered trademarks are the property of their respective owners.

EEPROM is a trademark of Renesas Electronics Corporation.

SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the

United States and Japan.

Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, Inc.

Index-1

CONTENTS

CHAPTER 1 OUTLINE............................................................................................................................... 1

1. 1 Features .......................................................................................................................................... 1

1. 1. 1 Microcontroller block ........................................................................................................................ 1

1. 1. 2 Analog block ..................................................................................................................................... 3

1. 2 List of Part Numbers ..................................................................................................................... 4

1. 3 Pin Configuration (Top View) ....................................................................................................... 5

1. 3. 1 64-pin products ................................................................................................................................. 5

1. 3. 2 80-pin products ................................................................................................................................. 6

1. 4 Pin Identification ............................................................................................................................ 7

1. 5 Block Diagram ............................................................................................................................... 9

1. 5. 1 64-pin products ................................................................................................................................. 9

1. 5. 2 80-pin products ............................................................................................................................... 12

1. 6 Outline of Functions.................................................................................................................... 15

CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 18

2. 1 Pin Functions in Microcontroller Block .................................................................................... 18

2. 1. 1 Port functions ................................................................................................................................. 22

2. 1. 1. 1 64-pin products ...................................................................................................................... 23

2. 1. 1. 2 80-pin products ...................................................................................................................... 25

2. 1. 2 Functions other than port functions ................................................................................................ 27

2. 1. 2. 1 Functions available for each product ...................................................................................... 27

2. 1. 2. 2 Description of each function ................................................................................................... 30

2. 2 Pin Functions in Analog Block .................................................................................................. 32

2. 2. 1 64-pin products ............................................................................................................................... 32

2. 2. 2 80-pin products ............................................................................................................................... 33

2. 3 Connection of Unused Pins ....................................................................................................... 34

2. 4 Block Diagrams of Pins .............................................................................................................. 36

2. 5 Instruction of Pin Functions ....................................................................................................... 48

2. 5. 1 Port 0 (P00 to P04) ......................................................................................................................... 48

2. 5. 2 Port 1 (P10 to P15) ......................................................................................................................... 50

2. 5. 3 Port 2 (P20 to P24) ......................................................................................................................... 51

2. 5. 4 Port 4 (P40 to P42) ......................................................................................................................... 52

2. 5. 5 Port 5 (P50, P51) ............................................................................................................................ 53

2. 5. 6 Port 7 (P70 to P73) ......................................................................................................................... 54

2. 5. 7 Port 12 (P121, P122) ...................................................................................................................... 55

2. 5. 8 Port 13 (P130, P137) ...................................................................................................................... 56

2. 5. 9 Port 14 (P140) ................................................................................................................................ 57

2. 5. 10 AVDD, AVSS, VDD, VSS .................................................................................................................... 58

Index-2

2. 5. 11 RESET ......................................................................................................................................... 58

2. 5. 12 REGC ........................................................................................................................................... 58

2. 5. 13 AVDD3 ............................................................................................................................................ 59

2. 5. 14 SC_IN ........................................................................................................................................... 59

2. 5. 15 CLK_SYNCH ................................................................................................................................ 59

2. 5. 16 SYNCH_OUT ............................................................................................................................... 59

2. 5. 17 AGND2 ......................................................................................................................................... 59

2. 5. 18 GAINAMP_OUT ........................................................................................................................... 59

2. 5. 19 GAINAMP_IN ............................................................................................................................... 59

2. 5. 20 MPXIN10, MPXIN11, MPXIN20, MPXIN21, MPXIN30, MPXIN31, MPXIN40, MPXIN41,

MPXIN50, MPXIN51, MPXIN60, MPXIN61 ................................................................................... 59

2. 5. 21 AMP1_OUT, AMP2_OUT, AMP3_OUT........................................................................................ 59

2. 5. 22 DAC1_OUT, DAC2_OUT, DAC3_OUT, DAC4_OUT ................................................................... 59

2. 5. 23 VREFIN1, VREFIN2, VREFIN3, VREFIN4 ................................................................................... 59

2. 5. 24 AGND1 ......................................................................................................................................... 60

2. 5. 25 AVDD1 ............................................................................................................................................ 60

2. 5. 26 AGND3 ......................................................................................................................................... 60

2. 5. 27 BGR_OUT .................................................................................................................................... 60

2. 5. 28 AVDD2 ............................................................................................................................................ 60

2. 5. 29 LDO_OUT .................................................................................................................................... 60

2. 5. 30 TEMP_OUT .................................................................................................................................. 60

2. 5. 31 ARESET ....................................................................................................................................... 60

2. 5. 32 DVDD ............................................................................................................................................. 60

2. 5. 33 SCLK ............................................................................................................................................ 60

2. 5. 34 SDO.............................................................................................................................................. 60

2. 5. 35 SDI ............................................................................................................................................... 61

2. 5. 36 CS ................................................................................................................................................ 61

2. 5. 37 DGND ........................................................................................................................................... 61

2. 5. 38 HPF_OUT ..................................................................................................................................... 61

2. 5. 39 CLK_HPF ..................................................................................................................................... 61

2. 5. 40 CLK_LPF ...................................................................................................................................... 61

2. 5. 41 AGND4 ......................................................................................................................................... 61

2. 5. 42 LPF_OUT ..................................................................................................................................... 61

2. 5. 43 I.C ................................................................................................................................................. 61

CHAPTER 3 MICROCONTROLLER BLOCK ........................................................................................ 62

3. 1 Outline of This Chapter ............................................................................................................... 62

3. 2 Comparison of Each Function with RL78/G1A (64-pin products) .......................................... 63

3. 3 CPU Architecture ......................................................................................................................... 67

3. 3. 1 Memory space ................................................................................................................................ 67

3. 3. 2 Processor registers ........................................................................................................................ 67

Index-3

3. 3. 2. 1 Control registers...................................................................................................................... 67

3. 3. 2. 2 General-purpose registers ...................................................................................................... 67

3. 3. 2. 3 ES and CS registers ............................................................................................................... 67

3. 3. 2. 4 Special function registers (SFRs)............................................................................................ 68

3. 3. 2. 5 Expanded special function registers (2nd SFRs) ................................................................... 76

3. 3. 3 Instruction address addressing ....................................................................................................... 88

3. 3. 4 Addressing for processing data addresses..................................................................................... 88

3. 4 Port Functions ............................................................................................................................. 89

3. 4. 1 Port functions ................................................................................................................................. 89

3. 4. 2 Port configuration ........................................................................................................................... 89

3. 4. 2. 1 Port 0 ..................................................................................................................................... 90

3. 4. 2. 2 Port 1 ..................................................................................................................................... 90

3. 4. 2. 3 Port 2 ..................................................................................................................................... 90

3. 4. 2. 4 Port 3 ..................................................................................................................................... 91

3. 4. 2. 5 Port 4 ..................................................................................................................................... 91

3. 4. 2. 6 Port 5 ..................................................................................................................................... 91

3. 4. 2. 7 Port 6 ..................................................................................................................................... 91

3. 4. 2. 8 Port 7 ..................................................................................................................................... 91

3. 4. 2. 9 Port 12 ................................................................................................................................... 92

3. 4. 2. 10 Port 13 ................................................................................................................................. 92

3. 4. 2. 11 Port 14 ................................................................................................................................. 92

3. 4. 2. 12 Port 15 ................................................................................................................................. 92

3. 4. 3 Registers controlling port function .................................................................................................. 93

3. 4. 3. 1 Port mode register (PMxx) ..................................................................................................... 95

3. 4. 3. 2 Port register (Pxx) .................................................................................................................. 96

3. 4. 3. 3 Pull-up resistor option register (PUxx) ................................................................................... 97

3. 4. 3. 4 Port input mode register (PIMxx) ............................................................................................ 97

3. 4. 3. 5 Port output mode register (POMxx) ........................................................................................ 98

3. 4. 3. 6 Port mode control register (PMCxx) ....................................................................................... 98

3. 4. 3. 7 A/D port configuration register (ADPC) .................................................................................. 99

3. 4. 3. 8 Peripheral I/O redirection register (PIOR) ............................................................................ 101

3. 4. 3. 9 Global digital input disable register (GDIDIS) ....................................................................... 101

3. 4. 3. 10 Global analog input disable register (GAIDIS) .................................................................... 101

3. 4. 4 Port function operation ................................................................................................................. 102

3. 4. 4. 1 W riting to I/O port ................................................................................................................. 102

3. 4. 4. 2 Reading from I/O port ........................................................................................................... 102

3. 4. 4. 3 Operation on I/O port ........................................................................................................... 102

3. 4. 4. 4 Handling different potential (1.8 V, 2.5 V or 3 V) by using EVDD ≤ VDD ................................. 102

3. 4. 4. 5 Handling different potential (1.8 V, 2.5 V or 3V) by using I/O buffers ................................... 103

3. 4. 5 Register settings when using alternate function ........................................................................... 105

3. 4. 6 Cautions when using port function ............................................................................................... 105

Index-4

3. 5 Clock Generator ......................................................................................................................... 106

3. 5. 1 Functions of clock gen erator ....................................................................................................... 106

3. 5. 2 Configuration of clock generator ................................................................................................... 108

3. 5. 3 Registers controlling clock generator ................................................................................ ........... 111

3. 5. 3. 1 Clock operation mode control register (CMC) ....................................................................... 111

3. 5. 3. 2 System clock control register (CKC) ..................................................................................... 112

3. 5. 3. 3 Clock operation status control register (CSC) ....................................................................... 113

3. 5. 3. 4 Oscillation stabilization time counter status register (OST C) ................................................ 114

3. 5. 3. 5 Oscillation stabilization time select register (OSTS) ............................................................. 114

3. 5. 3. 6 Peripheral enable register 0 (PER0) ..................................................................................... 115

3. 5. 3. 7 Subsystem clock supply mode control register (OSMC) ....................................................... 116

3. 5. 3. 8 High-speed on-chip oscillator frequency select register (HOCODIV) .................................... 116

3. 5. 3. 9 High-speed on-chip oscillator trimming register (HIOTRM) .................................................. 116

3. 5. 4 System clock oscillator ................................................................................................................. 117

3. 5. 5 Clock generator operation ............................................................................................................ 117

3. 5. 6 Controlling clock ........................................................................................................................... 117

3. 5. 7 Resonator and oscillator co nstants ................................................................................... ........... 118

3. 6 Timer Array Unit ........................................................................................................................ 122

3. 6. 1 Functions of timer array unit ......................................................................................................... 124

3. 6. 1. 1 Independent channel operation function ............................................................................... 124

3. 6. 1. 2 Simultaneous channel operation function ............................................................................. 126

3. 6. 1. 3 8-bit timer operation funct ion (ch anne ls 1 and 3 only) .......................................................... 127

3. 6. 1. 4 LIN-bus supporting function (channel 7 of unit 0 only) .......................................................... 128

3. 6. 2 Configuration of timer array unit ................................................................................................... 129

3. 6. 2. 1 Timer count register mn (TCRmn) ........................................................................................ 133

3. 6. 2. 2 Timer data register mn (TDRmn) .......................................................................................... 133

3. 6. 3 Registers controlling timer array unit ............................................................................................ 134

3. 6. 3. 1 Peripheral enable register 0 (PER0) ..................................................................................... 134

3. 6. 3. 2 Timer clock select register m (TPSm) ................................................................................... 134

3. 6. 3. 3 Timer mode register mn (TMRmn) ........................................................................................ 135

3. 6. 3. 4 Timer status register mn (TSRmn) ........................................................................................ 140

3. 6. 3. 5 Timer channel enable status register m (TEm) ..................................................................... 140

3. 6. 3. 6 Timer channel start register m (TSm) ................................................................................... 140

3. 6. 3. 7 Timer channel stop register m (TTm) .................................................................................... 140

3. 6. 3. 8 Timer input select register 0 (TIS0) ....................................................................................... 140

3. 6. 3. 9 Timer output ena ble register m (TO Em) ............................................................................... 141

3. 6. 3. 10 Timer output register m (TOm) ........................................................................................... 141

3. 6. 3. 11 Timer output level register m (TOLm) ................................................................................. 142

3. 6. 3. 12 Timer output mode register m (TOMm) .............................................................................. 142

3. 6. 3. 13 Input switch control register (ISC) ....................................................................................... 143

3. 6. 3. 14 Noise filter enable register 1 (NFEN1) ................................................................................ 143

Index-5

3. 6. 3. 15 Registers controlling port functions of pins to be used for timer I/O ................................... 144

3. 6. 4 Basic rules of timer array unit ....................................................................................................... 145

3. 6. 5 Operation of counter ..................................................................................................................... 145

3. 6. 6 Channel output (TOmn pin) control .............................................................................................. 145

3. 6. 7 Timer input (TImn) control ............................................................................................................ 145

3. 6. 8 Independent channel operation function of timer array unit .......................................................... 145

3. 6. 9 Simultaneous channel operation function of timer array unit ........................................................ 145

3. 6. 10 Cautions when u sing timer array unit ......................................................................................... 145

3. 7 Real-Time Clock ........................................................................................................................ 146

3. 8 12-bit Interval Timer .................................................................................................................. 147

3. 8. 1 Functions of 12-bit interval timer .................................................................................................. 147

3. 8. 2 Configuration of 12-b it interval tim er ............................................................................................. 147

3. 8. 3 Registers controlling 12-bit interval timer...................................................................................... 148

3. 8. 3. 1 Peripheral enable register0 (PER0) ...................................................................................... 148

3. 8. 3. 2 Subsystem clock supply mode control register (OSMC) ....................................................... 148

3. 8. 3. 3 Interval timer control register (ITMC) .................................................................................... 149

3. 8. 4 12- bit interval timer operation ...................................................................................................... 149

3. 9 Clock Output/Buzzer Output Controller .................................................................................. 150

3. 9. 1 Functions of clock output/buzzer output controller ....................................................................... 150

3. 9. 2 Configuration of clock output /buzz er output con trol ler .................................................................. 151

3. 9. 3 Registers controlling clock output/buzz er output controller .......................................................... 151

3. 9. 3. 1 Clock output select register 0 (CKS0) ................................................................................... 152

3. 9. 3. 2 Registers controlling port functions of pins to be used for clock or buzzer output................. 153

3. 9. 4 Operations of clock output/buzzer output controller ..................................................................... 153

3. 9. 5 Cautions of clock output/buzzer output controller ......................................................................... 153

3. 10 Watchdog Timer ...................................................................................................................... 154

3. 11 A/D Converter .......................................................................................................................... 155

3. 11. 1 Function of A/D converter ........................................................................................................... 155

3. 11. 2 Configuration of A/D converter ................................................................................................... 158

3. 11. 3 Registers used in A/D converter ................................................................................................. 160

3. 11. 3. 1 Peripheral enable register 0 (PER0) ................................................................................... 160

3. 11. 3. 2 A/D converter mode register 0 (ADM0) ............................................................................... 160

3. 11. 3. 3 A/D converter mode register 1 (ADM1) ............................................................................... 161

3. 11. 3. 4 A/D converter mode register 2 (ADM2) ............................................................................... 162

3. 11. 3. 5 12-bit A/D conversion result register (ADCR) ..................................................................... 162

3. 11. 3. 6 8-bit A/D conversion result register (ADCRH) ..................................................................... 162

3. 11. 3. 7 Analog input channel specification register (ADS) .............................................................. 163

3. 11. 3. 8 Conversion result comparison upper limit setting register (ADUL) ...................................... 167

3. 11. 3. 9 Conversion result comparison lower limit setting register (ADLL) ....................................... 167

3. 11. 3. 10 A/D test register (ADTES) ................................................................................................. 167

3. 11. 3. 11 Registers controlling port function of analog input pins ..................................................... 167

Index-6

3. 11. 4 A/D converter conversion operations ......................................................................................... 168

3. 11. 5 Input voltage and conversion results .......................................................................................... 168

3. 11. 6 A/D converter operation modes .................................................................................................. 168

3. 11. 7 A/D converter setup flowchart .................................................................................................... 168

3. 11. 8 SNOOZE mode function ............................................................................................................. 168

3. 11. 9 How to read A/D converter characteristics table ......................................................................... 168

3. 11. 10 Cautions for A/D converter ....................................................................................................... 168

3. 12 Serial Array Unit ...................................................................................................................... 169

3. 12. 1 Functions of serial array unit ...................................................................................................... 170

3. 12. 1. 1 3-wire serial I/O (CSI00, CSI10, CSI20, CSI21) .................................................................. 170

3. 12. 1. 2 UART (UART0 to UART2) .................................................................................................. 171

3. 12. 1. 3 Simplified I2C (IIC00, IIC10, IIC20) ..................................................................................... 172

3. 12. 2 Configuration of serial array unit ................................................................................................. 173

3. 12. 2. 1 Shift register ....................................................................................................................... 177

3. 12. 2. 2 Lower 8/9 bits of the serial data register mn (SDRmn) ....................................................... 177

3. 12. 3 Registers controlling serial array unit ......................................................................................... 179

3. 12. 3. 1 Peripheral enable register 0 (PER0) ................................................................................... 179

3. 12. 3. 2 Serial clock select register m (SPSm) ................................................................................ 179

3. 12. 3. 3 Serial mode register mn (SMRmn) ..................................................................................... 180

3. 12. 3. 4 Serial communication operati on sett ing regi ster m n (SCRmn) ........................................... 182

3. 12. 3. 5 Higher 7 bits of the serial data register mn (SDRmn) ......................................................... 186

3. 12. 3. 6 Serial flag clear trigger register mn (SIRmn) ...................................................................... 186

3. 12. 3. 7 Serial status register mn (SSRmn) ..................................................................................... 186

3. 12. 3. 8 Serial channel start register m (SSm) ................................................................................. 186

3. 12. 3. 9 Serial channel stop register m (STm) ................................................................................. 186

3. 12. 3. 10 Serial channel enable status r egi ster m (SEm) ................................................................ 186

3. 12. 3. 11 Serial output enable register m (SOEm) ........................................................................... 186

3. 12. 3. 12 Serial output register m (SOm) ......................................................................................... 186

3. 12. 3. 13 Serial output level register m (SOLm) ............................................................................... 187

3. 12. 3. 14 Serial standby control register 0 (SSC0) .......................................................................... 187

3. 12. 3. 15 Input switch control register (ISC)..................................................................................... 187

3. 12. 3. 16 Noise filter enable register 0 (NFEN0) .............................................................................. 187

3. 12. 3. 17 Registers controlling port functions of serial input/output pins .......................................... 188

3. 12. 4 Operation stop mode .................................................................................................................. 189

3. 12. 5 Operation of 3-Wire serial I/O (CSI00, CSI10, CSI20, CSI21) communication ........................... 189

3. 12. 6 Operation of UART (UART0 to UART2) communication ............................................................ 189

3. 12. 7 LIN communicat ion o perati on ..................................................................................................... 189

3. 12. 8 Operation of simplified I2C (IIC00, IIC10, IIC20) communication ................................................ 189

3. 13 Serial Interface IICA................................................................................................................. 190

3. 14 Multiplier and Divider/Multiply-Accumulator ........................................................................ 191

3. 15 DMA Controller ........................................................................................................................ 192

Index-7

3. 16 Interrupt Functions.................................................................................................................. 193

3. 16. 1 Interrupt function types ............................................................................................................... 193

3. 16. 2 Interrupt sources and conf iguration ............................................................................................ 193

3. 16. 3 Registers controlling interrupt functions...................................................................................... 199

3. 16. 3. 1 Interrupt request flag register (IF0L, IF0H, IF1L, IF1H, IF2L, IF2H) ................................... 204

3. 16. 3. 2 Interrupt mask flag register (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H) .......................... 206

3. 16. 3. 3 Priority specification flag registers (PR00L, PR00H, PR01L, PR01H, PR10L, PR10H,

PR11L, PR11H, PR12L, PR12H, PR02L, PR02H) ............................................................. 208

3. 16. 3. 4 External interrupt rising edge enable register (EGP0), External interrupt falling edge

enable register (EGN0) ...................................................................................................... 212

3. 16. 3. 5 Program status word (PSW) ............................................................................................... 213

3. 16. 4 Interrupt servicing operations ..................................................................................................... 213

3. 17 Key Interrupt Function ............................................................................................................ 214

3. 17. 1 Functions of key interrupt ........................................................................................................... 214

3. 17. 2 Configuration of key interrupt ..................................................................................................... 215

3. 17. 3 Register controlling key interrupt ................................................................................................ 217

3. 17. 3. 1 Key return control register (KRCTL) ................................................................................... 217

3. 17. 3. 2 Key return mode register 0 (KRM0) ................................................................................... 217

3. 17. 3. 3 Key return flag register (KRF) ............................................................................................ 217

3. 17. 3. 4 Port mode registers 0 to 2, 7 (PM0 to PM2, PM7) .............................................................. 218

3. 17. 3. 5 Peripheral I/O redirection register (PIOR) ......................................................................... 219

3. 17. 4 Key interrupt operation ............................................................................................................... 219

3. 18 Standby Function .................................................................................................................... 220

3. 19 Reset Function ......................................................................................................................... 221

3. 20 Power-On-Reset Circuit .......................................................................................................... 222

3. 21 Voltage Detector ...................................................................................................................... 223

3. 21. 1 Functions of voltage detector ..................................................................................................... 223

3. 21. 2 Configuration of voltage detector ................................................................................................ 224

3. 21. 3 Registers controlling voltage dete ctor ........................................................................................ 225

3. 21. 3. 1 Voltage detection register (LVIM) ....................................................................................... 225

3. 21. 3. 2 Voltage detection level register (LVIS) ............................................................................... 225

3. 21. 4 Operation of voltage detector ..................................................................................................... 228

3. 21. 5 Cautions for voltage detector ...................................................................................................... 228

3. 22 Safety Functions ...................................................................................................................... 229

3. 22. 1 Overview of safety functions ....................................................................................................... 229

3. 22. 2 Registers used by safety functions ............................................................................................. 230

3. 22. 3 Operation of safety functi ons ...................................................................................................... 230

3. 22. 3. 1 Flash memory CRC operation function (high-speed CRC) ................................................ 230

3. 22. 3. 2 CRC operation function (general-purpose CRC) ................................................................ 230

3. 22. 3. 3 RAM parity error detection function .................................................................................... 230

3. 22. 3. 4 RAM guard function ........................................................................................................... 230

Index-8

3. 22. 3. 5 SFR guard function ............................................................................................................ 230

3. 22. 3. 6 Invalid memory access detection function .......................................................................... 230

3. 22. 3. 7 Frequency detection function ............................................................................................. 231

3. 22. 3. 8 A/D test function ................................................................................................................. 231

3. 23 Regulator .................................................................................................................................. 232

3. 24 Option Byte .............................................................................................................................. 233

3. 24. 1 Functions of option bytes............................................................................................................ 233

3. 24. 1. 1 User option byte (000C0H to 000C2H/010C0H to 010C2H ) .............................................. 233

3. 24. 1. 2 On-chip debug option byte (000C3H/010C3H) ................................................................... 234

3. 24. 2 Format of user option byte.......................................................................................................... 235

3. 24. 3 Format of on-chip debug option byte .......................................................................................... 238

3. 24. 4 Setting of option byte .................................................................................................................. 238

3. 25 Flash Memory .......................................................................................................................... 239

3. 25. 1 Serial Programming Using Flash Memory Programmer ............................................................. 239

3. 25. 1. 1 Programming environment ................................................................................................. 240

3. 25. 1. 2 Communication mode ........................................................................................................ 240

3. 25. 2 Serial programming using external device (that Incorporates UART) ......................................... 241

3. 25. 3 Connection of pins on board ....................................................................................................... 241

3. 25. 4 Serial programmin g meth od ....................................................................................................... 241

3. 25. 5 Processing time for each command when PG-FP5 Is in use (Reference value) ........................ 241

3. 25. 6 Self-programming ....................................................................................................................... 241

3. 25. 7 Security Settings ........................................................................................................................ 241

3. 25. 8 Data flash ................................................................................................................................... 241

3. 26 On-chip Debug Function ........................................................................................................ 242

3. 26. 1 Connecting E1 on-chip debugging emulator to RL78/G1E ......................................................... 242

3. 26. 2 On-chip debug se curi ty ID .......................................................................................................... 243

3. 26. 3 Securing of user resources ......................................................................................................... 243

3. 27 BCD Correction Circuit ........................................................................................................... 244

3. 28 Instruction Set ......................................................................................................................... 245

CHAPTER 4 ANALOG BLOCK ............................................................................................................. 246

4. 1 Configurable Amplifier .............................................................................................................. 246

4. 1. 1 Overview of configurable amplifier features .................................................................................. 246

4. 1. 2 Block diagram ............................................................................................................................... 247

4. 1. 3 Registers controlling the configurable amplifiers .......................................................................... 250

4. 1. 4 Procedure for operating the config urabl e ampl ifi ers ..................................................................... 268

4. 2 Gain Adjustment Am plifier ....................................................................................................... 282

4. 2. 1 Overview of gain adjustment amplifier features ............................................................................ 282

4. 2. 2 Block diagram ............................................................................................................................... 282

4. 2. 3 Registers controlling the gain adjustment amplifier ...................................................................... 284

Index-9

4. 2. 4 Procedure for operating the gain adjus tment amplifier ................................................................. 287

4. 3 D/A Converter ............................................................................................................................ 288

4. 3. 1 Overview of D/A converter features .............................................................................................. 288

4. 3. 2 Block diagram ............................................................................................................................... 288

4. 3. 3 Registers controlling the D/A converters ...................................................................................... 289

4. 3. 4 Procedure for operating the D/A converters ................................................................................. 291

4. 3. 5 Notes on using D/A converters ..................................................................................................... 292

4. 4 Low-Pass Filter .......................................................................................................................... 293

4. 4. 1 Overview of low-pass filter features .............................................................................................. 293

4. 4. 2 Block diagram ............................................................................................................................... 294

4. 4. 3 Registers controlling the low-pass filter ........................................................................................ 295

4. 4. 4 Procedure for operating the low-pass filter ................................................................................... 297

4. 5 High-Pass Filter ......................................................................................................................... 298

4. 5. 1 Overview of high-pas s filter features ............................................................................................ 298

4. 5. 2 Block diagram ............................................................................................................................... 299

4. 5. 3 Registers controlling the high-pass filter ....................................................................................... 300

4. 5. 4 Procedure for operating the high-pass filter .................................................................................. 302

4 .6 Temperature Sensor.................................................................................................................. 303

4. 6. 1 Overview of temperature sensor features..................................................................................... 303

4. 6. 2 Block diagram ............................................................................................................................... 303

4. 6. 3 Registers controlling the temperature sensor ............................................................................... 304

4. 6. 4 Procedure for operating the temperature sensor .......................................................................... 305

4. 7 Variable Output Voltage Regulator ......................................................................................... 306

4. 7. 1 Overview of variable output voltage regulator features ................................................................ 306

4. 7. 2 Block diagram ............................................................................................................................... 306

4. 7. 3 Registers controlling the variable output voltage regulator ........................................................... 307

4. 7. 4 Procedure for operating the variable output voltage regulator ...................................................... 309

4. 8 Reference Voltage Generator ................................................................................................... 310

4. 8. 1 Overview of reference voltage generator features ........................................................................ 310

4. 8. 2 Block diagram ............................................................................................................................... 310

4. 8. 3 Registers controlling the reference voltage generator .................................................................. 311

4. 8. 4 Procedure for operating the reference voltage generator ............................................................. 311

4. 8. 5 Notes on using the reference voltage generator ........................................................................... 311

4. 9 SPI ............................................................................................................................................... 312

4. 9. 1 Overview of SPI features .............................................................................................................. 312

4. 9. 2 SPI communication ...................................................................................................................... 313

4. 10 Analog Reset ............................................................................................................................ 315

4. 10. 1 Overview of analog reset feature ................................................................................................ 315

4. 10. 2 Registers controlling the analog reset ........................................................................................ 318

Index-10

CHAPTER 5 ELECTRICAL SPECIFICATIONS ................................................................................... 319

5. 1 Absolute Maximum Ratings ..................................................................................................... 320

5. 1. 1 Absolute maximum ratings of micr oco ntrol ler blo ck ..................................................................... 320

5. 1. 2 Absolute maximum ratings of analog block .................................................................................. 322

5. 1. 3 Absolute maximum ratings (common to mi cro contr oll er block and analog block) ........................ 323

5. 2 Electrical Specifications of Microcontroller Block ................................................................ 324

5. 2. 1 Oscillator characteristics............................................................................................................... 324

5. 2. 1. 1 X1 oscillator chara ct erist ic s .................................................................................................. 324

5. 2. 1. 2 On-chip oscill ator ch aracteristics .......................................................................................... 325

5. 2. 2 DC characteristics ....................................................................................................................... 326

5. 2. 2. 1 Pin characteristics ............................................................................................................... 326

5. 2. 2. 2 Supply current characteristics .............................................................................................. 332

5. 2. 3 AC characteristics ........................................................................................................................ 337

5. 2. 4 Peripheral function s ch aracteristics .............................................................................................. 342

5. 2. 4. 1 Serial array unit .................................................................................................................... 342

5. 2. 5 Analog block characteristics ......................................................................................................... 372

5. 2. 5. 1 A/D converter characteristics ................................................................................................ 372

5. 2. 5. 2 Temperature sensor, internal reference voltage output characteristics ................................ 378

5. 2. 5. 3 POR circuit characteristics ................................................................................................... 378

5. 2. 5. 4 LVD circuit characteristics .................................................................................................... 379

5. 2. 5. 5 Supply voltage rise slope characteristics .............................................................................. 380

5. 2. 6 Data memory STOP mode low supply voltage data retention char act eri sti cs ............................. 381

5. 2. 7 Flash memory progra mming characteristics ................................................................................ 381

5. 2. 8 Dedicated flash memory programmer communi cati on (UART ) .................................................... 382

5. 2. 9 Timing specs for switching flash memory programming modes .................................................... 383

5. 3 Electrical Specifications of Analog Block .............................................................................. 384

5. 3. 1 Operating conditions of analog block ........................................................................................... 384

5. 3. 2 Supply current charact erist ics ....................................................................................... ............... 385

5. 3. 3 Electrical specifications of each bloc k ......................................................................................... 387

5. 3. 3. 1 Configurable amplif i er characteri sti cs .................................................................................. 387

5. 3. 3. 2 Gain adjustment amplifier character ist ic s ............................................................................. 397

5. 3. 3. 3 D/A converter characteristics ................................................................................................ 399

5. 3. 3. 4 Low-pass filter characteristic s ................................................................................... ........... 400

5. 3. 3. 5 High-pass filter cha r acteristics .............................................................................................. 401

5. 3. 3. 6 Temperature sensor charact eristics ..................................................................................... 402

5. 3. 3. 7 Variable output voltage regulator characteristics .................................................................. 402

5. 3. 3. 8 Reference voltage generator characteristics ........................................................................ 402

5. 3. 3. 9 SPI characteristics ................................................................................................................ 403

Index-11

CHAPTER 6 PACKAGE DRAWINGS .................................................................................................. 405

APPENDIX A CHARACTERISTICS CURVE (TA = 25°C, TYP.) (REFERENCE VALUE) ............. 407

APPENDIX B REVISION HISTORY ...................................................................................................... 414

B. 1 Major Revisions in This Edition .............................................................................................. 414

B. 2 Revision History of Preceding Editions ................................................................................. 418

R01UH0353EJ0200 Rev.2.00 1

Mar 31, 2014

R01UH0353EJ0200

Rev.2.00

Mar 31, 2014

RL78/G1E

RENESAS MCU

CHAPTER 1 OUTLINE

1. 1 Features

The RL78/G1E is a multi-chip package (MCP) device that integrates a chip of an analog block and a chip of 16-bit

microcontroller block in a single package. The chip of analog block features a range of front-end analog circuits for

small sensor signal processing such as a configurable gain amplifier, gain adjustment amplifier, filter circuit, D/A

converter, and temperature sensor. The chip of 16-bit microcontroller block corresponds to the RL78/G1A (64-pin

products).

1. 1. 1 Microcontroller block

Low power consumption technology by standby function

• HALT mode

• STOP mode

• SNOOZE mode

RL78 CPU core

• CISC architecture with 3-stage pipeline

• Minimum instruction execution time: Can be changed from 0.03125 μs (32 MHz operation with high-speed on-chip

oscillator) to 0.05 μs (20 MHz operation with high-speed system clock)

• Address space: 1 MB

• General-purpose registers: (8-bit register × 8) × 4 banks

• On-chip RAM: 2 to 4 KB

Code flash memory

• Code flash memory: 32 to 64 KB

• Block size: 1 KB

• Prohibition of block erase and rewriting (security function)

• On-chip debug function

• Self-programming (with boot swap function/flash shield window function)

Data flash memory

• Data flash memory: 4 KB

• Back ground operation (BGO): Instructions can be executed from the program memory while rewriting the data

flash memory.

• Number of rewrites: 1,000,000 times (TYP.)

• Voltage of rewrites: VDD = 1.8 to 5.5 V

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RL78/G1E CHAPTER 1 OUTLINE

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High-speed on-chip oscillator

• Select from 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz

• High accuracy ±1.0 % (VDD = 1.8 to 5.5 V, TA = -20 to +85°C)

Operating ambient temperature

• T

A = -40 to +85°C (A: Consumer applications, D: Industrial applications)

Power supply voltage

• VDD (Power supply for microcontroller block) = 1.6 to 5.5 V

• AVDD (Power supply for A/D converter in microcontroller block) = 1.6 to 3.6 V

• AVDDn (Power supply for analog block) = 3.0 to 5.5 V

• DVDD (Power supply for SPI in analog block) = 3.0 to 5.5 V

Power management and reset function

• On-chip power-on-reset (POR) circuit

• On-chip voltage detector (LVD) (Select interrupt and reset from 3 levels)

DMA (Direct Memory Access) controller

• 2 channels

• Number of clocks during transfer between 8/16-bit SFR and internal RAM: 2 clocks

Multiplier and divider/multiply-accumulator

• 16 bits × 16 bits = 32 bits (Unsigned or signed)

• 32 bits ÷ 32 bits = 32 bits (Unsigned)

• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)

Serial interface

• CSI : 2 channels (64-pin products), 6 channels (80-pin products)

• UART / UART (LIN-bus supported) : 2 channels / 1channel

• I2C/Simplified I2C communication : 1 channel (64-pin products), 3 channels (80-pin products)

Timer

• 16-bit timer : 8 channels

• 12-bit interval timer : 1 channel

• Watchdog timer : 1 channel (operable with the dedicated low-speed on-chip oscillator)

A/D converter

• 8/12-bit resolution A/D converter

• Analog input: 13 channels (64-pin products), 17 channels (80-pin products)

• Internal reference voltage (1.45 V) and temperature sensorNote

Note Can be selected only in HS (high-speed main) mode

Remarks 1. n = 1 to 3

2. The functions mounted depend on the product. See 1.6 Outline of Functions.

RL78/G1E CHAPTER 1 OUTLINE

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Mar 31, 2014

I/O port

• I/O port : 24 (64-pin products), 30 (80-pin products)

• Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor

• Different potential interface: Can connect to a 1.8/2.5/3 V device

• On-chip key interrupt function

• On-chip clock output/buzzer output controller

Others

• On-chip BCD (binary-coded decimal) correction circuit

ROM, RAM capacities

Flash ROM Data Flash RAM RL78/G1E

64 pins 80 pins

32 KB 4 KB 2 K B R5F10FLC R5F10FMC

48 KB 4 KB 3 K B R5F10FLD R5F10FMD

64 KB 4 KB 4 K B R5F10FLE R5F10FME

Remark The functions mounted depend on the product. See 1.6 Outline of Functions.

1. 1. 2 Analog block

• Configurable amplifier: 3 channels

• Gain adjustment amplifier: 1 channel

• High-pass filter: 1 channel Note

• Low-pass filter: 1 channel

• D/A converter: 4 channels

• Variable output voltage regulator: 1 channel

• Reference voltage generator : 1 channel

• Temperature sensor: 1 channel

• SPI (for analog block): 1 channel

Note 80-pin products only.

Remark The functions mounted depend on the product. See 1.6 Outline of Functions.

RL78/G1E CHAPTER 1 OUTLINE

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Mar 31, 2014

1. 2 List of Part Numbers

Renesas MCU

Renesas semiconductor product

Pin count:

Fields of application:

ROM number (Omitted with blank products)

Packaging specification:

#U0

#V0

#W0

#X0

: T ray (HWQFN)

: T ray (LFQFP)

: Embossed Tape (HWQFN)

: Embossed Tape (LFQFP)

Package type:

FB : LFQFP, 0.5 mm pitch

NA : HWQFN, 0.5 mm pitch

A : Consumer applications

D : Industrial applications

ROM capacity:

: 32 KB

: 48 KB

: 64 KB

L : 64-pin

M : 80-pin

RL78/G1E group

Memory type:

F : Flash memory

Part No. R 5 F 1 0 F M E A x x x F B # v 0

Pin count Package Data Flash Part Number

64 pins 64-pin plastic HWQFN

(fine pitch) (9 × 9)

Mounted R5F10FLCANA#U0, R5F10FLCANA#W0,

R5F10FLDANA#U0, R5F10FLDANA#W0,

R5F10FLEANA#U0, R5F10FLEANA#W0,

R5F10FLCDNA#U0, R5F10FLCDNA#W0,

R5F10FLDDNA#U0, R5F10FLDDNA#W0,

R5F10FLEDNA#U0, R5F10FLEDNA#W0

80 pins 80-pin plastic LFQFP

(12 × 12)

Mounted R5F10FMCAFB#V0, R5F10FMCAFB#X0,

R5F10FMDAFB#V0, R5F10FMDAFB#X0,

R5F10FMEAFB#V0, R5F10FMEAFB#X0,

R5F10FMCDFB#V0 , R5F10FMCDFB#X0,

R5F10FMDDFB#V0 , R5F10FMDDFB#X0,

R5F10FMEDFB#V0, R5F10FMEDFB#X0

Caution The part number above is valid as of when this manual was issued. For the latest part number,

see the web page of the target product on the Renesas Electronics website.

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RL78/G1E CHAPTER 1 OUTLINE

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1. 3 Pin Configuration (Top View)

1. 3. 1 64-pin products

64-pin plastic WQFN (fine pitch) (9 × 9)

P11/ANI20/SI00/SDA00/RxD0/TOOLRxD/(KR1)

P12/ANI21/SO00/TxD0/TOOLTxD/(KR2)

P13/ANI22/TxD2/(KR3)

P14/ANI23/RxD2/(KR4)

P72/SO21/KR2/SDI

DVDD

P71/SI21/KR1/SDO

TEMP_OUT

LDO_OUT

AVDD2

BGR_OUT

AGND3

MPXIN10

P10/ANI18/SCK00/SCL00/(KR0)

MPXIN20

AVDD

MPXIN11

AVSS

MPXIN21

P23/ANI3/(KR6)

MPXIN30

P03/ANI16/RxD1/(KR3)

MPXIN40

P02/ANI17/TxD1/(KR2)

MPXIN31

P22/ANI2/(KR5)

MPXIN41

P21/ANI1/AVREFM

DAC1_OUT/VREFIN1

P20/ANI0/AVREFP

DAC2_OUT/VREFIN2

P130

AVDD1

P01/TO00/(KR1)

AGND1P00/TI00/(KR0)

DAC3_OUT/VREFIN3

P42/TI04/TO04

AMP1_OUT

P41/ANI30/TI07/TO07

AMP3_OUT

P40/TOOL0

AMP2_OUT

RESET

DGND

P137/INTP0

P122/X2/EXCLK

P121/X1

REGC

VSS

VDD

DGND

LPF_OUT

AVDD3

CLK_LPF

AGND4

I.C

DAC4_OUT/VREFIN4

AGND2

MPXIN60

MPXIN50

6731 2 4 5 8 9 10 11 12 13 15 1614

ARESET

P70/ANI28/SCK21/KR0/SCLK

P73/KR3/CS

Cautions 1. Connect the REGC pin to VSS via a capacitor (0.47 to 1

F).

2. Make the potential of VDD, AVDD1, AVDD2, AVDD3, and DVDD the same.

3. Make the potential of VSS, AGND1, AGND2, AGND3, AGND4, and DGND the same.

4. Leave I.C open.

5. Connect the LDO_OUT pin to AGND3 via a capacitor (4.7

F: recommended).

6. Connect the BGR_OUT pin to AGND3 via a capacitor (0.1

F: recommended).

7. When using Low-pass filter or High-pass filter,

connect the DAC4_OUT/VREFIN4 pin to AGND1 via a capacitor (470 pF: recommended).

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RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 6

Mar 31, 2014

1. 3. 2 80-pin products

80-pin plastic LQFP (fine pitch) (12 × 12)

DGND

MPXIN51

DGND

MPXIN11

MPXIN21

MPXIN30

MPXIN40

MPXIN31

MPXIN41

DAC1_OUT/VREFIN1

DAC2_OUT/VREFIN2

AVDD1

AMP1_OUT

AGND1

P140/PCLBUZ0/INTP6 AMP2_OUT

P42/TI04/TO04

DAC3_OUT/VREFIN3

AMP3_OUT

MPXIN50

MPXIN60

P11/ANI20/SI00/SDA00/RxD0/TOOLRxD/(KR1) 21

MPXIN61

MPXIN20 40

P12/ANI21/SO00/TxD0/TOOLTxD/(KR2) 22

P13/ANI22/SO20/TxD2/(KR3) 23

P14/ANI23/SI20/SDA20/RxD2/(KR4) 24

77 25

P51/ANI25/INTP2 26

P50/ANI26/INTP1 27

DVDD 28

73 29

72 30

71TEMP_OUT

P73/KR3/CS 31

P72/SO21/KR2/SDI 32

69 CLK_LPF

P71/SI21/KR1/SDO 33

68 34

67 35

66LDO_OUT 36

65AVDD2

BGR_OUT 37

64 GAINAMP_OUT

AGND3 38

MPXIN10 39

P10/ANI18/SCK00/SCL00/(KR0)

AVDD

AVSS

P24/ANI4/(KR7)

P23/ANI3/(KR6)

P22/ANI2/(KR5)

P21/ANI1/AVREFM

P20/ANI0/AVREFP

P130

P04/SCK10/SCL10/(KR4)

P03/ANI16/SI10/RxD1/SDA10/(KR3)

P02/ANI17/SO10/TxD1/(KR2)

P01/TO00/(KR1)

P00/TI00/(KR0)

P41/ANI30/TI07/TO07

P40/TOOL0

RESET

P137/INTP0

P122/X2/EXCLK

P121/X1

REGC

VSS

VDD

DGND

LPF_OUT

HPF_OUT

AVDD3

CLK_HPF

SCIN

CLK_SYNCH

AGND4

SYNCH_OUT

DAC4_OUT/VREFIN4

AGND2

GAINAMP_IN

P15/ANI24/SCK20/SCL20/(KR5)

ARESET

P70/ANI28/SCK21/KR0/SCLK

Cautions 1. Connect the REGC pin to VSS via a capacitor (0.47 to 1

F).

2. Make the potential of VDD, AVDD1, AVDD2, AVDD3, and DVDD the same.

3. Make the potential of VSS, AGND1, AGND2, AGND3, AGND4, and DGND the same.

4. Connect the LDO_OUT pin to AGND3 via a capacitor (4.7

F: recommended).

5. Connect the BGR_OUT pin to AGND3 via a capacitor (0.1

F: recommended).

6. When using Low-pass filter or High-pass filter,

connect the DAC4_OUT/VREFIN4 pin to AGND1 via a capacitor (470 pF: recommended).

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RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 7

Mar 31, 2014

1. 4 Pin Identification

 Microcontroller Block

ANI0-ANI4, Analog Input

ANI16-ANI18,

ANI20-ANI26,

ANI28, ANI30

AVREFM Analog Reference Voltage

Minus

AVREFP Analog Reference Voltage

Plus

EXCLK External Clock Input

(Main System Clock)

INTP0-INTP2 External Interrupt Input

INTP6

KR0-KR7 Key Return

P00-P04 Port 0

P10-P15 Port 1

P20-P24 Port 2

P40-P42 Port 4

P50, P51 Port 5

P70-P73 Port 7

P121, P122 Port 12

P130, P137 Port 13

P140 Port 14

PCLBUZ0 Programmable Clock Output/

Buzzer Output

REGC Regulator Capacitance

RESET Reset

RxD0-RxD2 Receive Data

SCK00, SCK10, Serial Clock Input/Output

SCK20, SCK21

SCL00, SCL10, Serial Clock Input/Output

SCL20

SDA00, SDA10, Serial Data Input/Output

SDA20

SI00, SI10, Serial Data Input

SI20, SI21

SO00, SO10 Serial Data Output

SO20, SO21

TI00, TI04, Timer Input

TI07

TO00, TO04, Timer Output

TO07

TOOL0 Data Input/Output for Tool

TOOLRxD, Data Input/Output for External

Device

TOOLTxD

TxD0-TxD2 Transmit Data

VDD Power Supply

VSS Ground

X1, X2 Crystal O scilla tor

(Main System Clock)

AVDD Analog Power Supply

AVSS Analog Ground

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RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 8

Mar 31, 2014

 Analog Block

AVDD1 Power supply for configurable

amplifiers

AVDD2 Power supply for variable output

voltage regulator and reference

voltage generator

AVDD3 Power supply for low-pass filter and

high-pass filter

AGND1 Ground for configurable amplifiers

AGND2 Ground for gain adjustment amplifier

AGND3 Ground for variable output voltage

regulator and reference voltage

generator

AGND4 Ground for low-pass filter and

high-pass filter

MPXIN10, Multiplexer input

MPXIN11,

MPXIN20,

MPXIN21,

MPXIN30,

MPXIN31,

MPXIN40,

MPXIN41,

MPXIN50,

MPXIN51,

MPXIN60,

MPXIN61

SC_IN Input for filter signal processing

CLK_SYNC H Synchronous dete ctor control clo ck

input

SYNCH_OUT Synchronous detector output

GAINAMP_IN Gain adjustment amplifier input

GAINAMP_OUT Gain adjustment amplifier output

AMP1_OUT, Configurable amplifier output

AMP2_OUT,

AMP3_OUT

DAC1_OUT, D/A converter output

DAC2_OUT,

DAC3_OUT,

DAC4_OUT

VREFIN1,

VREFIN2,

VREFIN3 Reference voltage input for

configurable amplifier

VREFIN4 Reference voltage input for

Gain adjustment amplifier,

low-pass filter, and high-pass filter

SCLK Serial clock input

SDO Serial data output

SDI Serial data input

CS Chip select input

TEMP_OUT Temperature sensor output

ARESET Reset for analog block

DVDD Power supply for SPI

DGND Ground for SPI

HPF_OUT High-pass filter output

CLK_HPF Pin for inputting high-pass filter

control clock

CLK_LPF Pin for inputting low-pass filter

control clock

LPF_OUT Low-pass filter output

BGR_OUT Reference voltage generator output

LDO_OUT Variable output voltage regulator

I.C Internal connect

RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 9

Mar 31, 2014

1. 5 Block Diagram

1. 5. 1 64-pin products

P10/ANI18/SCK00/SCL00/(KR0)

AVDD

AVSS

P23/ANI3/(KR6)

P22/ANI2/(KR5)

P21/ANI1/AVREFM

P20/ANI0/AVREFP

P130

P03/ANI16/RxD1/(KR3)

P02/ANI17/TxD1/(KR2)

P01/TO00/(KR1)

P00/TI00/(KR0)

P42/TI04/TO04

P41/ANI30/TI07/TO07

P40/TOOL0

RESET

P11/ANI20/SI00/SDA00/RxD0/TOOLRxD/(KR1)

P12/ANI21/SO00/TxD0/TOOLTxD/(KR2)

P13/ANI22/SO20/TxD2/(KR3)

P14/ANI23/SI20/SDA20/RxD2/(KR4)

16-bit Micro.

(RL78/G1A 64-pin)

P73/SO01/KR3

P72/SO21/KR2

P71/SI21/SDA21/KR1

P70/ANI28/SCK21/SCL21/KR0

REGC

P121/X1

P122/X2/EXCLK

P137/INTP0

Analog chip

LDO_OUT

DD2

BGR_OUT

AGND3

MPXIN10

P70/ANI28/SCK21/KR0/SCLK

P71/SI21/KR1/SDO

P72/SO21/KR2/SDI

P73/KR3/CS

TEMP_OUT

ARESET

SDI

SDO

SCLK

MPXIN20

MPXIN11

MPXIN21

MPXIN30

MPXIN40

MPXIN31

MPXIN41

DAC1_OUT/VREFIN1

DAC2_OUT/VREFIN2

AVDD1

AMP1_OUT

AGND1

AMP2_OUT

DAC3_OUT/VREFIN3

AMP3_OUT

DGND

LPF_OUT

DD3

CLK_LPF

AGND4

MPXIN50

MPXIN60

AGND2

DAC4_OUT/VREFIN4

I.C

Remark The RL78/G1E (64-pin products) is a multi-chip package (MCP) device that integrates a chip of an analog

block and a chip of 16-bit microcontroller block in a single package.

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RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 10

Mar 31, 2014

(1) Block diagram in microcontroller block (64-pin products)

INTERVAL

TIMER

MULTIPLIER&

DIVIDER,

MULITIPLY-

ACCUMULATOR

DIRECT MEMORY

ACCESS CONTROL

BCD

ADJUSTMENT

VDD VSS TOOLRxD/P11,

TOOLTxD/P12

PORT0 P00 to P034

PORT1 P10 to P14

PORT2 P20 to P23

PORT4 P40 to P42

RAM

RL78

CPU

CORE

CODE FLASH MEMORY

DATA FLASH MEMORY

2PORT12 P121, P122

4(6)

KEY RETURN

KR0/P70 to KR3/P73

(KR0/P00 to KR3/P03,

KR5/P22, KR6/23)

(KR0/P10 to KR4/P14)

VOLTAGE

REGULATOR REGC

A/D

CONVERTER

4ANI0/P20 to ANI3/P23

9ANI16/P03, ANI17/P02, ANI8/P10,

ANI20/P11 to ANI23/P14,

ANI28/P70, ANI30/P41

AVREFP/P20

AVREFM/P21

RESET

CONTROL

POR/LVD

CONTROL

POWER ON RESET

/VOLTAGE DETECTOR

PORT7 P70 to P72

P73Note To SPI

TOOL0/P40

ON-CHIP

DEBUG

INTERRUPT

CONTROL RxD2/P14

INTP0/P137

SYSTEM

CONTROL

HIGH-SPEED

ON-CHIP

OSCILLATOR

RESET

X1/P121

X2/EXCLK/P122

PORT13 P130

P137

SERIAL ARRAY

UNIT1 (2ch)

RxD2/P14

To SPI

TxD2/P13 UART2

LINSEL

SERIAL ARRAY

UNIT0 (4ch)

RxD0/P11

TxD0/P12 UART0

RxD1/P03

TxD1/P02 UART1

SCK00/P10

SI00/P11

SO00/P12 CSI00

IIC00

CSI21Note

SCL00/P10

SDA00/P11

SCK21/P70

SI21/P71

SO21/P72

LOW-SPEED

ON-CHIP

OSCILLATOR

WINDOW

WATCHDOG

TIMER

TIMER ARRAY

UNIT (8ch)

ch01

ch02

ch03

ch05

ch06

ch00

TI00/P00

TO00/P01

ch04

TI04/TO04/P42

ch07TI07/TO07/P41

Note Connected inside the package.

<R>

RL78/G1E CHAPTER 1 OUTLINE

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Mar 31, 2014

(2) Block diagram in analog block (64-pin products)

Configurable amplifier × 3 channels

Filter circuit

Low-pass filter

Ch1

DD1

Ch2

Gain adjustment

amplifier

Ch3

MPXIN10

MPXIN11

MPXIN20

MPXIN21

AMP1_OUT

MPXIN30

MPXIN31

MPXIN40

MPXIN41

AMP2_OUT

MPXIN50

MPXIN60

AMP3_OUT

AGND1

AGND2

CLK_LPF

AGND4

LPF_OUT

DD3

DAC_OUT1/VREFIN1

DAC_OUT2/VREFIN2

DAC_OUT3/VREFIN3

DAC_OUT4/VREFIN4

D/A converter × 4 channels

Variable output voltage regulator

Reference voltage generator

AGND1

DD2

LDO_OUT

AGND3

BGR_OUT

Temperature sensor TEMP_OUT

SPI

To CSI21

ARESET

DGND

SDO

SDI

SCLK

RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 12

Mar 31, 2014

1. 5. 2 80-pin products

P10/ANI18/SCK00/SCL00/(KR0)

AVDD

AVSS

P24/ANI4/(KR7)

P23/ANI3/(KR6)

P22/ANI2/(KR5)

P21/ANI1/AVREFM

P20/ANI0/AVREFP

P130

P04/SCK10/SCL10/(KR4)

P03/ANI16/SI10/RxD1/SDA10/(KR3)

P02/ANI17/SO10/TxD1/(KR2)

P01/TO00/(KR1)

P00/TI00/(KR0)

P140/PCLBUZ0/INTP6

P42/TI04/TO04

P41/ANI30/TI07/TO07

P40/TOOL0

RESET

P137/INTP0

P11/ANI20/SI00/SDA00/RxD0/TOOLRxD/(KR1)

P12/ANI21/SO00/TxD0/TOOLTxD/(KR2)

P13/ANI22/SO20/TxD2/(KR3)

P14/ANI23/SI20/SDA20/RxD2/(KR4)

P15/ANI24/SCK20/SCL20/(KR5)

P51/ANI25/INTP2

P50/ANI26/INTP1

16-bit Micro.

(RL78/G1A 64-pin)

P73/SO01/KR3

P72/SO21/KR2

P71/SI21/SDA21/KR1

P70/ANI28/SCK21/SCL21/KR0

LDO_OUT

AVDD2

BGR_OUT

AGND3

MPXIN10

MPXIN20

DVDD

ARESET

TEMP_OUT

P73/KR3/CS

P72/SO21/KR2/SDI

P71/SI21/KR1/SDO

P70/ANI28/SCK21/KR0/SCLK

Analog chip

SDI

SDO

MPXIN11

MPXIN21

MPXIN30

MPXIN40

MPXIN31

MPXIN41

DAC1_OUT/VREFIN1

DAC2_OUT/VREFIN2

AVDD1

AMP1_OUT

AGND1

AMP2_OUT

DAC3_OUT/VREFIN3

AMP3_OUT

MPXIN50

MPXIN60

MPXIN51

CLK_LPF

SC_IN

CLK_HPF

AVDD3

HPF_OUT

LPF_OUT

DGND

MPXIN61

GAINAMP_IN

GAINAMP_OUT

AGND2

DAC4_OUT/VREFIN4

SYNCH_OUT

AGND4

CLK_SYNCH

VDD

VSS

REGC

P121/X1

P122/X2/EXCLK

SCLK

Remark The RL78/G1E (80-pin products) is a multi-chip package (MCP) device that integrates a chip of an analog

block and a chip of 16-bit microcontroller block in a single package.

<R>

RL78/G1E CHAPTER 1 OUTLINE

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Mar 31, 2014

(1) Block diagram in microcontroller block (80-pin products)

INTERVAL

TIMER

LOW-SPEED

ON-CHIP

OSCILLATOR

WINDOW

WATCHDOG

TIMER

TIMER ARRAY

UNIT (8ch)

ch01

ch02

ch03

ch05

ch06

ch00

TI00/P00

TO00/P01

ch04

TI04/TO04/P42

ch07TI07/TO07/P41

SERIAL ARRAY

UNIT0 (4ch)

RxD0/P11

TxD0/P12 UART0

RxD1/P03

TxD1/P02 UART1

SCK00/P10

SI00/P11

SO00/P12 CSI00

SCK10/P04

SI10/P03

SO10/P02 CSI10

IIC00

SCL00/P10

SDA00/P11

IIC10

SCL10/P04

SDA10/P03

RAM

MULTIPLIER&

DIVIDER,

MULITIPLY-

ACCUMULATOR

DIRECT MEMORY

ACCESS CONTROL

BCD

ADJUSTMENT

TOOLRxD/P11,

TOOLTxD/P12

PORT0 P00 to P045

PORT1 P10 to P15

PORT2 P20 to P24

PORT4 P40 to P42

PORT5 P50, P51

CODE FLASH MEMORY

DATA FLASH MEMORY

RL78

CPU

CORE

2PORT12 P121, P122

PORT13 P130

P137

4(8)

KEY RETURN

KR0/P70 to KR3/P73

(KR0/P00 to KR4/P04,

KR5/P22 to KR7/P24)

(KR0/P10 to KR5/P15)

TOOL0/P40

ON-CHIP

DEBUG

VOLTAGE

REGULATOR REGC

A/D

CONVERTER

5ANI0/P20 to ANI4/P24

12 ANI16/P03, ANI17/P02, ANI8/P10,

ANI20/P11 to ANI24/P15, ANI25/P51,

ANI26/P50, ANI28/P70, ANI30/P41

PORT14 P140

REFP

/P20

REFM

/P21

RESET

CONTROL

POR/LVD

CONTROL

POWER ON RESET

/VOLTAGE DETECTOR

PORT7 P70 to P72

P73

Note

To SPI

RESET

SYSTEM

CONTROL

HIGH-SPEED

ON-CHIP

OSCILLATOR

X1/P121

X2/EXCLK/P122

INTERRUPT

CONTROL

RxD2/P14

INTP0/P137

SERIAL ARRAY

UNIT1 (2ch)

RxD2/P14

TxD2/P13 UART2

LINSEL

IIC20

SCL20/P15

SDA20/P14

CSI20

SCK20/P15

SI20/P14

SO20/P13

CSI21

Note

SCK21/P70

SI21/P71

SO21/P72

To SPI

BUZZER OUTPUT

CLOCK OUTPUT

CONTROL PCLBUZ0/P140

3INTP1/P50,

INTP2/P51,

INTP6/P140

Note Connected inside the package.

<R>

RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 14

Mar 31, 2014

(2) Block diagram in analog block (80-pin products)

Configurable amplifier × 3 channels

Filter circuit

Low-pass filter

High-pass filter

Ch1

DD1

Ch2

Gain adjustment

amplifier

Ch3

MPXIN10

MPXIN11

MPXIN20

MPXIN21

AMP1_OUT

MPXIN30

MPXIN31

MPXIN40

MPXIN41

AMP2_OUT

MPXIN50

MPXIN51

MPXIN60

MPXIN61

AMP3_OUT

AGND1

AGND2

GAINAMP-IN

GAINAMP_OUT

SYNCH_OUT

CLK_LPF

CLK_HPF

HPF_OUT

AGND4

LPF_OUT

DD3

SC_IN

CLK_SYNCH

DAC_OUT1/VREFIN1

DAC_OUT2/VREFIN2

DAC_OUT3/VREFIN3

DAC_OUT4/VREFIN4

D/A converter × 4 channels

Variable output voltage regulator

Reference voltage generator

AGND1

DD2

LDO_OUT

AGND3

BGR_OUT

Temperature sensor TEMP_OUT

SPI

To CSI21

ARESET

DGND

SDO

SDI

SCLK

RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 15

Mar 31, 2014

1. 6 Outline of Functions

Table 1-1 Outline of Functions (Microcontroller Block) (1/2)

Item 64-pin products 80-pin products

R5F10FLx R5F10FMx

Code flash memory (KB) 32 to 64 32 to 64

Data flash memory (KB) 4 4

RAM (KB) 2 to 4 Note1 2 to 4 Note1

Memo ry space 1 MB

Main system

clock High-speed syst em

clock X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)

1 to 20 MHz: VDD = 2.7 to 5.5 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V

High-speed on-chi p

oscillator HS (High-speed main) m ode: 1 to 32 MHz (VDD = 2.7 to 5.5 V),

HS (High-speed main) m ode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (low-voltage main) mode: 1 to 4 MHz (VDD = 1. 6 to 5.5 V)

Subsyst em cl ock −

Low-speed on-chip oscillator 15 kHz (TYP.)

General-purpose regis ter (8-bit regist er × 8) × 4 banks

Minimum instruct i on execution time 0.03125

s (High-speed on-chip oscillator: fIH = 32 MHz operation)

0.05

s (High-s peed syst em cl ock: fMX = 20 MHz operation)

Instr u ction se t • Data transfer (8/16 bits)

• Adder and subtractor / logical operation (8/16 bits)

• Multiplication (8 bits × 8 bits)

• Rotate, barrel s hift, and bit manipulati on (Set, reset, test, and Boolean operation), etc.

I/O port Total 24 30

CMOS I/O 20 26

CMOS input 3 3

CMOS output 1 1

N-ch open-drain I/O

(6 V tolerance) – –

Timer 16-bit timer 8 channels

Watchdog timer 1 channel

Real-time clock (RTC) –

12-bit Interval t imer (I T) 1 channel

Timer output 3 channels (PWM outputs: 2 channels Note2)

RTC output –

Clock output / buzzer output

–

1 channel

• 2.44 kHz, 4.88 kHz,9. 76 kHz, 1. 25 MHz,

2.5 MHz, 5 MHz, 10 MHz (Main system

clock: fMAIN = 20 MHz operation)

8/12-bit resol ut ion A/D converter 13 channels 17 channels

Notes 1. In the case of the 4 KB, this is about 3 KB when the self-programming function and data flash function are

used. (For details, see 3. 3 CPU Architecture)

2. The number of PWM outputs varies depending on the setting of channels in use. (For details, see 3. 6

Timer Array Unit)

<R>

RL78/G1E CHAPTER 1 OUTLINE

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Mar 31, 2014

Table 1-1 Outline of Functions (Microcontroller Block) (2/2)

Item 64-pin products 80-pin products

R5F10FLx R5F10FMx

Serial interf ace • 64-pin products

CSI: 1 channel / simplified I2C: 1 channel / UART: 1 channel

UART: 1 channel

CSI: 1 channel / UART (LIN-bus supported): 1 channel

• 80-pin products

CSI: 1 channel / simplified I2C: 1 channel / UART: 1 channel

CSI: 2 channels / simp l ifi ed I2C: 1 channel / UART (LIN-bus supported): 1 channel

2C bus –

Multiplier and di vider / multiply

accumulator Multiplier: 16 bits × 16 bits (Unsigned or signed)

Divider: 32 bits ÷ 32 bits (Unsigned)

Multiply accumulator: 16 bits × 16 bits + 32 bits (Unsigned or signed)

DMA controll e r 2 channels

Vectored interrupt sources Internal 25

External 2 5

Key interrupt 4 ch (7) Note 1 4 ch (8)

Note 1

Reset • Reset by RESET pin

• Internal reset by watc hdog timer

• Internal reset by power-on-reset

• Internal reset by voltage detector

• Internal reset by illegal instruction execution Note 2

• Internal reset by RAM parity error

• Internal reset by illegal-memory access

Power-on-reset ci rcuit • Power-on-reset: 1.51 ±0.03 V

• Power-down-reset: 1.50 ±0.03 V

Voltage detect or Detection level : 3 stages

On-chip debug function Provided

Notes 1. The number in parentheses is the channels of key interrupt when using the peripheral I/O redirection register

(PIOR).

2. The illegal instruction is generated when instruction code FFH is executed. Rest by the illegal instruction

execution is not issued by emulation with the in-circuit emulator or on-chip debug emulator.

<R>

RL78/G1E CHAPTER 1 OUTLINE

R01UH0353EJ0200 Rev.2.00 17

Mar 31, 2014

Table 1-2 Outline of Functions (Analog Block)

Item 64-pin products 80-pin products

R5F10FLx R5F10FMx

Sensor interf ace am plif i er Configurable ampl if i ers: 3 channels

Gain adjustment amplifier 1 channel 1 channel (with synchronous det ect or)

Low-pass filter 1 channel

High-pass filter – 1 channel

8-bit D/A converter 4 channels

Variable output vol t age regulator 1 channel

Reference voltage generator 1 channel

Temperature sensor circuit 1 channel

Power supply volt age VDD = 1.6 to 5.5 V, AVDD = 1.6 to 3.6 V,

AVDDn = 3.0 to 5.5 V , DV DD = 3.0 to 5.5 V

Operating ambient t emperature TA = −40°C to +85°C

Remark n = 1 to 3

<R>

RL78/G1E CHAPTER 2 PIN FUNCTIONS

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Mar 31, 2014

CHAPTER 2 PIN FUNCTIONS

2. 1 Pin Functions in Microcontroller Block

The microcontroller block in the RL78/G1E is the RL78/G1A (64-pin products), but a part of pin functions of them are

different from each other. The microcontroller function pins in the RL78/G1E (64-pin and 80-pin products) that differ

from those in the RL78/G1A (64-pin products) are shown in the table below.

(1) Comparison of port functions (64-pin products)

(1/2)

RL78/G1E (64-pin products) RL78/G1A (64-pin products)

Function Name Alternat e Function Function Name Alternat e Function

P00 Same as RL78/G1A (64-pin products) P00 TI00/(KR0)

P01 Same as RL78/G1A (64-pin products) P01 TO00/(KR1)

P02 ANI17/TxD1/(KR2) P02 ANI17/SO10/TxD1/(KR2)

P03 P03/ANI6/RxD1/(KR3) P03 ANI16/SI10/SDA10/RxD1/(KR3)

P04 SCK10/SCL10/(KR4)

P05 TI05/TO05/KR8

P06 TI06/TO06/KR9

P10 Same as RL78/G1A (64-pin products) P10 ANI18/SCK00/SCL00/(KR0)

P11 Same as RL78/G1A (64-pin products) P11 ANI20/SI00/RxD0/TOOLRxD/SDA00/(K R1)

P12 Same as RL78/G1A (64-pin products) P12 ANI21/SO00/TxD0/TOOLTxD/(KR2)

P13 ANI22/TxD2/(KR3) P13 ANI22/SO20/TxD2/(KR3)

P14 ANI23/RxD2/(KR4) P14 ANI23/SI20/SDA20/RxD2/(KR4)

P15 ANI24/SCK20/SCL20/(KR5)

P16 TI01/TO01/INTP5

P20 Same as RL78/G1A (64-pin products) P20 ANI0/AVREFP

P21 Same as RL78/G1A (64-pin products) P21 ANI1/AVREFM

P22 Same as RL78/G1A (64-pin products) P22 ANI2/(KR5)

P23 Same as RL78/G1A (64-pin products) P23 ANI3/(KR6)

P24 ANI4/(KR7)

P25 ANI5/(KR8)

P26 ANI6/(KR9)

P27 ANI7

P30 ANI27/SCK11/SCL11/INTP3/RTC1HZ

P31 ANI29/TI03/TO03/INTP4

P40 Same as RL78/G1A (64-pin products) P40 TOOL0

P41 Same as RL78/G1A (64-pin products) P41 ANI30/TI07/TO07

P42 Same as RL78/G1A (64-pin products) P 42 TI04/TO04

P43 –

P50 ANI26/SI11/SDA11/INTP1

P51 ANI25/SO11/INTP2

P60 SCLA0

P61 SDAA0

P62 –

P63 –

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

<R>

RL78/G1E CHAPTER 2 PIN FUNCTIONS

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(2/2)

RL78/G1E (64-pin products) RL78/G1A (64-pin products)

Function Name Alternat e Function Function Name Alternat e Function

P70 ANI28/SCK21/KR0/SCLK Note P70 ANI28/SCK21/SCL21/KR0

P71 SI21/KR1/SDO Note P71 SI21/SDA21/KR1

P72 SO21/KR2/SDI Note P72 SO21/KR2

P73 KR3/CS Note P73 SO01/KR3

P74 SI01/SDA01/INTP8/KR4

P75 SCK01/SCL01/INTP9/KR5

P76 INTP10/KR6

P77 INTP11/KR7

P120 ANI19

P121 Same as RL78/G1A (64-pin products) P121 X1

P122 Same as RL78/G1A (64-pin products) P122 X2/EXCLK

P123 XT1

P124 XT2/EXCLKS

P130 Same as RL78/G1A (64-pin products) P130 –

P137 Same as RL78/G1A (64-pin products) P137 INTP0

P140 PCLBUZ0/INTP6

P141 PCLBUZ1/INTP7

P150 ANI8

P151 ANI9/(KR6)

P152 ANI10/(KR7)

P153 ANI11/(KR8)

P154 ANI12/(KR9)

Note SCLK, SDO, SDI, CS represent the pin functions of analog block. P70 to P73 which are connected to the pins

of the chip of analog block inside the package have some alternate functions for analog block.

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

<R>

RL78/G1E CHAPTER 2 PIN FUNCTIONS

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(2) Comparison of port functions (80-pin products)

(1/2)

RL78/G1E (80-pin products) RL78/G1A (64-pin products)

Function Name Alternat e Function Function Name Alternat e Function

P00 Same as RL78/G1A (64-pin products) P00 TI00/(KR0)

P01 Same as RL78/G1A (64-pin products) P01 TO00/(KR1)

P02 Same as RL78/G1A (64-pin products) P02 ANI17/SO10/TxD1/(KR2)

P03 Same as RL78/G1A (64-pin products) P03 ANI16/SI10/S DA10/RxD1/(KR3)

P04 Same as RL78/G1A (64-pin products) P04 SCK10/SCL10/(K R4)

P05 TI05/TO05/KR8

P06 TI06/TO06/KR9

P10 Same as RL78/G1A (64-pin products) P10 ANI18/SCK00/SCL00/(KR0)

P11 Same as RL78/G1A (64-pin products) P11 ANI20/SI00/RxD0/TOOLRxD/SDA00/(K R1)

P12 Same as RL78/G1A (64-pin products) P12 ANI21/SO00/TxD0/TOOLTxD/(KR2)

P13 Same as RL78/G1A (64-pin products) P13 ANI22/SO20/TxD2/(KR3)

P14 Same as RL78/G1A (64-pin products) P14 ANI23/SI20/S DA20/RxD2/(KR4)

P15 Same as RL78/G1A (64-pin products) P15 ANI24/SCK20/SCL20/(KR5)

P16 TI01/TO01/INTP5

P20 Same as RL78/G1A (64-pin products) P20 ANI0/AVREFP

P21 Same as RL78/G1A (64-pin products) P21 ANI1/AVREFM

P22 Same as RL78/G1A (64-pin products) P22 ANI2/(KR5)

P23 Same as RL78/G1A (64-pin products) P23 ANI3/(KR6)

P24 Same as RL78/G1A (64-pin products) P24 ANI4/(KR7)

P25 ANI5/(KR8)

P26 ANI6/(KR9)

P27 ANI7

P30 ANI27/SCK11/SCL11/INTP3/RTC1HZ

P31 ANI29/TI03/TO03/INTP4

P40 Same as RL78/G1A (64-pin products) P40 TOOL0

P41 Same as RL78/G1A (64-pin products) P41 ANI30/TI07/TO07

P42 Same as RL78/G1A (64-pin products) P 42 TI04/TO04

P43 –

P50 ANI26/INTP1 P50 ANI26/SI11/SDA11/INTP1

P51 ANI25/INTP2 P51 ANI25/SO11/INTP2

P60 SCLA0

P61 SDAA0

P62 –

P63 –

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

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RL78/G1E (80-pin products) RL78/G1A (64-pin products)

Function Name Alternat e Function Function Name Alternat e Function

P70 ANI28/SCK21/KR0/SCLK Note P70 ANI28/SCK21/SCL21/KR0

P71 SI21/KR1/SDO Note P71 SI21/SDA21/KR1

P72 SO21/KR2/SDI Note P72 SO21/KR2

P73 KR3/CS Note P73 SO01/KR3

P74 SI01/SDA01/INTP8/KR4

P75 SCK01/SCL01/INTP9/KR5

P76 INTP10/KR6

P77 INTP11/KR7

P120 ANI19

P121 Same as RL78/G1A (64-pin products) P121 X1

P122 Same as RL78/G1A (64-pin products) P122 X2/EXCLK

P123 XT1

P124 XT2/EXCLKS

P130 Same as RL78/G1A (64-pin products) P130 –

P137 Same as RL78/G1A (64-pin products) P137 INTP0

P140 Same as RL78/G1A (64-pin products) P140 PCLBUZ0/INTP6

P141 PCLBUZ1/INTP7

P150 ANI8

P151 ANI9/(KR6)

P152 ANI10/(KR7)

P153 ANI11/(KR8)

P154 ANI12/(KR9)

Note SCLK, SDO, SDI, CS represent the pin functions of analog block. P70 to P73 which are connected to the pins of

the chip of analog block inside the package have some alternate functions for analog block.

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

(3) Comparison of functions other than port functions (60-pin products and 80-pin products)

About the comparison of functions other than port pins, See 2. 1. 2. 1 Functions available for each product.

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2. 1. 1 Port functions

The relationship between pin I/O buffer power supplies and the pins is shown below.

Table 2-1. Pin I/O Buffer Power Supplies

(1) 64-pin products

Power Supply Corresponding Pins

VDD • Port pins other than P20 to P23

• RESET, REGC

AVDD • P20 to P23

(2) 80-pin products

Power Supply Corresponding Pins

VDD • Port pins other than P20 to P24

• RESET, REGC

AVDD • P20 to P24

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2. 1. 1. 1 64-pin products

(1/2)

Function

Name Pin

Type I/ O After Reset Alternat e Function Function

P00 8-1-1 I/O Input port TI00/(KR0) Port 0.

4-bit I/O port.

Input of P00, P01, and P03 can be set t o TTL input buffer.

Output of P02 and P03 can be set to N-ch open-drain output (VDD

tolerance).

P02 and P03 can be set to analog input. Note1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resist or can be specif i ed by a software

setting at input port.

P01 TO00/(KR1)

P02 7-3-2 Analog input

port ANI17/TxD1/(KR2)

P03 8-3-2 ANI16/RxD1/(KR3)

P10 8-3-2 I/O Analog input

port ANI18/SCK00/SCL00/

(KR0) Port 1.

5-bit I/O port.

Input of P10, P11, and P14 can be set t o TTL input buffer.

Output of P10 to P14 can be set to N-ch open-drain output (VDD

tolerance).

P10 to P14 can be set to analog input. Note 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resist or can be specif i ed by a software

setting at input port.

P11 ANI20/SI00/RxD0/

TOOLRxD/SDA00/

(KR1)

P12 7-3-2 ANI21/SO00/TxD0/

TOOLTxD/(KR2)

P13 ANI22/TxD2/(KR3)

P14 8-3-2 ANI23/RxD2/(KR4)

P20 4-3-1 I/O Analog input

port ANI0/AVREFP Port 2.

4-bit I/O port.

Can be set to analog input. Note 2

Input/output can be specified in 1-bit units.

P21 ANI1/AVREFM

P22 ANI2/(KR5)

P23 ANI3/(KR6)

P40 7-1-1 I/O Input port TOOL0 Port 4.

3-bit I/O port.

P41 can be set to analog input. No t e 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resist or can be specif i ed by a software

setting at input port.

P41 7-3-1 Analog input

port ANI30/TI07/TO07

P42 7-1-1 Input port TI04/TO04

P70 7-3-1 I/O A nal og i nput

port

ANI28/KR0/SCK21/

SCLK Note3

Port 7.

4-bit I/O port.

P70 can be set to analog input. No t e 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resist or can be specif i ed by a software

setting at input port.

P71 7-1-2 Input port KR1/SI21/SDO Note3

P72 7-1-1 KR2/SO21/SDI Note3

P73 KR3/CS Note3

Notes 1. Digital or analog for each pin can be selected with the port mode control register x (PMCx) (can be set in 1-bit

units).

2. Digital or analog for each pin can be selected with the A/D port configuration register (ADPC).

3. SCLK, SDO, SDI, CS represent the pin functions of analog block. P70 to P73 which are connected to the pins

of the chip of analog block inside the package have some alternate functions for analog block.

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

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P121 2-2-1

Input Input port X1 Port 12.

2-bit input port.

P122 X2/EXCLK

P130 1-1-1 Output Output port − Port 13.

1-bit output port and 1-bit input port.

P137 2-1-2 Input Input port INTP0

RESET 2-1-1 Input − − Input only pin for external reset .

When external reset is not used, connect this pi n to VDD directly or

via a resist or.

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2. 1. 1. 2 80-pin products

(1/2)

Function

Name

Type

I/O After Reset Alternat e Function Function

P00 8-1-1 I/O Input port TI00/(KR0) Port 0.

5-bit I/O port.

Input of P00, P01, P03, and P04 can be set to TTL input

buffer.

Output of P02 to P04 can be set to N-ch open-drain output

(VDD toleranc e).

P02 and P03 can be set to analog input. Note 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by a

software setti ng at input port.

P01 TO00/(KR1)

P02 7-3-2 Analog input

port

ANI17/SO10/TxD1/(KR2)

P03 8-3-2 ANI16/SI10/RxD1/

SDA10/(KR3)

P04 8-1-2 Input port SCK10/SCL10/(KR4)

P10 8-3-2 I/O Analog input

port

ANI18/SCK00/

SCL00/(KR0)

Port 1.

6-bit I/O port.

Input of P10, P11, P14, and P15 can be set to TTL input

buffer.

Output of P10 to P15 can be set to N-ch open-drain output

(VDD toleranc e).

P10 to P15 can be set to analog input. Note 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by a

software setti ng at input port.

P11 ANI20/SI00/RxD0/

TOOLRxD/SDA00/(KR1)

P12 7-3-2 ANI21/SO00/TxD0/

TOOLTxD/(KR2)

P13 ANI22/TxD2/SO20/(KR3)

P14 8-3-2 ANI23/RxD2/SI20/

SDA20/(KR4)

P15 ANI24/SCK20/

SCL20/(KR5)

P20 4-3-1 I/O Analog input

port

ANI0/AVREFP Port 2.

5-bit I/O port.

Can be set to analog input. Note 2

Input/output can be specified in 1-bit units.

P21 ANI1/AVREFM

P22 ANI2/(KR5)

P23 ANI3/(KR6)

P24 ANI4/(KR7)

P40 7-1-1 I/O Input port TOOL0 Port 4.

3-bit I/O port.

P41 can be set to analog input. No t e 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by a

software setti ng at input port.

P41 7-3-1 Analog input

port

ANI30/TI07/TO07

P42 7-1-1 Input port TI04/TO04

Notes 1. Digital or analog for each pin can be selected with the port mode control register x (PMCx) (can be set in 1-bit

units).

2. Digital or analog for each pin can be selected with the A/D port configuration register (ADPC).

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

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Function

Name

Type

I/O After Reset Alternate Function Function

P50 7-3-2 I/O Analog input

port

ANI26/INTP1 Port 5.

2-bit I/O port.

Output of P50 can be set to N-ch open-drain output (VDD

tolerance).

P50 and P51 can be set to analog input. Note 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by software

setting at input port.

P51 7-3-1 ANI25/INTP2

P70 7-3-1 I/O Analog input

port

ANI28/KR0/

SCK21/SCLKNote2

Port 7.

4-bit I/O port.

P70 can be set to analog input. Note 1

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by software

setting at input port.

P71 7-1-2 Input port

KR1/SI21/SDONote2

P72 7-1-1 KR2/SO21/SDINote2

P73 KR3/CSNote2

P121 2-2-1 Input Input port X1 Port 12.

2-bit input port.

P122 X2/EXCLK

P130 1-1-1 Output Output port − Port 13.

1-bit output port and 1-bit input port.

P137 2-1-2 Input Input port INTP0

P140 7-1-1 I/O Input port PCLBUZ0/INTP6 Port 14.

1-bit I/O port.

Input/output can be specified in 1-bit units.

Use of an on-chip pull-up resistor can be specified by a software

setting at input port.

RESET 2-1-1 Input − − Input only pin for external reset .

When external reset is not used, connect this pi n to VDD direct l y

or via a resistor.

Notes 1. Digital or analog for each pin can be selected with the port mode control register x (PMCx) (can be set in 1-bit

units).

2. SCLK, SDO, SDI, CS represent the pin functions of analog block. P70 to P73 which are connected to the pins of

the chip of analog block inside the package have some alternate functions for analog block.

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2. 1. 2 Functions other than port functions

2. 1. 2. 1 Functions available for each product

(1/3)

Function Name RL78/G1E

(64-pin) RL78/G1E

(80-pin) RL78/G1A

(64-pin)

ANI0 √ √ √

ANI1 √ √ √

ANI2 √ √ √

ANI3 √ √ √

ANI4 − √ √

ANI5 − − √

ANI6 − − √

ANI7 − − √

ANI8 − − √

ANI9 − − √

ANI10 − − √

ANI11 − − √

ANI12 − − √

ANI16 √ √ √

ANI17 √ √ √

ANI18 √ √ √

ANI19 − − √

ANI20 √ √ √

ANI21 √ √ √

ANI22 √ √ √

ANI23 √ √ √

ANI24 − √ √

ANI25 − √ √

ANI26 − √ √

ANI27 − − √

ANI28 √ √ √

ANI29 − − √

ANI30 √ √ √

INTP0 √ √ √

INTP1 − √ √

INTP2 − √ √

INTP3 − − √

INTP4 − − √

INTP5 − − √

INTP6 − √ √

INTP7 − − √

INTP8 − − √

INTP9 − − √

INTP10 − − √

INTP11 − − √

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(2/3)

Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection

Function Name RL78/G1E

(64-pin) RL78/G1E

(80-pin) RL78/G1A

(64-pin)

KR0 √ √ √

KR1 √ √ √

KR2 √ √ √

KR3 √ √ √

KR4 ( √ ) ( √ ) √

KR5 ( √ ) ( √ ) √

KR6 ( √ ) ( √ ) √

KR7 − ( √ ) √

KR8 − – √

KR9 − – √

PCLBUZ0 − √ √

PCLBUZ1 − – √

REGC √ √ √

RTC1HZ – – √

RESET √ √ √

RXD0 √ √ √

RXD1 √ √ √

RXD2 √ √ √

SCK00 √ √ √

SCK01 – – √

SCK10 – √ √

SCK11 – – √

SCK20 – √ √

SCK21 √ √ √

SCLA0 – – √

SCL00 √ √ √

SCL01 – – √

SCL10 – √ √

SCL11 – – √

SCL20 – √ √

SCL21 – – √

SDAA0 – – √

SDA00 √ √ √

SDA01 – – √

SDA10 – √ √

SDA11 – – √

SDA20 – √ √

SDA21 – – √

SI00 √ √ √

SI01 – – √

SI10 – √ √

SI11 – – √

SI20 – √ √

SI21 √ √ √

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Note EVDD0 is connected to VDD, and EVSS0 is connected to VSS inside the package.

Function Name RL78/G1E

(64-pin) RL78/G1E

(80-pin) RL78/G1A

(64-pin)

SO00 √ √ √

SO01 – – √

SO10 – √ √

SO11 – – √

SO20 – √ √

SO21 √ √ √

TI00 √ √ √

TI01 – – √

TI03 – – √

TI04 √ √ √

TI05 – – √

TI06 – – √

TI07 √ √ √

TO00 √ √ √

TO01 – – √

TO03 – – √

TO04 √ √ √

TO05 – – √

TO06 – – √

TO07 √ √ √

TxD0 √ √ √

TxD1 √ √ √

TxD2 √ √ √

X1 √ √ √

X2 √ √ √

EXCLK √ √ √

EXCLKS – – √

XT1 – – √

XT2 – – √

VDD √ √ √

EVDD0 –Note –

Note √

AVDD √ √ √

AVREFP √ √ √

AVREFM √ √ √

VSS √ √ √

EVSS0 –Note –

Note √

AVSS √ √ √

TOOLRxD √ √ √

TOOLTxD √ √ √

TOOL0 √ √ √

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2. 1. 2. 2 Description of each function

The functions of RL78/G1E (64-pin products and 80-pin products) are described below.

(1/2)

Function Name I/O Function

ANI0- ANI4, ANI16- ANI18,

ANI20- ANI26, ANI28, ANI30 Input A/D converter analog input

INTP0- INTP2, INTP6 Input External interrupt request input

KR0- KR7 Input Key interrupt input

PCLBUZ0 Output Clock output / buzzer output

REGC – Pin for connecting to regulator output stabilization capacitance for

internal operatio n.

Connect this pin to VSS via a capacitor (0.47 to 1

F).

Also, use a capacitor with good characteristics, since it is used to

stabilize internal voltage.

RESET Input External reset signal input for the functions of microcontroller block

RxD0- RxD2 Input Serial data input pins of serial interface UART0 to UART2

TxD0-TxD2 Output Serial data output pins of serial interface UART0 to UART2

SCK00, SCK10, SCK20, SCK21 I/O Serial clock I/O pins of serial interface CSI00, CSI10, CSI20 and

CSI21

SCL00, SCL10, SCL20 Output Serial clock output pins of serial interface IIC00, IIC10 and IIC20

SDA00, SDA10, SDA20 I/O Serial data I/O pins of serial interface IIC00, IIC10 and IIC20

SI00, SI10, SI20, SI21 Input Serial data input pins of serial interface CSI00, CSI10, CSI20 and

CSI21

SO00, SO10, SO20, SO21 Output Serial data output pins of serial interface CSI00, CSI10, CSI20 and

CSI21

TI00, TI04, TI07 Input The pins for inputting an external count clock/capture trigger to 16-bit

timers 00, 04 and 07

TO00, TO04, TO07 Output Timer output pins of 16-bit timers 00, 04 and 07

X1, X2 – Resonator connection for main system clock

EXCLK Input External clock inp ut for main s y stem clo ck

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Function Name I/O Function

VDD – < 64-pin products >

Positive power supply for port pins other than P20 to P23

and also for RESET, REGC pin.

< 80-pin products >

Positive power supply for port pins other than P20 to P24

and also for RESET, REGC pin.

AVDD – Positive power supply for P20 to P24 and A/D converter

AVREFP Input A/D converter reference potential (+ side) input

AVREFM Input A/D converter reference potential (− side) input

Make the potential of AVREFM pin the same as AVSS pin and VSS pin.

VSS – < 64-pin products >

Ground potential for port pins other than P20 to P23

and also for RESET, REGC pin.

< 80-pin products >

Ground potential for port pins other than P20 to P24

and also for RESET, REGC pin.

AVSS – Ground potential for P20 to P24 and A/D converter

Make the potential of AVSS pin the same as VSS pin.

TOOLRx D Input UART reception pin for the ex ternal device conne cti on used during

flash memory programming

TOOLTxD Output UART transmission pin for the external device connection used

during flash memory programming

TOOL0 I/O Data I/O for flash memory programmer / debugger

Caution After reset release, the relationships between P40/TOOL0 and the operating mode are as follows.

Table 2-2. Relationship Between P40/TOOL0 and Operation Mode After Reset Release

P40/TOOL0 Operating Mode

VDD Normal operation mode

0 V Flash memory programming mode

For details, see 3. 25. 4 Serial programming method.

Remark Use bypass capacitors (about 0.1 μF) as noise and latch up countermeasures with relatively thick wires at

the shortest distance to VDD to VSS line.

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2. 2 Pin Functions in Analog Block

About I/O circuit type, see 2. 4 Block Diagrams of Pins.

2. 2. 1 64-pin products

Function Name I/O Circuit

Type I/O Function

AVDD3 – − P ower suppl y pi n f o r filter

AGND2 – − GND pin for gain adjustment amplifier

MPXIN60 ANALOG6 Input Multiplexer 6 input pin 0 (Configurable am pl if i er Ch3 i nput pin 0 (+))

MPXIN50 ANALOG6 Mult i pl exer 5 input pin 0 (Confi gurabl e am pl ifi er Ch3 i nput pin 0 (-))

AMP3_OUT ANALOG10 Output Conf i gurabl e am pl ifi er Ch3 output pin

DAC3_OUT/

VREFIN3 ANALOG2 I/O D/A converter Ch3 output pin/configurable ampl i fier Ch3 reference voltage input pin

AMP2_OUT ANALOG11 Output Conf i gurabl e am pl ifi er Ch2 output pin

AGND1 – − GND pin for configurable amplif i ers Ch1 to Ch3.

AMP1_OUT ANALOG11 Output Conf i gurabl e am pl ifi er Ch1 output pin

AVDD1 – − P ower supply pi n for configurable amplifiers Ch1 to Ch3

DAC2_OUT/

VREFIN2 ANALOG2 I/O D/A converter Ch2 output pin/configurable amplifier Ch2 reference voltage input pin

DAC1_OUT/

VREFIN1 ANALOG2 D/A converter Ch1 output pin/c onfigurable ampl i fier Ch1 reference voltage input pin

MPXIN41 ANALOG6 Input Multiplexer 4 input pin 1 (Configurable am pl if i er Ch2 i nput pin 1 (+))

MPXIN31 ANALOG6 Mult i pl exer 3 input pin 1 (Confi gurabl e am pl ifi er Ch2 i nput pin 1 (-))

MPXIN40 ANALOG6 Mult i pl exer 4 input pin 0 (Configurabl e amplifier Ch2 input pin 0 (+))

MPXIN30 ANALOG6 Mult i pl exer 3 input pin 0 (Confi gurabl e am pl ifi er Ch2 i nput pin 0 (-))

MPXIN21 ANALOG6 Mult i pl exer 2 input pin 1 (Configurabl e amplifier Ch1 input pin 1 (+))

MPXIN11 ANALOG6 Mult i pl exer 1 input pin 1 (Confi gurabl e am pl ifi er Ch1 i nput pin 1 (-))

MPXIN20 ANALOG6 Mult i pl exer 2 input pin 0 (Configurabl e amplifier Ch1 input pin 0 (+))

MPXIN10 ANALOG6 Mult i pl exer 1 input pin 0 (Confi gurabl e am pl ifi er Ch1 i nput pin 0 (-))

AGND3 – − GND pin for variable output volt age regulator and reference voltage generator

BGR_OUT ANALOG9 Output Reference volt age generat or output pin

AVDD2 – − P ower supply pi n for variable output voltage regulator and reference voltage generator

LDO_OUT ANALOG3 Output Variable output voltage regulator output pi n

TEMP_OUT ANALOG4 Output Temperature sensor output pin

ARESET ANALOG5 Input External reset signal input for the functions of analog block

DVDD – − Power supply pin for SPI

SCLK ANALOG8 Input Serial cl ock input pi n for SPI

SDO ANALOG12 Output Serial data output pin for SPI

SDI ANALOG8 Input Serial data input pin for SPI

CS ANALOG8 Input Chip sel ect input pin for SPI

DGND – − GND pin for SPI

DAC4_OUT/

VREFIN4 ANALOG13 I/O D/A converter Ch4 output pin/gain adjustment amplifier, filter reference vol t age input pin

CLK_LPF ANALOG7 Input Pin for inputting low-pass filter control clock

AGND4 – − GND pin for filter

LPF_OUT ANALOG1 Output Low-pass filter output pin

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2. 2. 2 80-pin products

Function Name I/O Circuit

Type I/O Function

AVDD3 – − Power supply pin for filter

SC_IN ANALOG6 Input Input pin for filter signal processing

CLK_SYNCH ANALOG7 Input Pin for inputting synchronous detector control clock

SYNCH_OUT ANALOG11 Output Synchronous detector output pin

AGND2 – − GND pin for gain adjustment amplifier

GAINAMP_OUT ANALOG10 Output Output pin for gain adjustment amplifier

GAINAMP_IN ANALOG6 Input Input pin for gain adjustm ent amplifier

MPXIN61 ANALOG6 Input Multiplexer 6 input pin 1 (Configurabl e amplifier Ch3 input pin 1 (+))

MPXIN51 ANALOG6 Multiplexer 5 input pin 1 (Configurabl e am pl if i er Ch3 i nput pin 1 (-))

MPXIN60 ANALOG6 Multiplexer 6 input pin 0 (Configurabl e am pl ifi er Ch3 i nput pi n 0 (+))

MPXIN50 ANALOG6 Multiplexer 5 input pin 0 (Configurabl e am pl if i er Ch3 i nput pin 0 (-))

AMP3_OUT ANALOG10 Output Conf i gurabl e am pl ifi er Ch3 output pin

DAC3_OUT/

VREFIN3 ANALOG2 I/O D/A converter Ch3 output pin/configurable amplifier Ch3 reference voltage input pin

AMP2_OUT ANALOG11 Output Conf i gurabl e am pl ifi er Ch2 output pin

AGND1 – − GND pin for configurable amplifiers Ch1 to Ch3

AMP1_OUT ANALOG11 Output Conf i gurabl e am pl ifi er Ch1 output pin

AVDD1 – − Power supply pin for configurable amplif i ers Ch1 to Ch3

DAC2_OUT/

VREFIN2 ANALOG2 I/O D/A converter Ch2 output pin/configurable amplifier Ch2 reference voltage input pin

DAC1_OUT/

VREFIN1 ANALOG2 D/A convert er Ch1 output pin/configurable amplifier Ch1 ref erence voltage input pin

MPXIN41 ANALOG6 Input Multiplexer 4 input pin 1 (Configurabl e amplifier Ch2 input pin 1 (+))

MPXIN31 ANALOG6 Multiplexer 3 input pin 1 (Configurabl e am pl if i er Ch2 i nput pin 1 (-))

MPXIN40 ANALOG6 Multiplexer 4 input pin 0 (Configurabl e am pl ifi er Ch2 i nput pi n 0 (+))

MPXIN30 ANALOG6 Multiplexer 3 input pin 0 (Configurabl e am pl if i er Ch2 i nput pin 0 (-))

MPXIN21 ANALOG6 Multiplexer 2 input pin 1 (Configurabl e am pl ifi er Ch1 i nput pi n 1 (+))

MPXIN11 ANALOG6 Multiplexer 1 input pin 1 (Configurabl e am pl if i er Ch1 i nput pin 1 (-))

MPXIN20 ANALOG6 Multiplexer 2 input pin 0 (Configurabl e am pl ifi er Ch1 i nput pi n 0 (+))

MPXIN10 ANALOG6 Multiplexer 1 input pin 0 (Configurabl e am pl if i er Ch1 i nput pin 0 (-))

AGND3 – − GND pin for variable output voltage regulator and reference voltage generator

BGR_OUT ANALOG9 Output Referenc e vol tage generator output pin

AVDD2 – − Power supply pin for variable output volt age regul ator and ref erence voltage generator

LDO_OUT ANALOG3 Output Variable out put voltage regulator output pin

TEMP_OUT ANALOG4 Output Temperature sensor output pin

ARESET ANALOG5 Input External reset signal input for the functions of analog block

DVDD – − Power supply pin for SPI

SCLK ANALOG8 Input Serial clock input pin for SPI

SDO ANALOG12 Output Serial data output pin for SPI

SDI ANALOG8 Input Serial data input pin for SPI

CS ANALOG8 I nput Chip sel ect input pin for SPI

DGND – − GND pin for SPI

DAC4_OUT/

VREFIN4 ANALOG13 I/O D/A convert er Ch4 out put pi n/gain adjustm ent amplifier, filter reference vol t age i nput pi n

HPF_OUT ANALOG1 Output High-pass filter output pin

CLK_HPF ANALOG7 Input Pin for i nputt i ng hi gh-pass f ilt er control cl ock

CLK_LPF ANALOG7 Input Pin for inputting low-pass filter control clock

AGND4 – − GND pin for filter

LPF_OUT ANALOG1 Output Low-pass filter output pin

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2. 3 Connection of Unused Pins

Table 2-3 shows the recommended connections of unused pins.

Remark The provided pins differ depending on the products. See 1. 3 Pin Configuration (Top View), 2. 1 Pin

Functions in Microcontroller Block, and 2. 2 Pin Functions in Analog Block.

Table 2-3. Connections of Unused Pins

(1/2)

Pin Name I/O Recommended Connection of Unused Pins

P00 I/O I nput : Independently connect to VDD or VSS via a resistor.

Output: Leave open

P01 I/O

P02 I/O

P03 I/O

P04 I/O

P10 I/O

P11 I/O

P12 I/O

P13 I/O

P14 I/O

P15 I/O

P20 I/O Input: Independently connect to AVDD or AVSS via a resistor.

Output: Leave open

P21 I/O

P22 I/O

P23 I/O

P24 I/O

P40 I/O I nput : Independently connect to VDD via a resistor, or leave open.

Output: Leave open

P41 I/O I nput : Independently connect to VDD or VSS via a resistor.

Output: Leave open

P42 I/O

P50 I/O

P51 I/O

P70 I/O

P71 I/O

P72 I/O

P73 I/O

P121 Input Independently connect to VDD or VSS via a resistor.

P122 Input

P130 Output Leave open

P137 Input Independently connect to VDD or VSS via a resistor.

P140 I /O Input: Independently c onnect to VDD or VSS via a resistor.

Output: Leave open

RESET Input Connect directly or via a resistor to VDD.

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(2/2)

Pin Name I/O Recommended Connection of Unused Pins

SC_IN Input Connect to AGND4.

CLK_SYNCH Input Leave open

SYNCH_OUT Output

GAINAMP_OUT Output

GAINAMP_IN Input Connect to AGND2.

MPXIN61 Input Connect to AGND1.

MPXIN51 Input

MPXIN60 Input

MPXIN50 Input

AMP3_OUT Output Leave open

DAC3_OUT/

VREFIN3 I/O Leave open

AMP2_OUT Output Leave open

AMP1_OUT Output Connect to AGND1.

DAC2_OUT/

VREFIN2 I/O Leave open

DAC1_OUT/VREFIN1 I/O

MPXIN41 Input Connect to AGND1.

MPXIN31 Input

MPXIN40 Input

MPXIN30 Input

MPXIN21 Input

MPXIN11 Input

MPXIN20 Input

MPXIN10 Input

TEMP_OUT Output Leave open

SCLK Input

SDO Output

SDI Input

CS Input

DAC4_OUT/

VREFIN4 I/O

HPF_OUT Output

CLK_HPF Input

CLK_LPF Input

LPF_OUT Output

LDO_OUT Output

BGR_OUT Output

I.C −

ARESET Input

− Note

Note When the resource pin for ARESET is to be Hi-Z, connect ARESET to DGND via a resistor.

For details of functions, see 2. 5. 31 ARESET.

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2. 4 Block Diagrams of Pins

Figures 2-1 to 2-12 show the block diagrams of the pins described in 2. 1. 1 Port functions.

Figure 2-13 shows the I/O circuit type described in 2. 2 Pin Functions in Analog Block.

Figure 2-1. Pin Block Diagram for Pin Type 1-1-1

PORT

(

Pmn

)

Pmn

P-ch

N-ch

Internal bus

Output latch

Figure 2-2. Pin Block Diagram for Pin Type 2-1-1

RESET RESET

Figure 2-3. Pin Block Diagram for Pin Type 2-1-2

Pmn

Alternate

function

Internal bus

Remark For alternate functions, see 2. 1. 1 Port functions.

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Figure 2-4. Pin Block Diagram for Pin Type 2-2-1

N-ch P-ch

Cl ock generator

Alternate

function

P122/X2/EXCLK/Alternate function

P121/X1/Alternate function

CMC

OSCSEL

CMC

EXCLK, OSCSEL

Internal bus

Alternate

function

Remark For alternate functions, see 2. 1. 1 Port functions.

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Figure 2-5. Pin Block Diagram for Pin Type 4-3-1

Pmn

PORT

ADPC2 to A DPC0

ADPC

P-ch

N-ch

P-ch

N-ch

PM register

(PMmn)

A/D converter

Output latch

(Pmn)

0: A nal og i nput

1: Digital I/O

Internal bus

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Figure 2-6. Pin Block Diagram for Pin Type 7-1-1

WRPORT

WRPM

WRPU

Pmn

P-ch

VDD

P-ch

VDD

N-ch

Internal bus

Output latch

(Pmn)

PU register

(PUmn)

Alternate

function

PM register

(PMmn)

Alternate function

(SAU)

Alternate function

(other than SAU )

VSS

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-7. Pin Block Diagram for Pin Type 7-1-2

WRPORT

WRPM

WRPU

Pmn

P-ch

VDD

N-ch

P-ch

VDD

Internal bus

Alternate

function

PU register

(PUmn)

Output latch

(Pmn)

PM register

(PMmn)

Alternate function

(SAU)

Alternate function

(other than SAU )

VSS

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-8. Pin Block Diagram for Pin Type 7-3-1

PORT

PMC

P-ch

N-ch

Pmn

P-ch

N-ch

A/D converter

PU register

(PUmn)

PMC register

(PMCmn)

Alternate

function

Output latch

(Pmn)

PM register

(PMmn)

Al ternate func ti on

(SAU)

Alternate function

(other than SAU)

Internal bus

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-9. Pin Block Diagram for Pin Type 7-3-2

WRPORT

WRPM

WRPMC

WRPU

WRPOM

P-ch

Pmn

P-ch

N-ch

P-ch

N-ch

POM register

(POMmn)

VDD

VSS

A/D converter

PU register

(PUmn)

PMC register

(PMCmn)

Alternate

function

Output latch

(Pmn)

PM register

(PMmn)

Alternate function

(SAU)

Alternate function

(other than SAU)

Internal bus

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-10. Pin Block Diagram for Pin Type 8-1-1

PORT

CMOS

TTL

PIM

P-ch

Pmn

P-ch

N-ch

PU register

(PUmn)

PIM regi s t er

(PIMmn)

Alternate

function

Internal bus

Output latch

(Pmn)

Alternate function

(SAU)

Alternate function

(other than SAU)

PM register

(PMmn)

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-11. Pin Block Diagram for Pin Type 8-1-2

PORT

POM

CMOS

TTL

PIM

Pmn

P-ch

N-ch

P-ch

POM register

(POMmn)

PU register

(PUmn)

PIM register

(PIMmn)

Alternate

function

Output latch

(Pmn)

PM register

(PMmn)

Alternate function

(SAU)

Alternate function

(other than SAU)

Internal bus

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-12. Pin Block Diagram for Pin Type 8-3-2

PORT

PMC

POM

P-ch

CMOS

TTL

PIM

Pmn

P-ch

N-ch

P-ch

N-ch

A/D converter

PU register

(PUmn)

PIM register

(PMCmn)

Alternate

function

Internal bus

Output latch

(Pmn)

PM register

(PMmn)

Alternate function

(SAU)

Alternate function

(other than SAU)

PMC register

(PMCmn)

POM register

(POMmn)

Remarks 1. For alternate functions, see 2. 1. 1 Port functions.

2. SAU: Serial array unit

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Figure 2-13. Pin I/O Circuit List (1/2)

ANALOG1 ANALOG2

DD3

OUT

AGND4

AVDD1

IN/OUT

AGND1

ANALOG3 ANALOG4

OUT

DD2

AGND3 AGND3

AVDD2

OUT

AGND3 AGND3

ANALOG5 ANALOG6

Schmitt-triggered input with hysteresis characteristics

ANALOG7 ANALOG8

AVDD3

AGND4 AGND4

DGND

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Figure 2-13. Pin I/O Circuit List (2/2)

ANALOG9 ANALOG10

OUT

AVDD2

AGND3

DD1

OUT

AGND1

ANALOG11 ANALOG12

OUT

DGND

ANALOG13

AVDD2

AGND3

IN/OUT

AGND3

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2. 5 Instruction of Pin Functions

Remark The pins mounted depend on the product. See 1. 3 Pin Configuration (Top View), 2. 1 Pin Functions in

Microcontroller Block, and 2. 2 Pin Functions in Analog Block.

2. 5. 1 Port 0 (P00 to P04)

(1) Port mode

P00 to P04 function as an I/O port. P00 to P04 can be set to input or output port in 1-bit units using port mode register

0 (PM0).

(2) Control mode

P00 to P04 function as A/D converter analog input, serial interface data I/O, clock I/O, and key return input.

(a) ANI16, ANI17

These are the analog input pins of A/D converter.

(b) SI10

This is a serial data input pin of serial interface CSI10.

This is a serial data output pin of serial interface CSI10.

(d) SCK10

This is a serial clock I/O pin of serial interface CSI10.

(e) TxD1

This is a serial data output pin of serial interface UART1.

(f) RxD1

This is a serial data input pin of serial interface UART1.

(g) SDA10

This is a serial data I/O pin of serial interface IIC10.

(h) SCL10

This is a serial clock output pin of serial interface IIC10.

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(i) TI00

This is a pin for inputting an external count clock/capture trigger to 16-bit timer 00.

(j) TO00

This is the timer output pin of 16-bit timer 00.

(k) KR0 to KR4

These are the key interrupt input pins.

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2. 5. 2 Port 1 (P10 to P15)

(1) Port mode

P10 to P15 function as an I/O port. P10 to P15 can be set to input or output port in 1-bit units using port mode register

1 (PM1).

(2) Control mode

P10 to P15 function as A/D converter analog input, serial interface data I/O, clock I/O, and programming UART I/O.

(a) ANI18, ANI20 to ANI24

These are the analog input pins of A/D converter.

(b) TxD0, TxD2

These are the serial data output pins of serial interface UART0 and UART2.

These are the serial data input pins of serial interface UART0 and UART2.

(d) SCK00, SCK20

These are the serial clo ck I/O pins of serial interf ac e CSI00 a nd CSI20.

(e) SI00, SI20

These are the serial data input pins of serial inter f ac e CSI00 and CSI2 0.

(f) SO00, SO20

These are the serial data output pins of serial interface CSI00 and CSI20.

(g) TOOLTxD

This UART serial data output pin for an external device connection is used during flash memory programming.

(h) TOOLRxD

This UART serial data input pin for an external device connection is used during flash memory programming.

(i) SDA00, SDA20

These are the serial data I/O pins of serial interfa ce IIC00 an d IIC20.

(j) SCL00, SCL20

These are the serial clock output pins of serial interface IIC00 and IIC20.

(k) KR0 to KR5

These are the key interrupt input pins.

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2. 5. 3 Port 2 (P20 to P24)

(1) Port mode

P20 to P24 function as an I/O port. P20 to P24 can be set to input or output port in 1-bit units using port mode register

2 (PM2).

(2) Control mode

P20 to P24 function as A/D converter analog input, and reference voltage input.

(a) ANI0 to ANI4

These are the analog input pins of A/D converter.

(b) AVREFP

This is a pin that inputs the A/D converter reference potential (+ side).

This is a pin that inputs the A/D converter reference potential (− side).

(d) KR5 to KR7

These are the key interrupt input pins.

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2. 5. 4 Port 4 (P40 to P42)

(1) Port mode

P40 to P42 function as an I/O port. P40 to P42 can be set to input or output port in 1-bit units using port mode register

4 (PM4).

(2) Control mode

P40 to P42 function as A/D converter analog input, data I/O for a flash memory programmer/debugger, and timer I/O.

(a) TI04, TI07

These are the pins for inputting an external count clock/capture trigger to 16-bit timers 04 and 07.

(b) TO04, TO07

These are the timer output pins from 16-bit timers 04 and 07.

This is a data I/O pin for a flash memory programmer/debugger.

Be sure to pull up this pin externally when on-chip debugging is enabled (pulling it down is prohibited).

(d) ANI30

This is an analog input pin of A/D converter .

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2. 5. 5 Port 5 (P50, P51)

(1) Port mode

P50 and P51 function as an I/O port. P50 and P51 can be set to input or output port in 1-bit units using port mode

(2) Control mode

P50 and P51 function as A/D converter analog input, and external interrupt request input.

(a) ANI25, ANI26

These are the analog input pins of A/D converter.

(b) INTP1, INTP2

These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both

rising and falling edges) can be specified.

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2. 5. 6 Port 7 (P70 to P73)

(1) Port mode

P70 to P73 function as an I/O port. P70 to P73 can be set to input or output port in 1-bit units using port mode register

7 (PM7).

(2) Control mode

P70 to P73 function as key interrupt input, A/D converter analog input, serial interface data I/O, and clock I/O.

(a) ANI28

This is the analog input pin of A/D converter .

(b) KR0 to KR2

These are the key interrupt input pins.

This is the serial data input pin of serial interface CSI21.

(d) SO21

This is the serial data output pin of serial interface CSI21.

(e) SCK21

This is the serial clock I/O pin of serial interface CSI21.

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2. 5. 7 Port 12 (P121, P122)

(1) Port mode

P121 and P122 function as an input port.

(2) Control mode

P121 and P122 function as connecting resonator for main system clock, and external clock input for main system

clock.

(a) X1, X2

These are the pins for connecting a resonator for main system clock.

This is an external clock input pin for main system clock.

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2. 5. 8 Port 13 (P130, P137)

(1) Port mode

P130 functions as an output port.

P137 functions as an input port.

(2) Control mode

P137 functions as external interrupt request input.

(a) INTP0

This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and

falling edges) can be specified.

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2. 5. 9 Port 14 (P140)

(1) Port mode

P140 functions as an I/O port. P140 can be set to input or output port in 1-bit units using port mode register 14

(PM14).

(2) Control mode

P140 functions as clock/buzzer output, and external interrupt request input.

(a) INTP6

This is the external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising

and falling edges) can be specified.

(b) PCLBUZ0

This is the clock/buzzer output pin.

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2. 5. 10 AVDD, AVSS, VDD, VSS

(a) AVDD

This is the A/D converter reference voltage input pin and the positive power supply pin of P20 to P24, and A/D

converter.

(b) AVSS

This is the A/D converter ground potential pin. Even when the A/D converter is not used, always use this pin with

the same potential as the VSS pin.

This is the positive power supply pin.

(d) VSS

This is the ground potential pin.

Remark Use bypass capacitors (about 0.1

F) as noise and latch up countermeasures with relatively thick wires at

the shortest distance to VDD to VSS line.

2. 5. 11 RESET

This is the active-low system reset input pin for the functions of microcontroller block. When the external reset pin is not

used, connect this pin directly or via a resistor to VDD. W hen the external reset pin is used, design the circuit based on

VDD. For details of the functions, see 3. 5. 5 Clock generator operation, 3. 19 Reset Function, 3. 20 Power-On-

Reset Circuit.

2. 5. 12 REGC

This is the pin for connecting regulator output stabilization capacitance for internal operation. Connect this pin to VSS via

a capacitor (0.47 to 1

F).

Also, use a capacitor with good characteristics, since it is used to stabilize internal voltage.

REGC

VSS

Caution Keep the wiring length as short as possible for the broken-line part in the above figure.

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2. 5. 13 AVDD3

This is the power supply pin for high-pass filterNote and low-pass filter.

2. 5. 14 SC_IN

This is the input pin for filter signal processing.

2. 5. 15 CLK_SYNCH

This is the pin for inputting synchronous detector control clock.

2. 5. 16 SYNCH_OUT

This is the synchr ono us dete ct or output pin.

2. 5. 17 AGND2

This is the ground pin for gain adjustment amplifier.

2. 5. 18 GAINAMP_OUT

This is the output pin for gain adjustment amplifier.

2. 5. 19 GAINAMP_IN

This is the input pin for gain adjustment amplifier.

2. 5. 20 MPXIN10, MPXIN11, MPXIN20, MPXIN21, MPXIN30, MPXIN31, MPXIN40, MPXIN41, MPXIN50, MPXIN51,

MPXIN60, MPXIN61

These are the input pins for multiplexer.

2. 5. 21 AMP1_OUT, AMP2_OUT, AMP3_OUT

These are the output pins for configurable amplifiers Ch1 to Ch3.

2. 5. 22 DAC1_OUT, DAC2_OUT, DAC3_OUT, DAC4_OUT

These are the output pins for D/A converters Ch1 to Ch4.

2. 5. 23 VREFIN1, VREFIN2, VREFIN3, VREFIN4

These are the reference voltage input pins for configurable amplifiers Ch1 to Ch3, gain adjustment amplifier, low-pass

filer, and high-pass filterNote.

Note 80-pin products only

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2. 5. 24 AGND1

This is the ground pin for configurable amplifiers Ch1 to Ch3.

2. 5. 25 AVDD1

This is the power supply pin for configurable amplifiers Ch1 to Ch3.

2. 5. 26 AGND3

This is the GND pin for variable output voltage regulator and reference voltage generator.

2. 5. 27 BGR_OUT

This is the output pin for reference voltage generator.

2. 5. 28 AVDD2

This is the power supply pin for variable output voltage regulator and reference voltage generator.

2. 5. 29 LDO_OUT

This is the output pin for variable output voltage regulator.

2. 5. 30 TEMP_OUT

This is the output pin for temperature sensor.

2. 5. 31 ARESET

This is the active-low system reset input pin for the function of analog block. After turning on DVDD, it is necessary to

input the external reset signal to this pin before starting SPI communication. W hen controlling the external reset signal

by the microcontroller block of this package, it is recommended to directly connect this pin to P130 which is to be a low-

level output port on reset. If the resource pin of ARESET is to be Hi-Z at a short moment, this pin must be connected to

DGND via a resistor. For details of the functions, see 4. 10 Analog Reset.

2. 5. 32 DVDD

This is the power supply pin for SPI.

2. 5. 33 SCLK

This is the serial clock input pin for SPI.

2. 5. 34 SDO

This is the serial data output pin for SPI.

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2. 5. 35 SDI

This is the serial data input pin for SPI.

2. 5. 36 CS

This is the chip select input pin for SPI.

2. 5. 37 DGND

This is the GND pin for SPI.

2. 5. 38 HPF_OUT

This is the output pin for high-pass filter.

2. 5. 39 CLK_HPF

This is the control clock input pin for high-pass filter.

2. 5. 40 CLK_LPF

This is the control clock input pin for low-pass filter.

2. 5. 41 AGND4

This is the GND pin for low-pass filter and high-pass filter.

2. 5. 42 LPF_OUT

This is the output pin for low-pass filter.

2. 5. 43 I.C

The I.C (internally connected) pin has no function and is simply connected inside the chip. This pin must always be left

open.

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CHAPTER 3 MICROCONTROLLER BLOCK

3. 1 Outline of This Chapter

The 16-bit microcontroller block in the RL78/G1E corresponds to the RL78/G1A (64-pin products). For the details of

each function in microcontroller block, see the RL78/G1A Hardware User’s Manual (R01UH0305E).

Not all of the functions of the RL78/G1A are available to be used in the RL78/G1E package because not all pins of

function are drawn out of the package. In this chapter, the differences in functions and registers between the RL78/G1A

and the RL78/G1E are described.

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3. 2 Comparison of Each Function with RL78/G1A (64-pin products)

The differences of each function between RL78/G1E (64-pin products, 80-pin products) and RL78/G1A (64-pin

products) are as follows. For details, see the section showed in column of Remarks in the tables below.

(1/4)

Item RL78/G1E RL78/G1A

(64-pin products)

Remarks

64-pin products 80-pin produc ts

Code flash memory (KB ) 32 to 64 32 to 64 32 to 64 See the section 3. 3

about details.

Data flash memory (KB) 4 4 4

RAM (KB) 2 to 4 2 to 4 2 to 4

Memory space 1 MB 1 MB

Process or registers Control registers; PC, PSW, SP Cont rol regis ters; PC, PSW, SP

General-purpose regist er;

(8-bit register × 8) × 4 banks

General-purpose regist er;

(8-bit register × 8) × 4 banks

Special function regis t ers (SFRs ) Special functi on registers (SFRs) Some differences.

See the section 3. 3

about details.

Extended special funct i on regis t ers

(2nd SFRs)

Extended special funct i on regis t ers

(2nd SFRs)

I/O port Total 24 30 56 Some diff erences.

See the section 3. 4

about details.

COMS I/O 20 26 46

COMS input 3 5

COMS output 1 1

N-ch open-

drain I/O (6 V

tolerance)

– 4

Main

system

clock

High-speed

system cl ock

X1 (crystal/ceramic) oscillation,

external main syst em c l ock i nput

(EXCLK)

1 to 20 MHz: VDD = 2.7 to 5.5 V,

1 to 8 MHz: VDD = 1.8 to 2.7 V,

1 to 4 MHz: VDD = 1.6 to 1.8 V

X1 (crystal/ceramic) oscillation, external

main system clock input (EXCLK)

1 to 20 MHz: VDD = 2.7 to 3.6 V,

1 to 8 MHz: VDD = 1.8 to 2.7 V,

1 to 4 MHz: VDD = 1.6 to 1.8 V

There are some

differenc es between

RL78/G1E and

RL78/G1A.

See the section 3. 5

about details.

Subsyst em cl ock is

not available for

RL78/G1E.

High-speed

on-chip

oscillator

HS (High-speed main) mode:

1 to 32 MHz (VDD = 2.7 to 5.5 V),

HS (High-speed main) mode:

1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (Low-speed main) mode:

1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (Low-voltage main) mode:

1 to 4 MHz (VDD = 1.6 to 5.5 V)

HS (High-speed main) mode:

1 to 32 MHz (VDD = 2.7 to 3.6 V),

HS (High-speed main) mode:

1 to 16 MHz (VDD = 2.4 to 3.6 V),

LS (Low-speed main) mode:

1 to 8 MHz (VDD = 1.8 to 3.6 V),

LV (Low-voltage main) mode:

1 to 4 MHz (VDD = 1.6 to 3.6 V)

Subsyst em cl ock − XT1 (crystal ) oscillation, external

subsystem clock input (EXCLKS)

32.768 kHz (TYP.): V DD = 1.6 to 3.6 V

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(2/4)

Item RL78/G1E RL78/G1A

(64-pin products)

Remarks

64-pin products 80-pin products

Low-speed on-chip

oscillator

15 kHz (TYP.): VDD = 1.6 to 5.5 V 15 kHz (TYP.): VDD = 1.6 to 3.6 V S om e dif f erences.

See the section 3. 5

about details.

Subsyst em cl ock is

not available for

RL78/G1E.

Minimum i n struction

execution time

0.03125

s (High-speed on-chip

oscillator: fIH = 32 MHz operation)

0.03125

s (High-speed on-chip

oscillator: fIH = 32 MHz operation)

0.05

s (High-s peed system clock:

fMX = 20 MHz operation)

0.05

s (High-s peed system clock:

fMX = 20 MHz operation)

− 30.5

s (Subsystem clo c k:

fSUB = 32.768 kHz operation)

Timer 16-bit timer 8 channels 8 channels Some differences.

See the section 3. 6

about details.

Watchdog

Timer

1 channel 1 channel S ee t he section 3. 10

about details.

Real-time clock

(RTC)

− 1 channel RTC is not provided

in RL78/G1E.

(See 3. 7)

12-bit Interval

time r (I T)

1 channel 1 channel S ee t he section 3. 8

about details.

Timer output 3 channels (PWM outputs: 2 Not e) 7 channels (PWM outputs: 6 Note) See the section 3. 6

about details.

RTC output − 1 channel

• 1 Hz (subsystem clock :

fSUB = 32.768 kHz)

RTC is not provided

in RL78/G1E.

(See 3. 7)

Note The number of PWM outputs varies depending on the setting of channels in use.

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(3/4)

Item RL78/G1E RL78/G1A

(64-pin products)

Remarks

64-pin products 80-pin products

Clock output

/ Buzzer out put

− 1 c hannel 2 channels There are some

differenc es between

RL78/G1E and

RL78/G1A.

See the section 3. 9

about details.

• 2.44 kHz, 4.88 kHz,

9.76 kHz, 1.25 MHz,

2.5 MHz, 5 MHz,

10 MHz

(Main system clock:

fMAIN = 20 MHz operation)

• 2.44 kHz, 4.88 kHz,

9.76 kHz, 1.25 MHz,

2.5 MHz, 5 MHz,

10 MHz (Main system

clock: fMAIN = 20 MHz

operation)

• 256 Hz, 512 Hz,

1.024 kHz, 2.048 kHz,

4.096 kHz, 8.192 kHz,

16.384 kHz, 32.768 kHz

(Subsys tem clock :

fSUB = 32.768 kHz

operation)

8/12-bit resolution

A/D converter

(AVDD = 1.6 to 3.6 V)

13 channels 17 channels 28 channels Some differences.

See the section 3. 11

about details.

Serial array unit <Unit 0>

• CSI: 1 channel/

simplified I2C:

1 channel/

UART: 1 channel

• UART: 1 channel

• CSI: 1 channel/

UART: 1 channel

(LIN-bus supported)

• CSI: 1 channel/

simplified I2C:

1 channel/

UART: 1 channel

• CSI: 1 channel/

simplified I2C:

1 channel/

UART: 1 channel

• CSI: 2 channel/

simplified I2C:

1 channel/

UART: 1 channel

(LIN-bus supported)

• CSI: 2 channel/

simplified I2C:

2 channel/

UART: 1 channel

• CSI: 2 channel/

simplified I2C:

2 channel/

UART: 1 channel

• CSI: 2 channel/

simplified I2C:

2 channel/

UART: 1 channel

(LIN-bus supported)

Some diff erences.

See the section 3. 12

about details.

2C bus – 1 channel Not provi ded i n

RL78/G1E.

(See 3. 13)

Multiplier and di vider/

multiply accumulator 5 functions

(Multiplier, divider, multiply accumulator) 5 functions

(Multiplier, divider,

multiply accumulator)

See the section 3. 14

about details.

DMA controll er 2 channels 2 channels See the section 3. 15

about details.

Vectored

interrupt

sources

Internal 25 27 Some differences.

See the section 3. 16

about details.

External 2 5 13

Key interrupt 4 (7)Note c hannels 4 (8)Note channels 10 channels Some diff erences.

See the section 3. 17

about details.

Note Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register

(PIOR).

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(4/4)

Item RL78/G1E RL78/G1A

(64-pin products)

Remarks

64-pin products 80-pin produc ts

Standby function HALT, STOP, SNOOZE mode HALT, STOP, SNOOZE mode See 3. 18.

Reset functi on 7 reset source 7 reset source See 3. 19.

Power-on-reset ci rcuit Power-on-res et: 1.51 +/- 0.03V

Power-down-reset: 1.50 +/- 0.03V

Power-on-reset: 1.51 +/ - 0.03V

Power-down-reset: 1.50 +/- 0.03V

See 3. 20.

Voltage detect or Detection l evel : 3 stages Detection level: 12 stages Some differences.

See the section 3. 21

about details.

Safety funct i ons - Flash m emory CRC operat i on function

- CRC operation funct i on

- RAM parity error detection function

- RAM guard function

- SFR guard function

- Invalid m emory acc ess det ection

function

- Frequency detecti on functi on

- A/D test function

- Flash memory CRC operation funct i on

- CRC operation funct i on

- RAM parity error detection function

- RAM guard function

- SFR guard function

- Invalid m emory acc ess det ection

function

- Frequency detecti on functi on

- A/D test function

Some diff erences.

See the section 3. 22

about details.

Regulator 1 channel 1 channel See 3. 23

Option byte Available Available

Some diff erences.

See the section 3. 24

about details.

Flash memory Available Available Som e differences.

See the section 3. 25

about details.

On-chip debug function Available Available See 3. 26

BCD correcti on circuit Available A vail abl e See 3. 27

Instr u ction se t • Data transfer (8/16 bits)

• Adder and subtractor/logical operation

(8/16 bits)

• Multiplication (8 bits × 8 bits)

• Rotate, barrel shift,

and bit manipulation (Set, reset, test,

and Boolean operation), etc.

• Data transfer (8/16 bits)

• Adder and subtractor / logical operation

(8/16 bits)

• Multiplication (8 bits × 8 bits)

• Rotate, barrel shift, and bit

manipulati on (Set, reset , t est, and

Boolean operation), etc.

See 3. 28

Power supply volt age VDD = 1.6 to 5.5 V VDD = 1.6 to 3.6 V VDD range is

different.

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3. 3 CPU Architecture

In this section, the differences of the functions and registers from RL78/G1A (64-pin products) are described. For

details, see CHAPTER 3 CPU ARCHITECURE in RL78/G1A Hardware User’s Manual (R01UH0305E).

3. 3. 1 Memory space

See 3. 1 Memory Space in RL78/G1A Hardware User’s Manual (R01UH0305E).

3. 3. 2 Processor registers

3. 3. 2. 1 Control registers

See 3. 2. 1 Control registers in RL78/G1A Hardware User’s Manual (R01UH0305E).

3. 3. 2. 2 General-purpose registers

See 3. 2. 2 General-purpose registers in RL78/G1A Hardware User’s Manual (R01UH0305E).

3. 3. 2. 3 ES and CS registers

See 3. 2. 3 ES and CS registers in RL78/G1A Hardware User’s Manual (R01UH0305E).

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3. 3. 2. 4 Special function registers (SFRs)

The differences in special function registers (SFRs) between RL78/G1E (64-pin products, 80-pin products) and

RL78/G1A (64-pin products) are shown in the tables below.

(1) 64-pin products

Table 3-1. List of Differences in Special Function Registers (SFRs) (1/4)

Address RL78/G1E (64-pin product s) RL78/ G1A (64-pin products)

SFRs Name Symbol SFRs Name Symbol

FFF00H Port register 0

Note P0 Port register 0 P 0

FFF01H Port register 1

Note P1 Port register 1 P 1

FFF02H Port register 2

Note P2 Port register 2 P 2

FFF03H Port register 3 P 3

FFF04H Port register 4

Note P4 Port register 4 P 4

FFF05H Port register 5 P 5

FFF06H Port register 6 P 6

FFF07H Port register 7

Note P7 Port register 7 P 7

FFF0CH Port register 12

Note P12 Port regis t er 12 P 12

FFF0DH Same as RL78/G1A (64-pin products) P13 P ort register 13 P13

FFF0EH Port register 14 P14

FFF0FH Port register 15 P15

FFF10H Same as RL78/G1A (64-pin products) TXD0/

SIO00

SDR00 Serial data register 00 TXD0/

SIO00

SDR 00

FFF11H －－

FFF12H Same as RL78/G1A (64-pin products) RXD0/

SIO01 SDR01 Serial data register 01 RXD0/

SIO01 SDR01

FFF13H －－

FFF18H Same as RL78/G1A (64-pin products) TDR00 Timer data register 00 TDR00

FFF19H

FFF1AH Same as RL78/G1A (64-pin products) TDR01L TDR01 Timer data register 01 TDR01L TDR01

FFF1BH

TDR01H TDR01H

FFF1EH Same as RL78/G1A (64-pin products) ADCR 12-bit A/D conversion result register ADCR

FFF1FH Same as RL78/G1A (64-pin) ADCRH 8-bit A/D conversion result register ADCRH

FFF20H Port mode register 0

Note P M0 Port mode register 0 PM0

FFF21H Port mode register 1

Note P M1 Port mode register 1 PM1

FFF22H Port mode register 2

Note P M2 Port mode register 2 PM2

FFF23H Port mode regist er 3 PM3

FFF24H Port mode register 4

Note P M4 Port mode register 4 PM4

FFF25H Port mode regist er 5 PM5

FFF26H Port mode register 6

Note P M6 Port mode register 6 PM6

FFF27H Port mode register 7

Note P M7 Port mode register 7 PM7

FFF2CH Port mode register 12 PM12

FFF2EH Port mode register 14

Note PM14 Port mode register 14 PM14

FFF2FH Port mode register 15

Note PM15 Port mode register 15 PM15

FFF30H Same as RL78/G1A (64-pin products) ADM0 A/D convert er mode register 0 ADM0

FFF31H Analog input channel

specification register Note ADS Analog input channel

specification register ADS

FFF32H A/D converter mode register 1 Note ADM1 A/D converter mode register 1 ADM1

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

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Table 3-1. List of Differences in Special Function Registers (SFRs) (2/4)

Address RL78/G1E (64-pin products) RL78/G1A (64-pin product s)

SFRs Name Symbol SFRs Name Symbol

FFF34H Same as RL78/G1A (64-pin products) KRCTL Key return control regist er KRCTL

FFF35H Same as RL78/G1A (64-pin products) KRF Key return flag regist er KRF

FFF36H Key ret urn mode control register 1 KRM1

FFF37H Key return mode control register 0 Note KRM0 Key return mode control regist er 0 KRM0

FFF38H External interrupt rising edge

enable regist er 0 Note

EGP0 External interrupt rising edge

enable regist er 0

EGP0

FFF39H External interrupt falling edge

enable regist er 0 Note

EGN0 External interrupt falling edge

enable regist er 0

EGN0

FFF3AH External interrupt rising edge

enable regist er 1

EGP1

FFF3BH E xternal i nt errupt falling edge

enable regist er 1

EGN1

FFF44H Same as RL78/G1A (64-pin products) TXD1/

SIO10

SDR02 Serial data register 02 TXD1/

SIO10

SDR02

FFF45H －－

FFF46H Same as RL78/G1A (64-pin products) RXD1/

SIO11 SDR03 Serial data register 03 RXD1/

SIO11 SDR03

FFF47H －－

FFF48H Same as RL78/G1A (64-pin products) TXD2/

SIO20

SDR10 Serial data register 10 TXD2/

SIO20

SDR10

FFF49H －－

FFF4AH Same as RL78/G1A (64-pin products) RXD2/

SIO21 SDR11 Serial data register 11 RXD2/

SIO21 SDR11

FFF4BH －－

FFF50H II CA shift register 0 IICA0

FFF51H II CA st atus regi st er 0 IICS0

FFF52H II CA flag register 0 IICF0

FFF64H Same as RL78/G1A (64-pin products) TDR02 Timer data register 02 TDR02

FFF65H

FFF66H Same as RL78/G1A (64-pin products)

TDR03L

TDR03 Tim er data register 03

TDR03L

TDR03

FFF67H

TDR03H TDR03H

FFF68H Same as RL78/G1A (64-pin products) TDR04

Timer data register 04 TDR04

FFF69H

FFF6AH Same as RL78/G1A (64-pin products) TDR05

Timer data register 05 TDR05

FFF6BH

FFF6CH Same as RL78/G1A (64-pin products) TDR06

Timer data register 06 TDR06

FFF6DH

FFF6EH Same as RL78/G1A (64-pin products) TDR07

Timer data register 07 TDR07

FFF6FH

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

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Table 3-1. List of Differences in Special Function Registers (SFRs) (3/4)

Address RL78/G1E (64-pin product s) RL78/G1A (64-pin product s)

SFRs Name Sym bol S F Rs Nam e Symbol

FFF90H Same as RL78/G1A (64-pin products) ITMC Interval timer control register ITMC

FFF91H

FFF92H Second count register SEC

FFF93H Minute count register MIN

FFF94H Hour count register HOUR

FFF95H Week count register WEEK

FFF96H Day count register DAY

FFF97H Month count register MONTH

FFF98H Year count register YEAR

FFF99H Watch error correction register SUBCUD

FFF9AH Alarm minute register ALARMWM

FFF9BH Alarm hour regis t er ALARMWH

FFF9CH Alarm week regist er ALARMWW

FFF9DH Real-time clock control register 0 RTCC0

FFF9EH Real-time clock control register 1 RTCC1

FFFA0H Clock operation mode control register Note CMC Clock operation mode control register CMC

FFFA1H Clock operation status control register Note CSC Clock operation status control register CSC

FFFA2H S am e as RL78/G1A (64-pin products) OSTC Oscillation stabilization time

counter status register

OSTC

FFFA3H S am e as RL78/G1A (64-pin products) OSTS Oscillation stabilization time

select register

OSTS

FFFA4H System clo ck control regi ste r Note CKC System clock control register CKC

FFFA5H Clock output sel ect register 0 CKS0

FFFA6H Clock output sel ect register 1 CKS1

FFFA8H S am e as RL78/G1A (64-pin products) RESF Reset control flag register RESF

FFFA9H S am e as RL78/G1A (64-pin products) LVIM Volt age det ection register LVIM

FFFAAH Same as RL78/G1A (64-pin products) LVIS Voltage detection level register LVIS

FFFABH Same as RL78/G1A (64-pin products) WDTE Watchdog timer enable regist er WDTE

FFFACH Same as RL78/G1A (64-pin products) CRCIN CRC input register CRCIN

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

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Table 3-1. List of Differences in Special Function Registers (SFRs) (4/4)

Address RL78/G1E (64-pin products) RL78/G1A (64-pin products)

SFRs Name Symbol SFRs Name Symbol

FFFB0H S am e as RL78/G1A (64-pin products) DSA0 DMA SFR address register 0 DSA0

FFFB1H S am e as RL78/G1A (64-pin products) DSA1 DMA SFR address register 1 DSA1

FFFB2H S am e as RL78/G1A (64-pin products) DRA0L D RA 0 DM A R AM ad dre ss reg iste r 0L DRA0L D RA 0

FFFB3H S am e as RL78/G1A (64-pin products) DRA0H DM A R AM ad dr ess r egi ster 0H DRA0H

FFFB4H S am e as RL78/G1A (64-pin products) DRA1L D R A1 DM A RAM ad dre ss reg iste r 1L DRA1L DRA 1

FFFB5H S am e as RL78/G1A (64-pin products) DRA1H DM A R AM ad dr ess r egi ster 1H DRA1H

FFFB6H S am e as RL78/G1A (64-pin products) DBC0L DB C0 DMA byte count register 0L DBC0L DBC0

FFFB7H S am e as RL78/G1A (64-pin products) DBC0H DMA byte count register 0H DBC0H

FFFB8H S am e as RL78/G1A (64-pin products) DBC1L DB C1 DMA byte count register 1L DBC1L DBC1

FFFB9H S am e as RL78/G1A (64-pin products) DBC1H DMA byte count register 1H DBC1H

FFFBAH Same as RL78/G1A (64-pin products) DMC0 DMA mode control regist er 0 DMC0

FFFBBH Same as RL78/G1A (64-pin products) DMC1 DMA mode control regist er 1 DMC1

FFFBCH Same as RL78/G1A (64-pin products) DRC0 DMA operation control register 0 DRC0

FFFBDH Same as RL78/G1A (64-pin products) DRC1 DMA operation control register 1 DRC1

FFFD0H Interrupt mask flag register 2L Note IF2L IF2 Interrupt mask flag register 2L IF2L IF2

FFFD1H Interrupt mask flag register 2H Note IF2H Interrupt mask flag register 2H IF2H

FFFD4H Interrupt mask flag register 0L Note MK2L MK2 Interrupt mask flag register 0L MK2L MK2

FFFD5H Interrupt mask flag register 2H Note MK2H Interrupt mask flag register 2H MK2H

FFFD8H Priority specification flag register 02L Note PR02L PR02 Priority specificat i on flag regist er 02L PR02L PR02

FFFD9H Priority specification flag register 02H Note PR02H Pri ori ty specification flag regist er 02H PR02H

FFFDCH Priority specification flag register 12L Note PR12L PR12 Priori ty specification flag register 12L PR12L PR12

FFFDDH Priority specification flag register 12H Note PR12H Priority specification flag regist er 12H PR12H

FFFE0H Interrupt mask flag register 0L Note IF0L IF0 Interrupt mask flag register 0L IF0L IF0

FFFE1H Interrupt mask flag register 0H Note IF0H Interrupt mask flag register 0H IF0H

FFFE2H Interrupt mask flag register 1L Note IF1L IF1 Interrupt mask flag register 1L IF1L IF1

FFFE3H Interrupt mask flag register 1H Note IF1H Interrupt mask flag register 1H IF1H

FFFE4H Interrupt mask flag register 0L Note MK0L MK0 Interrupt mask flag register 0L MK0L MK0

FFFE5H Interrupt mask flag register 0H Note MK0H Interrupt mask flag register 0H MK0H

FFFE6H Interrupt mask flag register 1L Note MK1L MK1 Interrupt mask flag register 1L MK1L MK1

FFFE7H Interrupt mask flag register 1H Note MK1H Interrupt mask flag register 1H MK1H

FFFE8H Priority specification flag register 00L Note PR00L PR00 Priority specification flag register 00L PR00L PR00

FFFE9H Priority specification flag register 00H Note PR00H Priority spec ific at i o n flag register 00H PR00H

FFFEAH Priority specification flag register 01L Note PR01L PR01 Pri ori ty specification flag register 01L P R01L PR01

FFFEBH Priority specification flag register 01H Note PR01H Priority specification flag register 01H PR01H

FFFECH Priority specification flag register 10L Note PR10L PR10 Priority specificat i on flag register 10L PR10L PR10

FFFEDH Priority specification flag register 10H Note PR10H Priori ty specification flag regist er 10H PR10H

FFFEEH Priority specification flag register 11L Note PR11L PR11 Pri ori ty specification flag register 11L P R11L PR11

FFFEFH Priority specification flag register 11H Note PR11H Priorit y spec if ication flag register 11H P R11H

FFFF0H Same as RL78/G1A (64-pin products) MDAL Multiplication/division data

FFFF1H

FFFF2H Same as RL78/G1A (64-pin products) MDAH Multiplication/division data

FFFF3H

FFFF4H Same as RL78/G1A (64-pin products) MDBH Multiplication/division data

FFFF5H

FFFF6H Same as RL78/G1A (64-pin products) MDBL Multiplication/division data

FFFF7H

FFFFEH Same as RL78/G1A (64-pin products) PMC Processor m ode control regi ster PMC

Note The bit setting is different from that of RL78/G1A (64-pin products).

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(2) 80-pin products

Table 3-2. List of Differences in Special Function Registers (SFRs) (1/4)

Address RL78/G1E (80-pin product s) RL78/ G1A (64-pin products)

SFRs Name Symbol SFRs Name Symbol

FFF00H Port register 0

Note P0 Port register 0 P 0

FFF01H Port register 1

Note P1 Port register 1 P 1

FFF02H Port register 2

Note P2 Port register 2 P 2

FFF03H Port register 3 P 3

FFF04H Port register 4

Note P4 Port register 4 P 4

FFF05H Same as RL78/G1A (64-pin products) P 5 P ort register 5 P5

FFF06H Port register 6 P 6

FFF07H Port register 7

Note P7 Port register 7 P 7

FFF0CH Port register 12

Note P12 Port regis t er 12 P 12

FFF0DH Same as RL78/G1A (64-pin products) P13 P ort register 13 P13

FFF0EH Port register 14

Note P14 Port register 14 P14

FFF0FH Port register 15 P15

FFF10H Same as RL78/G1A (64-pin products) TXD0/

SIO00

SDR00 Serial data register 00 TXD0/

SIO00

SDR 00

FFF11H －－

FFF12H Same as RL78/G1A (64-pin products) RXD0/

SIO01 SDR01 Serial data register 01 RXD0/

SIO01 SDR01

FFF13H －－

FFF18H Same as RL78/G1A (64-pin products) TDR00 Timer data register 00 TDR00

FFF19H

FFF1AH Same as RL78/G1A (64-pin products) TDR01L TDR01 Timer data register 01 TDR01L TDR01

FFF1BH

TDR01H TDR01H

FFF1EH Same as RL78/G1A (64-pin products) ADCR 12-bit A/D conversion result register ADCR

FFF1FH Same as RL78/G1A (64-pin) ADCRH 8-bit A/D convers i on result register ADCRH

FFF20H Port mode register 0

Note P M0 Port mode register 0 PM0

FFF21H Port mode register 1

Note P M1 Port mode register 1 PM1

FFF22H Port mode register 2

Note P M2 Port mode register 2 PM2

FFF23H Port mode regist er 3 PM3

FFF24H Port mode register 4

Note P M4 Port mode register 4 PM4

FFF25H Same as RL78/G1A (64-pin products) P M5 Port mode register 5 PM5

FFF26H Port mode register 6

Note P M6 Port mode register 6 PM6

FFF27H Port mode register 7

Note P M7 Port mode register 7 PM7

FFF2CH Port mode register 12 PM12

FFF2EH Port mode register 14

Note PM14 Port mode register 14 PM14

FFF2FH Port mode register 15

Note PM15 Port mode register 15 PM15

FFF30H Same as RL78/G1A (64-pin products) ADM0 A/D convert er mode register 0 ADM0

FFF31H Analog input channel

specification register Note ADS Analog input channel

specification register ADS

FFF32H A/D converter mode register 1 Note ADM1 A/D converter mode register 1 ADM1

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

RL78/G1E CHAPTER 3 MICROCONTROLLER BLOCK

R01UH0353EJ0200 Rev.2.00 73

Mar 31, 2014

Table 3-2. List of Differences in Special Function Registers (SFRs) (2/4)

Address RL78/G1E (80-pin products) RL78/G1A (64-pin product s)

SFRs Name Symbol SFRs Name Symbol

FFF34H Same as RL78/G1A (64-pin products) KRCTL Key return control regist er KRCTL

FFF35H Same as RL78/G1A (64-pin products) KRF Key return flag regist er KRF

FFF36H Key ret urn mode control register 1 KRM1

FFF37H Same as RL78/G1A (64-pin products) K RM0 Key return mode control register 0 KRM0

FFF38H External interrupt rising edge

enable regist er 0 Note

EGP0 External int errupt rising edge

enable regist er 0

EGP0

FFF39H E xternal interrupt falling edge

enable regist er 0 Note

EGN0 External interrupt falling edge

enable regist er 0

EGN0

FFF3AH External interrupt rising edge

enable regist er 1

EGP1

FFF3BH E xternal i nt errupt falling edge

enable regist er 1

EGN1

FFF44H Same as RL78/G1A (64-pin products) TXD1/

SIO10

SDR02 Serial data register 02 TXD1/

SIO10

SDR02

FFF45H －－

FFF46H Same as RL78/G1A (64-pin products) RXD1/

SIO11 SDR03 Serial data register 03 RXD1/

SIO11 SDR03

FFF47H －－

FFF48H Same as RL78/G1A (64-pin products) TXD2/

SIO20

SDR10 Serial data register 10 TXD2/

SIO20

SDR10

FFF49H －－

FFF4AH Same as RL78/G1A (64-pin products) RXD2/

SIO21 SDR11 Serial data register 11 RXD2/

SIO21 SDR11

FFF4BH －－

FFF50H II CA shift register 0 IICA0

FFF51H II CA st atus regi st er 0 IICS0

FFF52H II CA flag register 0 IICF0

FFF64H Same as RL78/G1A (64-pin products) TDR02 Timer data register 02 TDR02

FFF65H

FFF66H Same as RL78/G1A (64-pin products)

TDR03L

TDR03 Tim er data register 03

TDR03L

TDR03

FFF67H

TDR03H TDR03H

FFF68H Same as RL78/G1A (64-pin products) TDR04

Timer data register 04 TDR04

FFF69H

FFF6AH Same as RL78/G1A (64-pin products) TDR05

Timer data register 05 TDR05

FFF6BH

FFF6CH Same as RL78/G1A (64-pin products) TDR06

Timer data register 06 TDR06

FFF6DH

FFF6EH Same as RL78/G1A (64-pin products) TDR07

Timer data register 07 TDR07

FFF6FH

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

RL78/G1E CHAPTER 3 MICROCONTROLLER BLOCK

R01UH0353EJ0200 Rev.2.00 74

Mar 31, 2014

Table 3-2. List of Differences in Special Function Registers (SFRs) (3/4)

Address RL78/G1E (80-pin product s) RL78/G1A (64-pin product s)

SFRs Name Sym bol S F Rs Nam e Symbol

FFF90H Same as RL78/G1A (64-pin products) ITMC Interval timer control register ITMC

FFF91H

FFF92H Second count register SEC

FFF93H Minute count register MIN

FFF94H Hour count register HOUR

FFF95H Week count register WEEK

FFF96H Day count register DAY

FFF97H Month count register MONTH

FFF98H Year count register YEAR

FFF99H Watch error correction register SUBCUD

FFF9AH Alarm minute register ALARMWM

FFF9BH Alarm hour regis t er ALARMWH

FFF9CH Alarm week regist er ALARMWW

FFF9DH Real-time clock control register 0 RTCC0

FFF9EH Real-time clock control register 1 RTCC1

FFFA0H Clock operation mode control register Note CMC Clock operation mode control register CMC

FFFA1H Clock operation status control register Note CSC Clock operation status control register CSC

FFFA2H S am e as RL78/G1A (64-pin products) OSTC Oscillation stabilization time

counter status register

OSTC

FFFA3H S am e as RL78/G1A (64-pin products) OSTS Oscillation stabilization time

select register

OSTS

FFFA4H System clo ck control regi ste r Note CKC System clock control register CKC

FFFA5H Clock output select register 0 Note CKS0 Clock output select regis t er 0 CKS0

FFFA6H Clock output sel ect register 1 CKS1

FFFA8H S am e as RL78/G1A (64-pin products) RESF Reset control flag register RESF

FFFA9H S am e as RL78/G1A (64-pin products) LVIM Volt age det ection register LVIM

FFFAAH Same as RL78/G1A (64-pin products) LVIS Voltage detection level register LVIS

FFFABH Same as RL78/G1A (64-pin products) WDTE Watchdog timer enable regist er WDTE

FFFACH Same as RL78/G1A (64-pin products) CRCIN CRC input register CRCIN

Note The bit setting is different from that of RL78/G1A (64-pin products).

Caution Do not write data to the registers which is in the row with painted gray.

RL78/G1E CHAPTER 3 MICROCONTROLLER BLOCK

R01UH0353EJ0200 Rev.2.00 75

Mar 31, 2014

Table 3-2. List of Differences in Special Function Registers (SFRs) (4/4)

Address RL78/G1E (80-pin products) RL78/G1A (64-pin products)